Analysis and Design of Analog Integrated Circuits Lecture 7. Differential Amplifiers
|
|
- Meghan Freeman
- 5 years ago
- Views:
Transcription
1 Analysis and Desin of Analo Interated Circuits ecture 7 Differential Amplifiers Michael H. Perrott February 1, 01 Copyriht 01 by Michael H. Perrott All rihts reserved.
2 Review Proposed Thevenin CMOS Transistor Model Hybrid-π Model R thd R D Key Small-Sinal Parameters R G d Parameter Stron Inversion Weak Inversion R th v s m v s - mb v s r o m μ n C ox (W/)I D qi D nkt s mb γ m Φ F + V SB (n-1)qi D nkt R ths v s R S Note: mb = 0 if R S =0 or V sb =0 r o 1 λi D 1 λi D Thevenin Resistances R G R th I D d s R D Rthd R ths R S Exact R thd = r o (1+( m + mb )R S )+R S R th = infinite R ths = 1+R D /r o Approximation ( mb << m, m r o >> 1) R thd = r o (1+ m R S ) R th = infinite R ths = 1 + R D /r o m r o 1 m + mb ( )( ) 1 m Proposed Small Sinal Transistor Model R th v R ths A v v i s αi s Rthd s Exact Approximation A v = m r m o A v = 1 ( m + mb << m, m r o >>1) mb (R D << r ) o α = 1+R D /R thd α = 1 (R D <<R thd ) d
3 Key Observations Thevenin Resistances R G R th I D d s R D Rthd R ths R S Exact R thd = r o (1+( m + mb )R S )+R S R th = infinite R ths = 1+R D /r o Approximation ( mb << m, m r o >> 1) R thd = r o (1+ m R S ) R th = infinite R ths = 1 + R D /r o m 1 m + mb ( )( ) r o 1 m Proposed Small Sinal Transistor Model R th v R ths A v v i s αi s Rthd s Exact Approximation A v = m r m o A v = 1 ( m + mb << m, m r o >>1) mb (R D << r ) o α = 1+R D /R thd α = 1 (R D <<R thd ) d For calculations focusin on sinal flow from ate or source to the drain - Observe that current throuh R d equals i s True since * R thd /(R d + R thd ) = 1 You can avoid doin calculations involvin or R thd For calculations focusin on sinal flow from the drain - Drain simply looks like impedance R thd 3
4 Basic Sinle-Stae Amplifiers and Current Mirrors Common Source Common Gate Source Follower Z V out Z V out Source V in Vout Source V in i d i d i in Z Common Source with Source Deeneration Source Z i d V out Current Mirror Source V in i in i out Z S W M 4
5 Today We Will ook At Differential Amplifiers Common Source Common Gate Source Follower Z V out Z V out Source V in Vout Source V in i d i d i in Z Common Source with Source Deeneration Source Differential Amplifier Z Source V in i d V out Current Mirror i in i out Z Z V in- Z S W M I bias 5
6 Differential and Common Mode Sinals -V d / V d / V c Consider positive and neative input terminal sinals V i+ and V i - Define differential sinal as: Define common mode sinal as: V id = V + in V in V ic =(V + in + V We can create arbitrary V i+ and V i- sinals from differential and common mode components: in )/ V + in = V ic + 1 V id V in = V ic 1 V id This also applies to differential output sinals: V + o = V oc + 1 V od V o = V oc 1 V od 6
7 Differential Amplifier I bias1 V in- M 3 M 4 Useful for amplifyin sinals in the presence of noise - Common-mode noise is rejected Useful for hih speed diital circuits - ow voltae swin allows faster ate/buffer performance 7
8 First Steps in Small Sinal Modelin I bias1 V in- V in- M 3 M 4 R thd4 = r o4 Small sinal analysis assumes linearity - Impact of M 4 on amplifier is to simply present its drain impedance to the diff pair transistors ( and M ) - Impact of and V in- can be evaluated separately and then added (i.e., superposition) By symmetry, we need only determine impact of Calculation of V in- impact directly follows 8
9 Calculate Impact of usin Thevenin Models r o4 M i s1 R ths1 R th1 v 1 A v1 v 1 α 1 i s1 R thd1 α R ths i s R thd i s General Model r o4 Common Gate Analysis follows fairly easily, but there is a simpler way! 9
10 Method of Differential Amplifier Analysis V in- V id -V id r o4 V ic r o4 Partition input sinals into common-mode and differential components By superposition, we can add the results to determine the overall impact of the input sinals 10
11 Differential Analysis V id -V id i s1 = i s i R = 0 R 1 R V id -V id R 1 R V id -V id i s1 i s i R r o4 Key observations - Inputs are equal in manitude but opposite in sin to each other - By linearity and symmetry, i s1 must equal -i s This implies i R is zero, so that voltae drop across r o4 is zero The sources of and M are therefore at incremental round and decoupled from each other! Analysis can now be done on identical half-circuits What is the differential DC ain? 11
12 Common Mode Analysis i s1 = i s i R = i s1 = i s V ic V ic V ic V ic V ic V ic i s1 ir i s i s1 i diff = 0 i s r o4 r o4 r o4 r o4 r o4 Key observations - Inputs are equal to each other - By linearity and symmetry, i s1 must equal i s This implies i R = i s1 = i s - We can view r o4 as two parallel resistors that have equal current runnin throuh them Analysis can also be done on two identical half-circuits What is the common mode DC ain? 1
13 Useful Metric for Differential Amplifiers: CMRR V input V noise V id =V si V od Common Mode Rejection Ratio (CMRR) - Define: a vd : differential ain, a vc : common mode ain CMRR = µ avd a vc - CMRR corresponds to ratio of differential to common mode ain and is related to received sinal-to-noise ratio V od = a vd V si + a vc V noise Sinal µ µ Noise = avd Vsi =CMRR a vc V noise µ Vsi V noise 13
14 Another Useful Metric for Differential Amplifiers: PSRR V sup + V input V noise V id =V si V od Power Supply Rejection Ratio (PSRR) - a vd : differential ain - a vp+ : positive power supply ain - a vp- : neative power supply ain PSRR + = µ avd a vp+ PSRR = V sup - µ avd a vp 14
15 Example: Calculate CMRR and PSRR V in- V id -V id r o4 V ic r o4 First determine a vd, a vc, a vp+, and a vp- Then calculate CMRR and PSRR - Note that CMRR and PSRR are often expressed in db Example: CMRR = 0lo(a vd /a vc ) 15
16 Common Mode Voltae Rane of Differential Amplifier Id1 I d I bias ΔV 1 ΔV V in- V TH +ΔV 1 I ss V TH +ΔV ΔV 4 M 3 M 4 While keepin all devices in saturation: - What is the maximum common mode output rane? Assume V id = 0 - What is the maximum common mode input rane? Assume V od = 0 16
17 are Sinal Behavior of Differential Mode Operation V id = -V in- = (V TH +ΔV 1 ) - (V TH +ΔV ) = ΔV 1 -ΔV I d1 I d V id = I d1 k I d k where k = μ n C ox W I bias V in- V id = I ss +I od / k I ss -I od / k where I od = I d1 -I d V TH +ΔV 1 V TH +ΔV square and solve for I od M 3 I ss M 4 I ss I od = KV id for V k id < I ss k -V id I od = I d1 -I d I ss I ss k I ss k V id = -V in- -I ss Note: above analysis assumes stron inversion 17
Introduction: the common and the differential mode components of two voltages. differential mode component: v d = v 1 - v 2 common mode component:
EECTONCS-1 CHPTE 3 DFFEENT MPFES ntroduction: the common and the differential mode components of two voltaes v d v c differential mode component: v d = v 1 - v common mode component: v1 v v c = v 1 v vd
More informationReview - Differential Amplifier Basics Difference- and common-mode signals: v ID
6.012 Microelectronic Devices and Circuits Lecture 20 DiffAmp Anal. I: Metrics, Max. Gain Outline Announcements Announcements D.P.: No Early effect in large signal analysis; just LECs. Lec. 21 foils useful;
More informationV DD. M 1 M 2 V i2. V o2 R 1 R 2 C C
UNVERSTY OF CALFORNA Collee of Enineerin Department of Electrical Enineerin and Computer Sciences E. Alon Homework #3 Solutions EECS 40 P. Nuzzo Use the EECS40 90nm CMOS process in all home works and projects
More informationLecture 13 MOSFET as an amplifier with an introduction to MOSFET small-signal model and small-signal schematics. Lena Peterson
Lecture 13 MOSFET as an amplifier with an introduction to MOSFET small-signal model and small-signal schematics Lena Peterson 2015-10-13 Outline (1) Why is the CMOS inverter gain not infinite? Large-signal
More informationThe BJT Differential Amplifier. Basic Circuit. DC Solution
c Copyright 010. W. Marshall Leach, Jr., Professor, Georgia Institute of Technology, School of Electrical and Computer Engineering. The BJT Differential Amplifier Basic Circuit Figure 1 shows the circuit
More informationEE 435. Lecture 18. Two-Stage Op Amp with LHP Zero Loop Gain - Breaking the Loop
EE 435 Lecture 8 Two-Stae Op Amp with LHP Zero Loop Gain - Breakin the Loop Review from last lecture Nyquist and Gain-Phase Plots Nyquist and Gain-Phase Plots convey identical information but ain-phase
More informationECE315 / ECE515 Lecture 11 Date:
ecture 11 Date: 15.09.016 MOS Differential Pair Quantitative Analysis differential input Small Signal Analysis MOS Differential Pair ECE315 / ECE515 M 1 and M are perfectly matched (at least in theory!)
More information1/13/12 V DS. I d V GS. C ox ( = f (V GS ,V DS ,V SB = I D. + i d + I ΔV + I ΔV BS V BS. 19 January 2012
/3/ 9 January 0 Study the linear model of MOS transistor around an operating point." MOS in saturation: V GS >V th and V S >V GS -V th " VGS vi - I d = I i d VS I d = µ n ( L V V γ Φ V Φ GS th0 F SB F
More information3. Basic building blocks. Analog Design for CMOS VLSI Systems Franco Maloberti
Inverter with active load It is the simplest gain stage. The dc gain is given by the slope of the transfer characteristics. Small signal analysis C = C gs + C gs,ov C 2 = C gd + C gd,ov + C 3 = C db +
More informationECEG 351 Electronics II Spring 2017
G 351 lectronics Sprin 2017 Review Topics for xa #1 Please review the xa Policies section of the xas pae at the course web site. Please especially note the followin: 1. You will be allowed to use a non-wireless
More informationSOME USEFUL NETWORK THEOREMS
APPENDIX D SOME USEFUL NETWORK THEOREMS Introduction In this appendix we review three network theorems that are useful in simplifying the analysis of electronic circuits: Thévenin s theorem Norton s theorem
More informationECE 546 Lecture 11 MOS Amplifiers
ECE 546 Lecture MOS Amplifiers Spring 208 Jose E. Schutt-Aine Electrical & Computer Engineering University of Illinois jesa@illinois.edu ECE 546 Jose Schutt Aine Amplifiers Definitions Used to increase
More informationEE 435 Lecture 13. Cascaded Amplifiers. -- Two-Stage Op Amp Design
EE 435 Lecture 13 ascaded Amplifiers -- Two-Stae Op Amp Desin Review from Last Time Routh-Hurwitz Stability riteria: A third-order polynomial s 3 +a 2 s 2 +a 1 s+a 0 has all poles in the LHP iff all coefficients
More informationHalf-circuit incremental analysis techniques
6.012 Electronic Devices and Circuits Lecture 19 Differential Amplifier Stages Outline Announcements Handouts Lecture Outline and Summary Design Problem out tomorrow in recitation Review Singletransistor
More informationEE 330 Lecture 33. Basic amplifier architectures Common Emitter/Source Common Collector/Drain Common Base/Gate. Basic Amplifiers
33 Lecture 33 asic aplifier architectures oon itter/source oon ollector/drain oon ase/gate asic plifiers nalysis, Operation, and Desin xa 3 Friday pril 3 eview Previous Lecture Two-Port quivalents of Interconnected
More informationECE-343 Test 1: Feb 10, :00-8:00pm, Closed Book. Name : SOLUTION
ECE-343 Test : Feb 0, 00 6:00-8:00pm, Closed Book Name : SOLUTION C Depl = C J0 + V R /V o ) m C Diff = τ F g m ω T = g m C µ + C π ω T = g m I / D C GD + C or V OV GS b = τ i τ i = R i C i ω H b Z = Z
More informationLecture 25 ANNOUNCEMENTS. Reminder: Prof. Liu s office hour is cancelled on Tuesday 12/4 OUTLINE. General considerations Benefits of negative feedback
Lecture 25 ANNOUNCEMENTS eminder: Prof. Liu s office hour is cancelled on Tuesday 2/4 Feedback OUTLINE General considerations Benefits of neative feedback Sense andreturn techniques Voltae voltae feedback
More informationMixed-Signal IC Design Notes set 1: Quick Summary of Device Models
ECE194J /594J notes, M. Rodwell, copyrihted 2011 Mixed-Sinal IC Desin Notes set 1: Quick Summary of Device Models Mark Rodwell University of California, Santa Barbara rodwell@ece.ucsb.edu 805-893-3244,
More informationMicroelectronics Main CMOS design rules & basic circuits
GBM8320 Dispositifs médicaux intelligents Microelectronics Main CMOS design rules & basic circuits Mohamad Sawan et al. Laboratoire de neurotechnologies Polystim mohamad.sawan@polymtl.ca M5418 6 & 7 September
More informationLecture 37: Frequency response. Context
EECS 05 Spring 004, Lecture 37 Lecture 37: Frequency response Prof J. S. Smith EECS 05 Spring 004, Lecture 37 Context We will figure out more of the design parameters for the amplifier we looked at in
More informationEE 435. Lecture 2: Basic Op Amp Design. - Single Stage Low Gain Op Amps
EE 435 ecture 2: Basic Op mp Design - Single Stage ow Gain Op mps 1 Review from last lecture: How does an amplifier differ from an operational amplifier?? Op mp mplifier mplifier used in open-loop applications
More informationLecture 10 MOSFET (III) MOSFET Equivalent Circuit Models
Lecture 10 MOSFET (III) MOSFET Equivalent Circuit Models Outline Lowfrequency smallsignal equivalent circuit model Highfrequency smallsignal equivalent circuit model Reading Assignment: Howe and Sodini;
More informationCommon Drain Stage (Source Follower) Claudio Talarico, Gonzaga University
Common Drain Stage (Source Follower) Claudio Talarico, Gonzaga University Common Drain Stage v gs v i - v o V DD v bs - v o R S Vv IN i v i G C gd C+C gd gb B&D v s vv OUT o + V S I B R L C L v gs - C
More informationElectronic Devices and Circuits Lecture 18 - Single Transistor Amplifier Stages - Outline Announcements. Notes on Single Transistor Amplifiers
6.012 Electronic Devices and Circuits Lecture 18 Single Transistor Amplifier Stages Outline Announcements Handouts Lecture Outline and Summary Notes on Single Transistor Amplifiers Exam 2 Wednesday night,
More informationBiasing the CE Amplifier
Biasing the CE Amplifier Graphical approach: plot I C as a function of the DC base-emitter voltage (note: normally plot vs. base current, so we must return to Ebers-Moll): I C I S e V BE V th I S e V th
More informationESE 570: Digital Integrated Circuits and VLSI Fundamentals
ESE 570: Digital Integrated Circuits and VLSI Fundamentals Lec 8: February 9, 016 MOS Inverter: Static Characteristics Lecture Outline! Voltage Transfer Characteristic (VTC) " Static Discipline Noise Margins!
More informationECE-343 Test 2: Mar 21, :00-8:00, Closed Book. Name : SOLUTION
ECE-343 Test 2: Mar 21, 2012 6:00-8:00, Closed Book Name : SOLUTION 1. (25 pts) (a) Draw a circuit diagram for a differential amplifier designed under the following constraints: Use only BJTs. (You may
More informationPolytech Montpellier MEA4 M2 EEA Systèmes Microélectroniques. Analog IC Design
Analo C Desin - Academic year 05/06 - Session 3 04/0/5 Polytech Montellier MEA4 M EEA Systèmes Microélectroniques Analo C Desin From transistor in to current sources Pascal Nouet 05/06 - nouet@lirmm.fr
More informationLecture 24 Multistage Amplifiers (I) MULTISTAGE AMPLIFIER
Lecture 24 Multistage Amplifiers (I) MULTISTAGE AMPLIFIER Outline. Introduction 2. CMOS multi-stage voltage amplifier 3. BiCMOS multistage voltage amplifier 4. BiCMOS current buffer 5. Coupling amplifier
More informationEE 330 Lecture 16. Devices in Semiconductor Processes. MOS Transistors
EE 330 Lecture 16 Devices in Semiconductor Processes MOS Transistors Review from Last Time Model Summary I D I V DS V S I B V BS = 0 0 VS VT W VDS ID = μcox VS VT VDS VS V VDS VS VT L T < W μc ( V V )
More informationHomework Assignment 08
Homework Assignment 08 Question 1 (Short Takes) Two points each unless otherwise indicated. 1. Give one phrase/sentence that describes the primary advantage of an active load. Answer: Large effective resistance
More informationTransistor Characteristics and A simple BJT Current Mirror
Transistor Characteristics and A simple BJT Current Mirror Current-oltage (I-) Characteristics Device Under Test DUT i v T T 1 R X R X T for test Independent variable on horizontal axis Could force current
More informationAdvanced Current Mirrors and Opamps
Advanced Current Mirrors and Opamps David Johns and Ken Martin (johns@eecg.toronto.edu) (martin@eecg.toronto.edu) slide 1 of 26 Wide-Swing Current Mirrors I bias I V I in out out = I in V W L bias ------------
More informationLecture 12: MOSFET Devices
Lecture 12: MOSFET Devices Gu-Yeon Wei Division of Engineering and Applied Sciences Harvard University guyeon@eecs.harvard.edu Wei 1 Overview Reading S&S: Chapter 5.1~5.4 Supplemental Reading Background
More informationMicroelectronic Devices and Circuits Lecture 13 - Linear Equivalent Circuits - Outline Announcements Exam Two -
6.012 Microelectronic Devices and Circuits Lecture 13 Linear Equivalent Circuits Outline Announcements Exam Two Coming next week, Nov. 5, 7:309:30 p.m. Review Subthreshold operation of MOSFETs Review Large
More informationESE319 Introduction to Microelectronics Common Emitter BJT Amplifier
Common Emitter BJT Amplifier 1 Adding a signal source to the single power supply bias amplifier R C R 1 R C V CC V CC V B R E R 2 R E Desired effect addition of bias and signal sources Starting point -
More informationECE 342 Electronic Circuits. 3. MOS Transistors
ECE 342 Electronic Circuits 3. MOS Transistors Jose E. Schutt-Aine Electrical & Computer Engineering University of Illinois jschutt@emlab.uiuc.edu 1 NMOS Transistor Typically L = 0.1 to 3 m, W = 0.2 to
More informationECE-305: Fall 2017 MOS Capacitors and Transistors
ECE-305: Fall 2017 MOS Capacitors and Transistors Pierret, Semiconductor Device Fundamentals (SDF) Chapters 15+16 (pp. 525-530, 563-599) Professor Peter Bermel Electrical and Computer Engineering Purdue
More informationECE-342 Test 3: Nov 30, :00-8:00, Closed Book. Name : Solution
ECE-342 Test 3: Nov 30, 2010 6:00-8:00, Closed Book Name : Solution All solutions must provide units as appropriate. Unless otherwise stated, assume T = 300 K. 1. (25 pts) Consider the amplifier shown
More informationANALYSIS OF POWER EFFICIENCY FOR FOUR-PHASE POSITIVE CHARGE PUMPS
ANALYSS OF POWER EFFCENCY FOR FOUR-PHASE POSTVE CHARGE PUMPS Chien-pin Hsu and Honchin Lin Department of Electrical Enineerin National Chun-Hsin University, Taichun, Taiwan e-mail:hclin@draon.nchu.edu.tw
More information6.776 High Speed Communication Circuits Lecture 10 Noise Modeling in Amplifiers
6.776 High Speed Communication Circuits Lecture 10 Noise Modeling in Amplifiers Michael Perrott Massachusetts Institute of Technology March 8, 2005 Copyright 2005 by Michael H. Perrott Notation for Mean,
More informationECE 497 JS Lecture - 12 Device Technologies
ECE 497 JS Lecture - 12 Device Technologies Spring 2004 Jose E. Schutt-Aine Electrical & Computer Engineering University of Illinois jose@emlab.uiuc.edu 1 NMOS Transistor 2 ρ Source channel charge density
More informationChapter 10 Feedback. PART C: Stability and Compensation
1 Chapter 10 Feedback PART C: Stability and Compensation Example: Non-inverting Amplifier We are analyzing the two circuits (nmos diff pair or pmos diff pair) to realize this symbol: either of the circuits
More informationDesign of CMOS Analog Integrated Circuits. Basic Building Block
Desin of CMOS Analo Inteated Cicuits Fanco Malobeti Basic Buildin Block F. Malobeti : Desin of CMOS Analo Inteated Cicuits - Basic Buildin Block INERTER WITH ACTIE LOAD The simplest fom of ain stae, the
More informationOperational Amplifiers
Operational Amplifiers A Linear IC circuit Operational Amplifier (op-amp) An op-amp is a high-gain amplifier that has high input impedance and low output impedance. An ideal op-amp has infinite gain and
More informationChapter 13 Small-Signal Modeling and Linear Amplification
Chapter 13 Small-Signal Modeling and Linear Amplification Microelectronic Circuit Design Richard C. Jaeger Travis N. Blalock 1/4/12 Chap 13-1 Chapter Goals Understanding of concepts related to: Transistors
More informationFigure 1: MOSFET symbols.
c Copyright 2008. W. Marshall Leach, Jr., Professor, Georgia Institute of Technology, School of Electrical and Computer Engineering. The MOSFET Device Symbols Whereas the JFET has a diode junction between
More informationElectronic Devices and Circuits Lecture 15 - Digital Circuits: Inverter Basics - Outline Announcements. = total current; I D
6.012 - Electronic Devices and Circuits Lecture 15 - Digital Circuits: Inverter asics - Outline Announcements Handout - Lecture Outline and Summary The MOSFET alpha factor - use definition in lecture,
More informationElectronic Circuits Summary
Electronic Circuits Summary Andreas Biri, D-ITET 6.06.4 Constants (@300K) ε 0 = 8.854 0 F m m 0 = 9. 0 3 kg k =.38 0 3 J K = 8.67 0 5 ev/k kt q = 0.059 V, q kt = 38.6, kt = 5.9 mev V Small Signal Equivalent
More informationVoltage AmpliÞer Frequency Response
Voltage AmpliÞer Frequency Response Chapter 9 multistage voltage ampliþer 5 V M 7B M 7 M 5 R 35 kω M 6B M 6 Q 4 100 µa X M 3 Q B Q v OUT V s M 1 M 8 M9 V BIAS M 10 Approaches: 1. brute force OCTC -- do
More informationQuick Review. ESE319 Introduction to Microelectronics. and Q1 = Q2, what is the value of V O-dm. If R C1 = R C2. s.t. R C1. Let Q1 = Q2 and R C1
Quick Review If R C1 = R C2 and Q1 = Q2, what is the value of V O-dm? Let Q1 = Q2 and R C1 R C2 s.t. R C1 > R C2, express R C1 & R C2 in terms R C and ΔR C. If V O-dm is the differential output offset
More informationLecture 4: Feedback and Op-Amps
Lecture 4: Feedback and Op-Amps Last time, we discussed using transistors in small-signal amplifiers If we want a large signal, we d need to chain several of these small amplifiers together There s a problem,
More informationAnalysis and Design of Analog Integrated Circuits Lecture 14. Noise Spectral Analysis for Circuit Elements
Analysis and Design of Analog Integrated Circuits Lecture 14 Noise Spectral Analysis for Circuit Elements Michael H. Perrott March 18, 01 Copyright 01 by Michael H. Perrott All rights reserved. Recall
More informationEE 435. Lecture 3 Spring Design Space Exploration --with applications to single-stage amplifier design
EE 435 ecture 3 Spring 2019 Design Space Exploration --with applications to single-stage amplifier design 1 Review from last lecture: Single-ended Op Amp Inverting Amplifier V IN R 1 V 1 R 2 A V V OUT
More informationPI3CH400 4-Bit Bus Switch, Enable Low 1.8V/2.5V/3.3V, High-Bandwidth, Hot Plug
1.8V/2.5V/3.3V, Hih-Bandwidth, Hot Plu Features Near-Zero propaation delay 5-ohm switches connect inputs to outputs Hih sinal passin bandwidth (500 MHz) Beyond Rail-to-Rail switchin - 0 to 5V switchin
More informationMOS Transistors. Prof. Krishna Saraswat. Department of Electrical Engineering Stanford University Stanford, CA
MOS Transistors Prof. Krishna Saraswat Department of Electrical Engineering S Stanford, CA 94305 saraswat@stanford.edu 1 1930: Patent on the Field-Effect Transistor! Julius Lilienfeld filed a patent describing
More informationModeling of High Voltage AlGaN/GaN HEMT. Copyright 2008 Crosslight Software Inc.
Modelin of Hih Voltae AlGaN/GaN HEMT Copyriht 2008 Crossliht Software Inc. www.crossliht.com 1 Introduction 2 AlGaN/GaN HEMTs - potential to be operated at hih power and hih breakdown voltae not possible
More informationEE 435. Lecture 10: Current Mirror Op Amps
EE 435 ecture 0: urrent Mirror Op mps Review from last lecture: Folded ascode mplifier DD DD B3 B3 B B3 B2 B2 B3 DD DD B B B4 I T QURTER IRUIT Op mp 2 Review from last lecture: Folded ascode Op mp DD M
More informationEE 435. Lecture 2: Basic Op Amp Design. - Single Stage Low Gain Op Amps
EE 435 ecture 2: Basic Op Amp Design - Single Stage ow Gain Op Amps 1 Review from last lecture: How does an amplifier differ from an operational amplifier?? Op Amp Amplifier Amplifier used in open-loop
More informationID # NAME. EE-255 EXAM 3 April 7, Instructor (circle one) Ogborn Lundstrom
ID # NAME EE-255 EXAM 3 April 7, 1998 Instructor (circle one) Ogborn Lundstrom This exam consists of 20 multiple choice questions. Record all answers on this page, but you must turn in the entire exam.
More informationLecture 15: MOS Transistor models: Body effects, SPICE models. Context. In the last lecture, we discussed the modes of operation of a MOS FET:
Lecture 15: MOS Transistor models: Body effects, SPICE models Context In the last lecture, we discussed the modes of operation of a MOS FET: oltage controlled resistor model I- curve (Square-Law Model)
More informationRefinements to Incremental Transistor Model
Refinements to Incremental Transistor Model This section presents modifications to the incremental models that account for non-ideal transistor behavior Incremental output port resistance Incremental changes
More informationECEN 326 Electronic Circuits
ECEN 326 Electronic Circuits Frequency Response Dr. Aydın İlker Karşılayan Texas A&M University Department of Electrical and Computer Engineering High-Frequency Model BJT & MOS B or G r x C f C or D r
More informationThe Devices: MOS Transistors
The Devices: MOS Transistors References: Semiconductor Device Fundamentals, R. F. Pierret, Addison-Wesley Digital Integrated Circuits: A Design Perspective, J. Rabaey et.al. Prentice Hall NMOS Transistor
More informationLecture 14: Electrical Noise
EECS 142 Lecture 14: Electrical Noise Prof. Ali M. Niknejad University of California, Berkeley Copyright c 2008 by Ali M. Niknejad A.M.Niknejad University of California, Berkeley EECS 142 Lecture 14 p.1/20
More informationAnnouncements. EE141- Fall 2002 Lecture 7. MOS Capacitances Inverter Delay Power
- Fall 2002 Lecture 7 MOS Capacitances Inverter Delay Power Announcements Wednesday 12-3pm lab cancelled Lab 4 this week Homework 2 due today at 5pm Homework 3 posted tonight Today s lecture MOS capacitances
More informationLab 4: Frequency Response of CG and CD Amplifiers.
ESE 34 Electronics aboratory B Departent of Electrical and Coputer Enineerin Fall 2 ab 4: Frequency esponse of CG and CD Aplifiers.. OBJECTIVES Understand the role of input and output ipedance in deterinin
More informationLab #8 Two Port Networks
Cir cuit s 212 Lab Lab #8 Two Port Networks Network parameters are used to characterize a device. Given the network parameters of a device, the voltage and current characteristics of the device can be
More informationEE 330 Lecture 22. Small Signal Modelling Operating Points for Amplifier Applications Amplification with Transistor Circuits
EE 330 Lecture 22 Small Signal Modelling Operating Points for Amplifier Applications Amplification with Transistor Circuits Exam 2 Friday March 9 Exam 3 Friday April 13 Review Session for Exam 2: 6:00
More informationECE 546 Lecture 10 MOS Transistors
ECE 546 Lecture 10 MOS Transistors Spring 2018 Jose E. Schutt-Aine Electrical & Computer Engineering University of Illinois jesa@illinois.edu NMOS Transistor NMOS Transistor N-Channel MOSFET Built on p-type
More informationChapter 5. Department of Mechanical Engineering
Source Transformation By KVL: V s =ir s + v By KCL: i s =i + v/r p is=v s /R s R s =R p V s /R s =i + v/r s i s =i + v/r p Two circuits have the same terminal voltage and current Source Transformation
More informationI D based Two-Stage Amplifier Design
m D based Two-Stae Amplifier Desin honli ai 9/0/04 Motivation d/(w/l) VS VG is sensitive to Vbs Motivation m/d vs VG is also sensitive to Vbs Motivation But m/d vs D/(W/L) has fixed shape With a ertain
More informationOperational amplifiers (Op amps)
Operational amplifiers (Op amps) v R o R i v i Av i v View it as an ideal amp. Take the properties to the extreme: R i, R o 0, A.?!?!?!?! v v i Av i v A Consequences: No voltage dividers at input or output.
More informationHomework Assignment 09
Homework Assignment 09 Question 1 (Short Takes) Two points each unless otherwise indicated. 1. What is the 3-dB bandwidth of the amplifier shown below if r π = 2.5K, r o = 100K, g m = 40 ms, and C L =
More informationLecture 10 OUTLINE. Reading: Chapter EE105 Spring 2008 Lecture 10, Slide 1 Prof. Wu, UC Berkeley
Lecture 0 OUTLIN BJT Aplifiers (3) itter follower (Coon-collector aplifier) Analysis of eitter follower core Ipact of source resistance Ipact of arly effect itter follower with biasin eadin: Chapter 5.3.3-5.4
More informationLecture 04: Single Transistor Ampliers
Lecture 04: Single Transistor Ampliers Analog IC Design Dr. Ryan Robucci Department of Computer Science and Electrical Engineering, UMBC Spring 2015 Dr. Ryan Robucci Lecture IV 1 / 37 Single-Transistor
More informationSection 1: Common Emitter CE Amplifier Design
ECE 3274 BJT amplifier design CE, CE with Ref, and CC. Richard Cooper Section 1: CE amp Re completely bypassed (open Loop) Section 2: CE amp Re partially bypassed (gain controlled). Section 3: CC amp (open
More informationAssignment 3 ELEC 312/Winter 12 R.Raut, Ph.D.
Page 1 of 3 ELEC 312: ELECTRONICS II : ASSIGNMENT-3 Department of Electrical and Computer Engineering Winter 2012 1. A common-emitter amplifier that can be represented by the following equivalent circuit,
More informationEE 330 Lecture 16. MOS Device Modeling p-channel n-channel comparisons Model consistency and relationships CMOS Process Flow
EE 330 Lecture 16 MOS Device Modeling p-channel n-channel comparisons Model consistency and relationships CMOS Process Flow Review from Last Time Operation Regions by Applications Id I D 300 250 200 150
More informationLecture 10 MOSFET (III) MOSFET Equivalent Circuit Models
Lecture 1 MOSFET (III) MOSFET Equivalent Circuit Models Outline Lowfrequency smallsignal equivalent circuit model Highfrequency smallsignal equivalent circuit model Reading Assignment: Howe and Sodini;
More informationMOS Transistor Theory
MOS Transistor Theory So far, we have viewed a MOS transistor as an ideal switch (digital operation) Reality: less than ideal EE 261 Krish Chakrabarty 1 Introduction So far, we have treated transistors
More informationOPERATIONAL AMPLIFIER APPLICATIONS
OPERATIONAL AMPLIFIER APPLICATIONS 2.1 The Ideal Op Amp (Chapter 2.1) Amplifier Applications 2.2 The Inverting Configuration (Chapter 2.2) 2.3 The Non-inverting Configuration (Chapter 2.3) 2.4 Difference
More informationEE105 - Fall 2005 Microelectronic Devices and Circuits
EE105 - Fall 005 Microelectronic Devices and Circuits ecture 7 MOS Transistor Announcements Homework 3, due today Homework 4 due next week ab this week Reading: Chapter 4 1 ecture Material ast lecture
More informationWhereas the diode was a 1-junction device, the transistor contains two junctions. This leads to two possibilities:
Part Recall: two types of charge carriers in semiconductors: electrons & holes two types of doped semiconductors: n-type (favor e-), p-type (favor holes) for conduction Whereas the diode was a -junction
More informationChapter 10 AC Analysis Using Phasors
Chapter 10 AC Analysis Using Phasors 10.1 Introduction We would like to use our linear circuit theorems (Nodal analysis, Mesh analysis, Thevenin and Norton equivalent circuits, Superposition, etc.) to
More informationThe Devices. Digital Integrated Circuits A Design Perspective. Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic. July 30, 2002
Digital Integrated Circuits A Design Perspective Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic The Devices July 30, 2002 Goal of this chapter Present intuitive understanding of device operation Introduction
More informationECE 523/421 - Analog Electronics University of New Mexico Solutions Homework 3
ECE 523/42 - Analog Electronics University of New Mexico Solutions Homework 3 Problem 7.90 Show that when ro is taken into account, the voltage gain of the source follower becomes G v v o v sig R L r o
More informationChapter 5. BJT AC Analysis
Chapter 5. Outline: The r e transistor model CB, CE & CC AC analysis through r e model common-emitter fixed-bias voltage-divider bias emitter-bias & emitter-follower common-base configuration Transistor
More informationMidterm. ESE 570: Digital Integrated Circuits and VLSI Fundamentals. Lecture Outline. Pass Transistor Logic. Restore Output.
ESE 570: Digital Integrated Circuits and VLSI Fundamentals Lec 16: March 21, 2017 Transmission Gates, Euler Paths, Energy Basics Review Midterm! Midterm " Mean: 79.5 " Standard Dev: 14.5 2 Lecture Outline!
More informationTransistor Noise Lecture 10 High Speed Devices
Transistor Noise 1 Transistor Noise A very brief introduction to circuit and transistor noise. I an not an expert regarding noise Maas: Noise in Linear and Nonlinear Circuits Lee: The Design of CMOS RFIC
More informationDC Biasing. Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59
Contents Three States of Operation BJT DC Analysis Fixed-Bias Circuit Emitter-Stabilized Bias Circuit Voltage Divider Bias Circuit DC Bias with Voltage Feedback Various Dierent Bias Circuits pnp Transistors
More information(amperes) = (coulombs) (3.1) (seconds) Time varying current. (volts) =
3 Electrical Circuits 3. Basic Concepts Electric charge coulomb of negative change contains 624 0 8 electrons. Current ampere is a steady flow of coulomb of change pass a given point in a conductor in
More informationEE 330 Lecture 16. MOSFET Modeling CMOS Process Flow
EE 330 Lecture 16 MOSFET Modeling CMOS Process Flow Model Extensions 300 Id 250 200 150 100 50 300 0 0 1 2 3 4 5 Vds Existing Model 250 200 Id 150 100 50 Slope is not 0 0 0 1 2 3 4 Actual Device Vds Model
More informationStudy Notes on Network Theorems for GATE 2017
Study Notes on Network Theorems for GATE 2017 Network Theorems is a highly important and scoring topic in GATE. This topic carries a substantial weight age in GATE. Although the Theorems might appear to
More informationEE105 Fall 2015 Microelectronic Devices and Circuits Frequency Response. Prof. Ming C. Wu 511 Sutardja Dai Hall (SDH)
EE05 Fall 205 Microelectronic Devices and Circuits Frequency Response Prof. Ming C. Wu wu@eecs.berkeley.edu 5 Sutardja Dai Hall (SDH) Amplifier Frequency Response: Lower and Upper Cutoff Frequency Midband
More informationLecture 12 Digital Circuits (II) MOS INVERTER CIRCUITS
Lecture 12 Digital Circuits (II) MOS INVERTER CIRCUITS Outline NMOS inverter with resistor pull-up The inverter NMOS inverter with current-source pull-up Complementary MOS (CMOS) inverter Static analysis
More informationDelhi Noida Bhopal Hyderabad Jaipur Lucknow Indore Pune Bhubaneswar Kolkata Patna Web: Ph:
Serial : ND_EE_NW_Analog Electronics_05088 Delhi Noida Bhopal Hyderabad Jaipur Lucknow ndore Pune Bhubaneswar Kolkata Patna Web: E-mail: info@madeeasy.in Ph: 0-4546 CLASS TEST 08-9 ELECTCAL ENGNEENG Subject
More informationECEN474/704: (Analog) VLSI Circuit Design Spring 2018
ECEN474/704: (Analog) SI Circuit Design Spring 2018 ecture 2: MOS ransistor Modeling Sam Palermo Analog & Mixed-Signal Center exas A&M University Announcements If you haven t already, turn in your 0.18um
More informationECE 145A / 218 C, notes set 3: Two-Port Parameters
class notes, M. odwell, copyrihted 9-4 ECE 45A / 8 C, notes set 3: Two-Port Parameters Mark odwell University of California, anta Barbara rodwell@ece.ucsb.edu 85-893-344, 85-893-36 fax Device Descriptions
More informationMOSFET: Introduction
E&CE 437 Integrated VLSI Systems MOS Transistor 1 of 30 MOSFET: Introduction Metal oxide semiconductor field effect transistor (MOSFET) or MOS is widely used for implementing digital designs Its major
More information