Polytech Montpellier MEA4 M2 EEA Systèmes Microélectroniques. Analog IC Design

Transcription

1 Analo C Desin - Academic year 05/06 - Session 3 04/0/5 Polytech Montellier MEA4 M EEA Systèmes Microélectroniques Analo C Desin From transistor in to current sources Pascal Nouet 05/06 - nouet@lirmm.fr htt:// ntroduction / Backround Small-sinal arameters of the MOS transistor in the active reion ( m and r ds ) are both deendent to the saturation current à MOST in is based on a current source MOS Transistor is a ood current source in the active reion Basic analo stae (e.. a common source amlifier) is based on a air of MOS transistor one used as a voltae to current converter one used as a current source

2 Analo C Desin - Academic year 05/06 - Session 3 04/0/5 Pre-requisites / Content Pre-requisites Good ractice of solvin electrical circuits (Node and Mesh laws) are- and small-sinal models for MOST in stroninversion Content How to set-u a constant ate-source voltae for an MOS Transistor? à basic to advanced voltae references Basic current source ncreasin ut resistance Advanced current sources for stability and lare voltae swin Outline oltae references Elementary self-in schemes Some other elementary self-in schemes Sensitivity to and T C variations Advanced voltae references Current mirror Elementary current mirror Elementary staes for increased ut resistance Other elementary current mirrors Elementary current sources Overview of advanced current sources PMOS current sources

3 Analo C Desin - Academic year 05/06 - Session 3 04/0/5 nitial sizin of elementary self-in schemes Basic statement: a diode-connected MOST is always ed in the active reion (if not in the OFF-state) 3 basic scheme may allow to control the in oint of the MOST: one ull-u diode-connected PMOS transistor one ull-u resistor one quasi-ideal current-source 3 nitial sizin of elementary self-in schemes et s desin the followin circuits to deliver 0.7 under 0µA with 3.3 The internal resistance of the current source will be MΩ. 3 dsn ds dsat 0µA.9 ; n 0. dsat 3.57 n µ ncox n dsat 0. µ Cox.6 60kΩ 0µA dsat 3.57 n µ ncox n.6 ( ).6µA MΩ 7.4µA dsat 3.57 n µ ncox n 3

4 Analo C Desin - Academic year 05/06 - Session 3 04/0/5 Outline oltae references Elementary self-in schemes Some other elementary self-in schemes Sensitivity to and T C variations Advanced voltae references Current mirror Elementary current mirror Elementary staes for increased ut resistance Other elementary current mirrors Elementary current sources Overview of advanced current sources PMOS current sources Alternative self-in schemes Two uts circuits Dual PMOS for ut w.r.t Silicon surface considerations 4

5 Analo C Desin - Academic year 05/06 - Session 3 04/0/5 Outline oltae references Elementary self-in schemes Some other elementary self-in schemes Sensitivity to and T C variations Advanced voltae references Current mirror Elementary current mirror Elementary staes for increased ut resistance Other elementary current mirrors Elementary current sources Overview of advanced current sources PMOS current sources mact of variations µ C ox µ ncox ( ) ( ) t n tn? (µa) n (/0,6) (/,73 ; 5) (/,73 ; 6) m mn v v i v v v mn mn mn + m m m + m ( ) 5

6 Analo C Desin - Academic year 05/06 - Session 3 04/0/5 mact of variations m v v µ nc i v v v. ox? + m m m (µa) ; µ nc ; ox ; ( ) 60 Droite de chare (5) 40 Droite de chare (6) dsat(/0,6) 0 dsat(/) ( ) t mact of variations ds ds µ ncox + ( ) t (µa) ; ds ds? m v v ds i v v v + m m m n (/0,6) 40 +() ; 00k +() ; MOhm 0 +() ; 00k ; ( ) 6

7 Analo C Desin - Academic year 05/06 - Session 3 04/0/5 mact of variations ab #: Desin of a voltae reference Secification: let s desin a basic self-ed MOS circuit to deliver two voltaes equal resectively to -0.8 and -.6. Try to otimize stability for varyin +/- 0% around the nominal value (3.3), ower consumtion and silicon area et s calculate the theoretical sensitivity of both ut s voltae to et s verify the revious value by simulation et s simulate the sensitivity to temerature (-5 C u to 85 C) 7

8 Analo C Desin - Academic year 05/06 - Session 3 04/0/5 Outline oltae references Elementary self-in schemes Some other elementary self-in schemes Sensitivity to and T C variations Advanced voltae references Current mirror Elementary current mirror Elementary staes for increased ut resistance Other elementary current mirrors Elementary current sources Overview of advanced current sources PMOS current sources -indeendent reference voltae Princile: a resistor is used to imlement a local feedback, when ds tends to increase under the ect of a increase, the voltae dro in reduces s3 and limit the current increase. Sizin for a iven value of A : à choice of à sizin of T and T à choice of α à sizin of T 3 and for B A à calculate from kirchoff s law:. s4 s3 + B T 3 3 α T 3 A T 4 4 8

9 Analo C Desin - Academic year 05/06 - Session 3 04/0/5 -indeendent reference voltae How it works? is indeendant of à A deends only of T size and T 3 Assumtion: ds ds à ds3 and ds4 are then identical à 4 α. 3 calculate from kirchoff s law: µ C ox 4 4 & $ $ % 4 α #!. α! " µ C ox 4 4 & α # $! % α + α " B T 3 3 A T α 4 4 Alternative confiurations Stability to can be increased by reducin ds Deliverin two indeendant voltaes Deliverin a voltae w.r.t. T 3 B T 5 D T 3 T 6 C B T T 5 D T 3 T 6 C A T α B T A T T b T a A T b A T a 5 5 α 4 4 9

10 Analo C Desin - Academic year 05/06 - Session 3 04/0/5 ab #: Desin of a voltae reference Secification: let s desin a -indeendent reference voltae to deliver the same uts as in ab# with the same constraints. et s calculate the theoretical sensitivity of both ut s voltae to et s verify the revious values by simulation et s simulate the sensitivity to temerature (-5 C u to 85 C) Outline oltae references Elementary self-in schemes Some other elementary self-in schemes Sensitivity to and T C variations Advanced voltae references Current mirror Elementary current mirror Elementary staes for increased ut resistance Other elementary current mirrors Elementary current sources Overview of advanced current sources PMOS current sources 0

11 Analo C Desin - Academic year 05/06 - Session 3 04/0/5 From Norton (Current) Source to MOS transistor Practical Current Source Norton source deal Current suly (e.. "idc" within simulator) Norton Source (Model) MOST Drain- Source Current r 0 r 0 Norton Current mirrorin rincile i S in s Biasin (are Sinal Analysis): T is saturated è in ds f( s ) f( ) T must be saturated to deliver a constant current à Outut dynamic: ds Small-Sinal Analysis à Outut resistance S / m m.v s r ds v T T s s dsat µ nc ox in v s v s i s r ds λ dsat

12 Analo C Desin - Academic year 05/06 - Session 3 04/0/5 ds (A) Elementary current mirror: ut resistance mact of dsat 5,00E- 0 4,50E- 0 4,00E- 0 ds (µa /) r ds (MΩ) λ( ) dsat (µa) y 0,0044x in S T T s 3,50E- 0 3,00E- 0,50E- 0,00E- 0,50E- 0,00E- 0 ds (µa/) inéaire (ds (µa/)) 5,00E- 0 0,00E+00 ds (µa) 0,00E+00,00E+0 4,00E+0 6,00E+0 8,00E+0,00E+0 ds () Elementary current mirror: ut resistance ds (A) mact of transistor lenth,40e+0,0e+0 rds (Mohms) y 0,093x +,78 in S T T s,00e+0 8,00E+00 6,00E+00 4,00E+00,00E+00 0,00E+00 r ds e( / µm) (µm) + r 0 dsat (A) (µm) 0,00E+00,00E+0 4,00E+0 6,00E+0 8,00E+0,00E+0 ds ()

13 Analo C Desin - Academic year 05/06 - Session 3 04/0/5 ds (A) Elementary current mirror: ut resistance mact of transistor size (/) 4,5 in S 4,0 rds (Mohms) T T s 3,5 3,0,5,0,5,0 0,5 0, / ds () Elementary current mirror: summary mact of dsat Outut resistance is divided by two when current is multilied by two mact of transistor size Outut resistance doubled when transistor lenth is multilied by two (constant /) in T T S s Useful equations orkin with both and lenth constant General case à r ds α i s v s r ds ds ds λ( ) dsat (A) r ds e( / µm) (µm) + r 0 dsat (A) 3

14 Analo C Desin - Academic year 05/06 - Session 3 04/0/5 Outline oltae references Elementary self-in schemes Some other elementary self-in schemes Sensitivity to and T C variations Advanced voltae references Current mirror Elementary current mirror Elementary staes for increased ut resistance Other elementary current mirrors Elementary current sources Overview of advanced current sources PMOS current sources Deenerated source current mirror i S in S / m v m.v s r ds T T v s v s s s s s are-sinal Analysis T always saturated Outut dynamic à saturation of T Small-Sinal Analysis Outut resistance v i S s dsat µ C n ox > + s S S in rds + in ( ) m s 4

15 Analo C Desin - Academic year 05/06 - Session 3 04/0/5 Deenerated source current mirror mact of s 5,0 r (MOhms) 0,0 5,0 y 0,994x + 3,467 50µA T T S 0,0 s s 5,0 0,0 r r ds + ( + m r ds ) s m r ds λ n 000 λ n s(kω) 5 Cascode current mirror i S in S S / m3 m4.v s4 r ds4 T 3 vs v 4 v s4 v T T / m m.v s r ds v s d d d3 d 4 in are-sinal Analysis T and T 3 are saturated, T also Outut dynamic à saturation of Small-Sinal Analysis Outut resistance s dsat µ n C ox S v i S S > + tn in r r m4 ds ds4 5

16 Analo C Desin - Academic year 05/06 - Session 3 04/0/5 Cascode current mirror ds (A) mact of / r (MOhms) / µA S T 3 T T ds () Outline oltae references Elementary self-in schemes Some other elementary self-in schemes Sensitivity to and T C variations Advanced voltae references Current mirror Elementary current mirror Elementary staes for increased ut resistance Other elementary current mirrors Elementary current sources Overview of advanced current sources PMOS current sources 6

17 Analo C Desin - Academic year 05/06 - Session 3 04/0/5 ilson current mirror i x in S / m3 v s4 m4.v s4 r ds4 T 3 vx T T m.v s r ds v s / m d d d 3 d 4 Similar erformance to cascode mirror s dsat µ n C ox Substrate ect: in v in S > tn + S i s vs ( m4 + s4 ) rds rds4 i s m4 r ds r ds4 PMOS Current Mirrors Every NMOS current mirror has a PMOS dual Caracteristics are identical and easy to transose: smin à smax, r T S S T T T T T S T T T 3 T 3 in S S S r r ds in in in r m r ds r ds 7

18 Analo C Desin - Academic year 05/06 - Session 3 04/0/5 Non-symetrical mirrors Different ratio / may be used in the ut branch (enerally X> à ut current hiher than reference current) Same for all transistors means current roortionnal to /: in S in S in S T 3 s T 3 s T T s T T T T : X : X : X Multile uts current mirrors r S S One reference branch may be connected to as many ut branches as recessary for the alication Each ut may deliver a different ratio of current Each ut may have a different ut resistance in > λ S X ; n in S nx S S ; r > n λ n in X. in S S n S nx nx S n n in S S n n r r S S S S in X >. + >. λ λ n n tn + tn in X. in 8

19 Analo C Desin - Academic year 05/06 - Session 3 04/0/5 Overview of ut resistance of elementary current mirors,00e+0 (Ω),00E+09,00E+08 Miroir simle SD SD Cascode ilson,00e+07,00e+06,00e+05,00e+04,00e+03 0,00 0,50,00,50,00,50 3,00 S 3,50 ( ) Outline oltae references Elementary self-in schemes Some other elementary self-in schemes Sensitivity to and T C variations Advanced voltae references Current mirror Elementary current mirror Elementary staes for increased ut resistance Other elementary current mirrors Elementary current sources Overview of advanced current sources PMOS current sources 9

20 Analo C Desin - Academic year 05/06 - Session 3 04/0/5 From current mirrors towards current sources Analo nterated Circuits are based on elementary staes oltae references Current mirrors Current sources Amlifier staes f() Current flowin throuh round or from in S T T T T s deal versus actual current sources S ö OUT 0 Smin ø Outut esistance and dynamics S Sensitivity to and T C s0 Power consumtion S min 0

21 Analo C Desin - Academic year 05/06 - Session 3 04/0/5 esistance in NMOS current sources > T T 3 > tn + T 3 > tn + T : X T T : X T T : X Sizin Outut dynamics à Outut current ( ) à / of T ( ) X à eference current ( in ) à / of T (T 3 ), Outut resistance calculation (e.. ilson Current Source ) i x / m3 v s4 m4.v s4 r ds4 T 3 > tn + m.v s r ds v s / m v x T T ( ) r i ds mv s + rds + m3 mrds v4. i( ) + rds + m3 vs4 : X i ( + A) v ( + A) x ( + ) s m vs Avs m ix m ix vx + rds4 m ( vx & + rds4 + ' m r + m ( i v ) x m4 s4 ( + A) m4 % rds4 # ix m $ ( + A) rds ( + m ) rds

22 Analo C Desin - Academic year 05/06 - Session 3 04/0/5 Transistor in NMOS Current Sources T T T > T T 3 > tn + T 3 > tn + T T T T T : X : X : X Outut dynamics à Outut current ( ) à / of T ( ) X à eference current ( in ) à / of T (T 3 ), T mact of S ö OUT 0 ø OUT min fixe

23 Analo C Desin - Academic year 05/06 - Session 3 04/0/5 esistance in v (> ) i T / m v m.v r ds T µ ncox + ( T tn T ) i Δ Δ m i. v m m ( + ) v + m m m ( + m ) Δ v Transistor in v T 3 (> ) / m3 i T T / m v m.v r ds µ nc µ C + ox ox ( T tn 3 3 T ) ( ) t i m m Δ Δ + m3 m3 i. v m m + 3 m3 m v + Δ 3 m3 v 3

24 Analo C Desin - Academic year 05/06 - Session 3 04/0/5 mact of on Current Sources (A) Δ Δ, T T T 3 Δ Δ,77 T T () mact of on Current Sources (A) Δ Δ, T T Δ Δ,55 T 3 T T () 4

25 Analo C Desin - Academic year 05/06 - Session 3 04/0/5 esistance in and temerature An increase in temerature reduces the saturation current of a transistor,06e+0 (µa),04e+0,0e+0 Polarisation ar résistance (> ) T T,00E+0 9,80E+0 9,60E+0-0,08 %/ C 9,40E+0 9,0E+0 Tem.( C ) - 40,00-0,00 0,00 0,00 40,00 60,00 80,00 esistance in and temerature esistance may also chane with temerature ( TCT. ),5E+0 (µa) 0 + ésistance fixe,0e+0 TCe- 3 / C,05E+0 (> ) T T,00E+0 9,50E+0 9,00E+0 8,50E+0-0,08 %/ C -0,08%/ C -0,57 %/ C 8,00E+0 Tem.( C ) - 40,00-0,00 0,00 0,00 40,00 60,00 80,00 5

26 Analo C Desin - Academic year 05/06 - Session 3 04/0/5 Transistor in and temerature,0e+0,5e+0 NMOS et PMOS exhibits same henomenon (µa) -0, %/ C Polarisation ar constante Polarisation ar avec TCe- 3 / C Polarisation ar PMOS T 3 (> ) T T,0E+0,05E+0,00E+0 9,50E+0 9,00E+0-0,08 %/ C 8,50E+0-0,57 %/ C 8,00E+0 Tem.( C ) - 40,00-0,00 0,00 0,00 40,00 60,00 80,00 Cascode Source and temerature Feedback may imrove results,5e+0 (µa),0e+0,05e+0 Cascode avec et TCe- 3 / C Polarisation ar avec TCe- 3 / C Cascode larisé ar PMOS 0,036 %/ C T 3 T T,00E+0 9,50E+0 9,00E+0 8,50E+0-0,036 %/ C -0,57 %/ C Tem.( C ) - 40,00-0,00 0,00 0,00 40,00 60,00 80,00 T 3 T 3 T T 6

27 Analo C Desin - Academic year 05/06 - Session 3 04/0/5 Outline oltae references Elementary self-in schemes Some other elementary self-in schemes Sensitivity to and T C variations Advanced voltae references Current mirror Elementary current mirror Elementary staes for increased ut resistance Other elementary current mirrors Elementary current sources Overview of advanced current sources PMOS current sources -indeendent current sources Princile: a resistor imlement a feedback that tends to reduce current variations Sizin methods Choice of and α (enerally, 4, 9 or 6) is not sensitive to variations Assumin identical currents in T and T leads to an exression of deendin of, T 5 et T α µ Cox 4 & α # $! % α + α " B T A T T 3 7

28 Analo C Desin - Academic year 05/06 - Session 3 04/0/5 -indeendent current sources Other confiurations Dual circuit in PMOS (current from ) ncreased stability by reduction of ds and ds5 Power consumtion à asymmetrical current mirror T 3 T α 4 4 B T 5 D T T α T 3 T 6 C T A 0. T T 7 - indeendent and increased ut resistance -indeendent à, and T 5 to set value of indeendently of educed ower consumtion à asymmetrical current mirror Hih-voltae oeration à T 3 and T 6 are otional B T T 5 D T 3 T 6 C A 0. T T 7 ncreased à Cascode ut à Problem à ut rane of oeration T c T c T 7c 8

29 Analo C Desin - Academic year 05/06 - Session 3 04/0/5 ncreasin ut dynamic rane Princile T S T 3 s T ds s3 ds d3 s s ds s3. tn tn s3 + tn Trade-off between ut rane of oeration and ut resistance ncreasin ut dynamic rane mlementation: lare-swin cascode current source with -indeendent reference current T 6 T 7 T α ( α > ) + avec B 6 α 7 A T 9 T 5 T T 3 T C

30 Analo C Desin - Academic year 05/06 - Session 3 04/0/5 ncreasin ut dynamic rane: alternative confiurations 5 T 6 T 7 T 8 T 6 T 7 T 8 B A C T T 6 T 7 B T 8 T 9 T 5 A 0. C T T 3 T T 9 T 5 T 3 T Outline oltae references Elementary self-in schemes Some other elementary self-in schemes Sensitivity to and T C variations Advanced voltae references Current mirror Elementary current mirror Elementary staes for increased ut resistance Other elementary current mirrors Elementary current sources Overview of advanced current sources PMOS current sources 30

31 Analo C Desin - Academic year 05/06 - Session 3 04/0/5 Current sources Overview of main characteristics mact of Outut resistance Outut rane of oeration Basic current source ±5% 65kΩ > 0,8 -indeendent current source ±,3% 500kΩ > 0,9 -indeendent current source with cascoded ut ±0,0% 80MΩ > are-swin - indeendent cascoded current source ±9% ±,5% 3,54MΩ 4,88MΩ > 0,3 > 0,3 éférences D. Johns and K. Martin, "Analo nterated Circuit Desin", John iley & Sons, nc. 997, SBN P. Allen and D. Holber, "CMOS Analo Circuit Desin", nd Edition, 00,Oxford University Press, SBN B. azavi, "Desin of Analo CMOS nterated Circuits", McGraw Hill, 00, SBN P. Gray, P. Hurst, S. ewis,and.g. Meyer, Analysis and Desin of Analo nterated Circuits, 4th Edition, John iley and Sons, 00, SBN