RIB. ELECTRICAL ENGINEERING Analog Electronics. 8 Electrical Engineering RIBR T7. Detailed Explanations. Rank Improvement Batch ANSWERS.


 Cornelia O’Brien’
 1 years ago
 Views:
Transcription
1 8 Electrical Engineering RIBR T7 Session 089 S.No. : 9078_LS RIB Rank Improvement Batch ELECTRICL ENGINEERING nalog Electronics NSWERS. (d) 7. (a) 3. (c) 9. (a) 5. (d). (d) 8. (c) 4. (c) 0. (c) 6. (b) 3. (a) 9. (d) 5. (a). (a) 7. (c) 4. (c) 0. (b) 6. (b). (c) 8. (c) 5. (a). (c) 7. (a) 3. (d) 9. (c) 6. (b). (d) 8. (c) 4. (d) 30. (c) Detailed Explanations. (d) (6 m)(6 kω) 36 I 0 6 m 0 K I 0 6 m m 4 m I 0. (d) 00 k 0 k k 99 k
2 RIB8 EE nalog Electronics 9 Set, 0 R then F R 99k where ( ) 99k k so, Now, set k 0 k k 99 k then hence , 0 3. (a) 5 9 I L(max) z(min) 0 k i m 4. (c) For M to operate in saturation; dsi gs tn i 0 i lso, I D kn( gs ) ( ) tn kn gs tn gs gs 5 i 5 i 5 i > i i 6 i 3 Thus, maximum input that can be applied is 3.
3 0 Electrical Engineering 5. (a) The feedback element (R F ) is directly connected to both input and output. So, voltageshunt type of feedback. 6. (b) Since there is a D.C level shift in the output waveform, the circuit must be a clamper circuit and when the diode is conducting, the voltage at the output must be 5 as seen from the output waveform hence option (b) is correct. 7. (a) From the circuit it is clear that D will always be off. Thus kω 0 0 kω 0 kω (0 0.7) 0 kω 0 kω 8. (c) dt RC i t C 50 0 i t C.5 mf 9. (d) For the Hartly oscillator shown, L L 0. (b) For ve half cycle 0 ωt π L or 4 L 48 L L 48 µh L max 48 µh I B 0 sinωt 0k to produce sustained oscillations
4 RIB8 EE nalog Electronics I B 0sinωt D 0 kω I B sinωt m For ve half cycle π ωt π I B 0 sinωt 0k I B 0sinωt 0 kω 0 kω I B sinωt m form here I B sinωt m for all ωt R B I B B 0sinωt 0 kω 3 sinω t 0. (c) 0 0 R kω R kω R 3 50 kω R kω v 0 R 3 50 kω R kω v 0 C 0.0 µ F 0.0 µ F C 0.0 µ F 0.0 µ F figurei figureii alue of R corresponding to figurei is kω and value of R B is 5 kω. alue of R corresponding to figureii is 5kΩ and value of R B is kω. So, kω R 5 kω kω R B 5 kω f max R R C ( ) B
5 Electrical Engineering f max ( ) f max.7 khz. (d) ssume that the gain is very large i.e. v >> thus v for unbypassed R E and for large values of R E R E >> thus, the voltage gain of above circuit will become βrc gmrc re βrc v gmr β R E r βr r 3. (c) now, since β is very large thus, RC v R v 0k Ω kω 5 E E e E e 4 k 50 Ω Ω 0.5 b i b 50 Ω 50 Ω 50 Ω 50 Ω b 3 i b 4.3k and i b 00 for b k b and for b 6
6 RIB8 EE nalog Electronics Regulation Regulation 4.545% 00% 4. (c) Maximum power dissipation P Dmax Tjmax T 0 θ W (θ Thermal resistance) CE I C max P D max I C max (a) Base emitter loop.5 kω 500 kω I C I B IE kω R in 500 ki B 0.7 k (I B I C ) I C 00I B I E 0 I B from here I B 8.88 µ T T 6 β k Ω.38k Ω I I 8.8 C B R in ( β)r E.383k 0 k 0.38 kω 6. (b) Small signal circuit is i R G gs R D 7 kω gs 0 gs R D
7 4 Electrical Engineering gs i i R D W µ ncox I D m L v i R D (a) df f 0.% d 50, 000 d f f d β β 000 β 37.5 β Thus, f (c) Drawing the small signal model of the above circuit, we get R in in R r g π m π π Let R be the input resistance as seen in from point. Thus, to calculate R we can draw the diagram separately I π π R I r π gm
8 RIB8 EE nalog Electronics 5 9. (a) Thus, the value of the output voltage o in (R R ) o g m R rπ in g m D γ R eq kω i 0 eq eq R eq 6 3 kω. 9 i 0; as i > eq, D is ON and the voltage across the diode will be γ. γ i volts. 0. (c) 9 50 kω B I B 0.7 I B R B 0.5 m EC 4.7 kω E C 9 I C I B β 49(0.5) ( I E) m 0.49 m β m 0 µ 50 E I B R B EB (0.0) (50) 0.7. C EC P Q I C R C 9 (0.49)(4.7) (6.697 ) I C EC (0.49)(7.897) mw 3.87 mw
9 6 Electrical Engineering. (a) kω 0 kω i kω kω kω i 0 k Ω 0 k Ω k k 0 Ω Ω i 0( ) 0 i kω k Ω i i so, 0 i 0 i (0sinωt 0cosωt) m i (sinωt) m and i (cosωt) m. (c) We know β 0 sin( ωt 45 ) m β kω 0 Drawing the small signal equivalent, we get Iin R S in R R π π R L R C R eq R E in R I in R S (R R R eq ) in now, to calculate R eq, we can use another model I (I π )R E now, π I I R E I R E I β ( (β )R E )I I R eq π R E π R eq rπ ( β ) RE I
10 RIB8 EE nalog Electronics 7 R in R S [R R ( (β )R E ] putting the values R eq 0 kω kω R in kω 4.6 kω 5.6 kω 3. (d) Since the two port network is symmetric thus converting it into T network we get the circuit as shown below. 0 kω 0 kω I 3 i kω I I kω I 4 I i I k Ω 0 i and I 3 kω i and I 4 I I 3 kω 0 i or, i 0 4. (d) For S < 0 ; Diode is ON, and the positive terminal of opamp is forced to O. 0 S For S > 0; Diode is off and the positive terminal of opamp now follows S since no current flows in resistor, so must follow S. 0 S 5. (d) Let us assume M is in saturation I D W µ n Cox ( gs Th) 00 (0.36) µ L 0.8 I D 00 µ Now, D DD R D I D 0.8 DS ssumption is correct when g.0 s
11 8 Electrical Engineering 06.7 D Drain voltage changes by 34 m. I D 6. (b) Current through photodiode I (0.8) (0) m m I C β I E kω I I 0 I o kω ref I C I 8 m I E ( β ) IC 8.m β 80 β BE 0.7 so, I 0 kω 0.7 m I 0 I E I 8. ( 0.7) m 8.8 m 7. (c) knid m/ now, drawing the T equivalent model, we have R sig /g i m o sig i 0 R D R L i and out sig R gm sig ( R R ) D L R g m sig sig
12 RIB8 EE nalog Electronics 9 8. (c) out gm( RD RL) out sig g R out m sig ( 0 0 ) 0 0 m R 4R i R i R 4 i 4 i 8 i gain i 8 9. (c) MOS T serve as drain resistance for T DD DD T R out out out in T in T Calculating R out of T I x gs gs x pplying KCL at node, I x gs gs x Thus x I x g m R out for transistor T in gs gs R out out out gs R out
13 0 Electrical Engineering gs out in v in R out gm ( R g out m ) 30. (c) CC 0.5 m I 0.5 m Using current mirror concept, For large β, I I ref so, I y ( ) m I x ( ) m I x I y (0.5) 5 m.5 m
Delhi Noida Bhopal Hyderabad Jaipur Lucknow Indore Pune Bhubaneswar Kolkata Patna Web: Ph:
Serial : ND_EE_NW_Analog Electronics_05088 Delhi Noida Bhopal Hyderabad Jaipur Lucknow ndore Pune Bhubaneswar Kolkata Patna Web: Email: info@madeeasy.in Ph: 04546 CLASS TEST 089 ELECTCAL ENGNEENG Subject
More informationAt point G V = = = = = = RB B B. IN RB f
Common Emitter At point G CE RC 0. 4 12 0. 4 116. I C RC 116. R 1k C 116. ma I IC 116. ma β 100 F 116µ A I R ( 116µ A)( 20kΩ) 2. 3 R + 2. 3 + 0. 7 30. IN R f Gain in Constant Current Region I I I C F
More informationHomework Assignment 08
Homework Assignment 08 Question 1 (Short Takes) Two points each unless otherwise indicated. 1. Give one phrase/sentence that describes the primary advantage of an active load. Answer: Large effective resistance
More informationHomework Assignment 09
Homework Assignment 09 Question 1 (Short Takes) Two points each unless otherwise indicated. 1. What is the 3dB bandwidth of the amplifier shown below if r π = 2.5K, r o = 100K, g m = 40 ms, and C L =
More informationLecture 050 Followers (1/11/04) Page ECE Analog Integrated Circuits and Systems II P.E. Allen
Lecture 5 Followers (1/11/4) Page 51 LECTURE 5 FOLLOWERS (READING: GHLM 344362, AH 221226) Objective The objective of this presentation is: Show how to design stages that 1.) Provide sufficient output
More informationESE319 Introduction to Microelectronics. Output Stages
Output Stages Power amplifier classification Class A amplifier circuits Class A Power conversion efficiency Class B amplifier circuits Class B Power conversion efficiency Class AB amplifier circuits Class
More informationECE 523/421  Analog Electronics University of New Mexico Solutions Homework 3
ECE 523/42  Analog Electronics University of New Mexico Solutions Homework 3 Problem 7.90 Show that when ro is taken into account, the voltage gain of the source follower becomes G v v o v sig R L r o
More informationFinal Exam. 55:041 Electronic Circuits. The University of Iowa. Fall 2013.
Final Exam Name: Max: 130 Points Question 1 In the circuit shown, the opamp is ideal, except for an input bias current I b = 1 na. Further, R F = 10K, R 1 = 100 Ω and C = 1 μf. The switch is opened at
More information55:041 Electronic Circuits The University of Iowa Fall Final Exam
Final Exam Name: Score Max: 135 Question 1 (1 point unless otherwise noted) a. What is the maximum theoretical efficiency for a classb amplifier? Answer: 78% b. The abbreviation/term ESR is often encountered
More informationESE319 Introduction to Microelectronics. BJT Biasing Cont.
BJT Biasing Cont. Biasing for DC Operating Point Stability BJT Bias Using Emitter Negative Feedback Single Supply BJT Bias Scheme Constant Current BJT Bias Scheme Rule of Thumb BJT Bias Design 1 Simple
More informationChapter 13 SmallSignal Modeling and Linear Amplification
Chapter 13 SmallSignal Modeling and Linear Amplification Microelectronic Circuit Design Richard C. Jaeger Travis N. Blalock 1/4/12 Chap 131 Chapter Goals Understanding of concepts related to: Transistors
More informationEE 321 Analog Electronics, Fall 2013 Homework #8 solution
EE 321 Analog Electronics, Fall 2013 Homework #8 solution 5.110. The following table summarizes some of the basic attributes of a number of BJTs of different types, operating as amplifiers under various
More informationCircle the one best answer for each question. Five points per question.
ID # NAME EE255 EXAM 3 November 8, 2001 Instructor (circle one) Talavage Gray This exam consists of 16 multiple choice questions and one workout problem. Record all answers to the multiple choice questions
More informationID # NAME. EE255 EXAM 3 April 7, Instructor (circle one) Ogborn Lundstrom
ID # NAME EE255 EXAM 3 April 7, 1998 Instructor (circle one) Ogborn Lundstrom This exam consists of 20 multiple choice questions. Record all answers on this page, but you must turn in the entire exam.
More informationTransistor Characteristics and A simple BJT Current Mirror
Transistor Characteristics and A simple BJT Current Mirror Currentoltage (I) Characteristics Device Under Test DUT i v T T 1 R X R X T for test Independent variable on horizontal axis Could force current
More informationElectronics II. Midterm #2
The University of Toledo EECS:3400 Electronics I su4ms_elct7.fm Section Electronics II Midterm # Problems Points. 8. 7 3. 5 Total 0 Was the exam fair? yes no The University of Toledo su4ms_elct7.fm Problem
More informationECE343 Test 2: Mar 21, :008:00, Closed Book. Name : SOLUTION
ECE343 Test 2: Mar 21, 2012 6:008:00, Closed Book Name : SOLUTION 1. (25 pts) (a) Draw a circuit diagram for a differential amplifier designed under the following constraints: Use only BJTs. (You may
More informationElectronics II. Final Examination
The University of Toledo f17fs_elct27.fm 1 Electronics II Final Examination Problems Points 1. 11 2. 14 3. 15 Total 40 Was the exam fair? yes no The University of Toledo f17fs_elct27.fm 2 Problem 1 11
More informationSeries & Parallel Resistors 3/17/2015 1
Series & Parallel Resistors 3/17/2015 1 Series Resistors & Voltage Division Consider the singleloop circuit as shown in figure. The two resistors are in series, since the same current i flows in both
More informationEE 330 Lecture 22. Small Signal Modelling Operating Points for Amplifier Applications Amplification with Transistor Circuits
EE 330 Lecture 22 Small Signal Modelling Operating Points for Amplifier Applications Amplification with Transistor Circuits Exam 2 Friday March 9 Exam 3 Friday April 13 Review Session for Exam 2: 6:00
More informationECE2210 Final given: Spring 08
ECE Final given: Spring 0. Note: feel free to show answers & work right on the schematic 1. (1 pts) The ammeter, A, reads 30 ma. a) The power dissipated by R is 0.7 W, what is the value of R. Assume that
More informationU1 is zero based because its noninverting terminal is connected to circuit common. Therefore, the circuit reference voltage is 0 V.
When you have completed this exercise, you will be able to operate a zenerclamped op amp comparator circuit using dc and ac voltages. You will verify your results with an oscilloscope. U1 is zero based
More informationBiasing the CE Amplifier
Biasing the CE Amplifier Graphical approach: plot I C as a function of the DC baseemitter voltage (note: normally plot vs. base current, so we must return to EbersMoll): I C I S e V BE V th I S e V th
More informationMICROELECTRONIC CIRCUIT DESIGN Second Edition
MICROELECTRONIC CIRCUIT DESIGN Second Edition Richard C. Jaeger and Travis N. Blalock Answers to Selected Problems Updated 10/23/06 Chapter 1 1.3 1.52 years, 5.06 years 1.5 2.00 years, 6.65 years 1.8 113
More informationVidyalankar S.E. Sem. III [EXTC] Analog Electronics  I Prelim Question Paper Solution
. (a) S.E. Sem. [EXTC] Analog Electronics  Prelim Question Paper Solution Comparison between BJT and JFET BJT JFET ) BJT is a bipolar device, both majority JFET is an unipolar device, electron and minority
More informationClass AB Output Stage
Class AB Output Stage Class AB amplifier Operation Multisim Simulation  VTC Class AB amplifier biasing Widlar current source Multisim Simulation  Biasing 1 Class AB Operation v I V B (set by V B ) Basic
More informationCARLETON UNIVERSITY. FINAL EXAMINATION December DURATION 3 HOURS No. of Students 130
ALETON UNIVESITY FINAL EXAMINATION December 005 DUATION 3 HOUS No. of Students 130 Department Name & ourse Number: Electronics ELE 3509 ourse Instructor(s): Prof. John W. M. ogers and alvin Plett AUTHOIZED
More informationLecture 37: Frequency response. Context
EECS 05 Spring 004, Lecture 37 Lecture 37: Frequency response Prof J. S. Smith EECS 05 Spring 004, Lecture 37 Context We will figure out more of the design parameters for the amplifier we looked at in
More informationECE343 Test 1: Feb 10, :008:00pm, Closed Book. Name : SOLUTION
ECE343 Test : Feb 0, 00 6:008:00pm, Closed Book Name : SOLUTION C Depl = C J0 + V R /V o ) m C Diff = τ F g m ω T = g m C µ + C π ω T = g m I / D C GD + C or V OV GS b = τ i τ i = R i C i ω H b Z = Z
More informationEE 230 Lecture 33. Nonlinear Circuits and Nonlinear Devices. Diode BJT MOSFET
EE 230 Lecture 33 Nonlinear Circuits and Nonlinear Devices Diode BJT MOSFET Review from Last Time: nchannel MOSFET Source Gate L Drain W L EFF Poly Gate oxide nactive psub depletion region (electrically
More informationElectronics II. Midterm II
The University of Toledo f4ms_elct7.fm  Section Electronics II Midterm II Problems Points. 7. 7 3. 6 Total 0 Was the exam fair? yes no The University of Toledo f4ms_elct7.fm  Problem 7 points Given in
More informationDesign of Analog Integrated Circuits
Design of Analog Integrated Circuits Chapter 11: Introduction to Switched Capacitor Circuits Textbook Chapter 13 13.1 General Considerations 13.2 Sampling Switches 13.3 SwitchedCapacitor Amplifiers 13.4
More informationEE 321 Analog Electronics, Fall 2013 Homework #3 solution
EE 32 Analog Electronics, Fall 203 Homework #3 solution 2.47. (a) Use superposition to show that the output of the circuit in Fig. P2.47 is given by + [ Rf v N + R f v N2 +... + R ] f v Nn R N R N2 R [
More informationElectronic Circuits Summary
Electronic Circuits Summary Andreas Biri, DITET 6.06.4 Constants (@300K) ε 0 = 8.854 0 F m m 0 = 9. 0 3 kg k =.38 0 3 J K = 8.67 0 5 ev/k kt q = 0.059 V, q kt = 38.6, kt = 5.9 mev V Small Signal Equivalent
More informationRefinements to Incremental Transistor Model
Refinements to Incremental Transistor Model This section presents modifications to the incremental models that account for nonideal transistor behavior Incremental output port resistance Incremental changes
More informationEE105 Fall 2014 Microelectronic Devices and Circuits
EE05 Fall 204 Microelectronic Devices and Circuits Prof. Ming C. Wu wu@eecs.berkeley.edu 5 Sutardja Dai Hall (SDH) Terminal Gain and I/O Resistances of BJT Amplifiers Emitter (CE) Collector (CC) Base (CB)
More informationSinusoidal Steady State Analysis (AC Analysis) Part II
Sinusoidal Steady State Analysis (AC Analysis) Part II Amin Electronics and Electrical Communications Engineering Department (EECE) Cairo University elc.n102.eng@gmail.com http://scholar.cu.edu.eg/refky/
More informationMicroelectronic Circuit Design 4th Edition Errata  Updated 4/4/14
Chapter Text # Inside back cover: Triode region equation should not be squared! i D = K n v GS "V TN " v & DS % ( v DS $ 2 ' Page 49, first exercise, second answer: 1.35 x 10 6 cm/s Page 58, last exercise,
More informationUniversity of Pittsburgh
University of Pittsburgh Experiment #8 Lab Report The Bipolar Junction Transistor: Characteristics and Models Submission Date: 11/6/2017 Instructors: Dr. Minhee Yun John Erickson Yanhao Du Submitted By:
More informationSection 1: Common Emitter CE Amplifier Design
ECE 3274 BJT amplifier design CE, CE with Ref, and CC. Richard Cooper Section 1: CE amp Re completely bypassed (open Loop) Section 2: CE amp Re partially bypassed (gain controlled). Section 3: CC amp (open
More informationENGN3227 Analogue Electronics. Problem Sets V1.0. Dr. Salman Durrani
ENGN3227 Analogue Electronics Problem Sets V1.0 Dr. Salman Durrani November 2006 Copyright c 2006 by Salman Durrani. Problem Set List 1. Opamp Circuits 2. Differential Amplifiers 3. Comparator Circuits
More informationCHAPTER.4: Transistor at low frequencies
CHAPTER.4: Transistor at low frequencies Introduction Amplification in the AC domain BJT transistor modeling The re Transistor Model The Hybrid equivalent Model Introduction There are three models commonly
More informationChapter 3 Output stages
Chapter 3 utput stages 3.. Goals and properties 3.. Goals and properties deliver power into the load with good efficacy and small power dissipate on the final transistors small output impedance maximum
More informationV = = A = ln V
Chapter Problem Solutions. a. b. c. γ + γ + BE + C + + γ + ( γ ( γ C γ + BE + BE γ BE and C γ ( γ + or C BE + C ma.5 kω.7 ( ma + 4. kω.5 kω C. (a ln C BE T S (i μ 6 A,.6 ln.588 μa C BE 4 (ii μ 6 A,.6 ln.5987
More informationChapter 11 AC and DC Equivalent Circuit Modeling of the Discontinuous Conduction Mode
Chapter 11 AC and DC Equivalent Circuit Modeling of the Discontinuous Conduction Mode Introduction 11.1. DCM Averaged Switch Model 11.2. SmallSignal AC Modeling of the DCM Switch Network 11.3. HighFrequency
More informationMod. Sim. Dyn. Sys. Amplifiers page 1
AMPLIFIERS A circuit containing only capacitors, amplifiers (transistors) and resistors may resonate. A circuit containing only capacitors and resistors may not. Why does amplification permit resonance
More informationQuick Review. ESE319 Introduction to Microelectronics. and Q1 = Q2, what is the value of V Odm. If R C1 = R C2. s.t. R C1. Let Q1 = Q2 and R C1
Quick Review If R C1 = R C2 and Q1 = Q2, what is the value of V Odm? Let Q1 = Q2 and R C1 R C2 s.t. R C1 > R C2, express R C1 & R C2 in terms R C and ΔR C. If V Odm is the differential output offset
More informationOperational Amplifiers
Operational Amplifiers A Linear IC circuit Operational Amplifier (opamp) An opamp is a highgain amplifier that has high input impedance and low output impedance. An ideal opamp has infinite gain and
More informationS.E. Sem. III [ETRX] Electronic Circuits and Design I
S.E. Sem. [ETRX] Electronic ircuits and Design Time : 3 Hrs.] Prelim Paper Solution [Marks : 80 Q.1(a) What happens when diode is operated at high frequency? [5] Ans.: Diode High Frequency Model : This
More informationDEPARTMENT OF ECE UNIT VII BIASING & STABILIZATION AMPLIFIER:
UNIT VII IASING & STAILIZATION AMPLIFIE:  A circuit that increases the amplitude of given signal is an amplifier  Small ac signal applied to an amplifier is obtained as large a.c. signal of same frequency
More information5. EXPERIMENT 5. JFET NOISE MEASURE MENTS
5. EXPERIMENT 5. JFET NOISE MEASURE MENTS 5.1 Object The objects of this experiment are to measure the spectral density of the noise current output of a JFET, to compare the measured spectral density
More informationMod. Sim. Dyn. Sys. Amplifiers page 1
AMPLIFIERS A circuit containing only capacitors, amplifiers (transistors) and resistors may resonate. A circuit containing only capacitors and resistors may not. Why does amplification permit resonance
More informationECE Circuit Theory. Final Examination. December 5, 2008
ECE 212 H1F Pg 1 of 12 ECE 212  Circuit Theory Final Examination December 5, 2008 1. Policy: closed book, calculators allowed. Show all work. 2. Work in the provided space. 3. The exam has 3 problems
More informationSolved Problems. Electric Circuits & Components. 11 Write the KVL equation for the circuit shown.
Solved Problems Electric Circuits & Components 11 Write the KVL equation for the circuit shown. 12 Write the KCL equation for the principal node shown. 12A In the DC circuit given in Fig. 1, find (i)
More informationLecture 06: Current Mirrors
Lecture 06: Current Mirrors Analog IC Design Dr. Ryan Robucci Department of Computer Science and Electrical Engineering, UMBC Spring 2015 Dr. Ryan Robucci Lecture VI 1 / 26 Lowered Resistance Looking into
More informationFigure Circuit for Question 1. Figure Circuit for Question 2
Exercises 10.7 Exercises Multiple Choice 1. For the circuit of Figure 10.44 the time constant is A. 0.5 ms 71.43 µs 2, 000 s D. 0.2 ms 4 Ω 2 Ω 12 Ω 1 mh 12u 0 () t V Figure 10.44. Circuit for Question
More informationECE Analog Integrated Circuit Design  II P.E. Allen
Lecture 290 Feedback Analysis using Return Ratio (3/20/02) Page 2901 LECTURE 290 FEEDBACK CIRCUIT ANALYSIS USING RETURN RATIO (READING: GHLM 599613) Objective The objective of this presentation is: 1.)
More informationChapter 2. Engr228 Circuit Analysis. Dr Curtis Nelson
Chapter 2 Engr228 Circuit Analysis Dr Curtis Nelson Chapter 2 Objectives Understand symbols and behavior of the following circuit elements: Independent voltage and current sources; Dependent voltage and
More informationE40M Review  Part 1
E40M Review Part 1 Topics in Part 1 (Today): KCL, KVL, Power Devices: V and I sources, R Nodal Analysis. Superposition Devices: Diodes, C, L Time Domain Diode, C, L Circuits Topics in Part 2 (Wed): MOSFETs,
More informationECE2210 Final given: Fall 13
ECE22 Final given: Fall 3. (23 pts) a) Draw the asymptotic Bode plot (the straightline approximation) of the transfer function below. Accurately draw it on the graph provided. You must show the steps
More informationLecture 7: Transistors and Amplifiers
Lecture 7: Transistors and Amplifiers Hybrid Transistor Model for small AC : The previous model for a transistor used one parameter (β, the current gain) to describe the transistor. doesn't explain many
More informationECE3050 Assignment 7
ECE3050 Assignment 7. Sketch and label the Bode magnitude and phase plots for the transfer functions given. Use loglog scales for the magnitude plots and linearlog scales for the phase plots. On the magnitude
More informationIndustrial Technology: Electronic Technology Crosswalk to AZ Math Standards
Page 1 of 1 August 1998 1MP1 Compare and contrast the real number system and its various subsystems with regard to their structural characteristics. PO 2 PO 3 2.0 Apply mathematics calculations. 2.1 Apply
More informationVI. Transistor amplifiers: Biasing and Small Signal Model
VI. Transistor amplifiers: iasing and Small Signal Model 6.1 Introduction Transistor amplifiers utilizing JT or FET are similar in design and analysis. Accordingly we will discuss JT amplifiers thoroughly.
More informationLecture 140 Simple Op Amps (2/11/02) Page 1401
Lecture 40 Simple Op Amps (2//02) Page 40 LECTURE 40 SIMPLE OP AMPS (READING: TextGHLM 425434, 453454, AH 249253) INTRODUCTION The objective of this presentation is:.) Illustrate the analysis of BJT and
More informationDC Biasing. Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15Mar / 59
Contents Three States of Operation BJT DC Analysis FixedBias Circuit EmitterStabilized Bias Circuit Voltage Divider Bias Circuit DC Bias with Voltage Feedback Various Dierent Bias Circuits pnp Transistors
More informationECE2262 Electric Circuits. Chapter 4: Operational Amplifier (OPAMP) Circuits
ECE2262 Electric Circuits Chapter 4: Operational Amplifier (OPAMP) Circuits 1 4.1 Operational Amplifiers 2 4. Voltages and currents in electrical circuits may represent signals and circuits can perform
More informationHomework 6 Solutions and Rubric
Homework 6 Solutions and Rubric EE 140/40A 1. KW Tube Amplifier b) Load Resistor e) Commoncathode a) Input Diff Pair f) CathodeFollower h) Positive Feedback c) Tail Resistor g) Cc d) Av,cm = 1/ Figure
More informationMetalOxideSemiconductor Field Effect Transistor (MOSFET)
MetalOxideSemiconductor ield Effect Transistor (MOSET) Source Gate Drain p p n substrate  SUB MOSET is a symmetrical device in the most general case (for example, in an integrating circuit) In a separate
More informationSmall Signal Model. S. Sivasubramani EE101 Small Signal  Diode
Small Signal Model i v Small Signal Model i I D i d i D v d v D v V D Small Signal Model Mathematical Analysis V D  DC value v d  ac signal v D  Total signal (DC ac signal) Diode current and voltage
More informationECEN 325 Electronics
ECEN 325 Electronics Operational Amplifiers Dr. Aydın İlker Karşılayan Texas A&M University Department of Electrical and Computer Engineering Opamp Terminals positive supply inverting input terminal non
More informationMassachusetts Institute of Technology Department of Electrical Engineering and Computer Science Circuits & Electronics Spring 2007.
Massachusetts Institute of Technology Department of Electrical Engineering and Computer Science 6.002 Circuits & Electronics Spring 2007 Quiz #2 25 April 2007 Name: There are 20 pages in this quiz, including
More informationThe equivalent model of a certain op amp is shown in the figure given below, where R 1 = 2.8 MΩ, R 2 = 39 Ω, and A =
The equivalent model of a certain op amp is shown in the figure given below, where R 1 = 2.8 MΩ, R 2 = 39 Ω, and A = 10 10 4. Section Break Difficulty: Easy Learning Objective: Understand how real operational
More informationEECS 105: FALL 06 FINAL
University of California College of Engineering Department of Electrical Engineering and Computer Sciences Jan M. Rabaey TuTh 23:30 Wednesday December 13, 12:303:30pm EECS 105: FALL 06 FINAL NAME Last
More information55:041 Electronic Circuits The University of Iowa Fall Exam 2
Exam 2 Name: Score /60 Question 1 One point unless indicated otherwise. 1. An engineer measures the (step response) rise time of an amplifier as t r = 0.35 μs. Estimate the 3 db bandwidth of the amplifier.
More informationSolution: Based on the slope of q(t): 20 A for 0 t 1 s dt = 0 for 3 t 4 s. 20 A for 4 t 5 s 0 for t 5 s 20 C. t (s) 20 C. i (A) Fig. P1.
Problem 1.24 The plot in Fig. P1.24 displays the cumulative charge q(t) that has entered a certain device up to time t. Sketch a plot of the corresponding current i(t). q 20 C 0 1 2 3 4 5 t (s) 20 C Figure
More informationmith College Computer Science CSC270 Spring 16 Circuits and Systems Lecture Notes Week 3 Dominique Thiébaut
mith College Computer Science CSC270 Spring 16 Circuits and Systems Lecture Notes Week 3 Dominique Thiébaut dthiebaut@smith.edu Crash Course in Electricity and Electronics Zero Physics background expected!
More informationECE 304: Design Issues for Voltage Follower as Output Stage S&S Chapter 14, pp
ECE 34: Design Issues for oltage Follower as Output Stage S&S Chapter 14, pp. 131133 Introduction The voltage follower provides a good buffer between a differential amplifier and a load in two ways: 1.
More informationGATEFORUM India s No.1 institute for GATE training 1
EEGATE03 PAPER Q. No. 5 Carry One Mark Each. Given a vector field F = y xax yzay = x a z, the line integral F.dl evaluated along a segment on the xaxis from x= to x= is .33 (B) 0.33 (D) 7 : (B) x 0.
More informationPOLYTECHNIC UNIVERSITY Electrical Engineering Department. EE SOPHOMORE LABORATORY Experiment 2 DC circuits and network theorems
POLYTECHNIC UNIVERSITY Electrical Engineering Department EE SOPHOMORE LABORATORY Experiment 2 DC circuits and network theorems Modified for Physics 18, Brooklyn College I. Overview of Experiment In this
More informationElectronic Circuits. Prof. Dr. Qiuting Huang Integrated Systems Laboratory
Electronic Circuits Prof. Dr. Qiuting Huang 6. Transimpedance Amplifiers, Voltage Regulators, Logarithmic Amplifiers, AntiLogarithmic Amplifiers Transimpedance Amplifiers Sensing an input current ii in
More informationECE 6412, Spring Final Exam Page 1 FINAL EXAMINATION NAME SCORE /120
ECE 6412, Spring 2002 Final Exam Page 1 FINAL EXAMINATION NAME SCORE /120 Problem 1O 2O 3 4 5 6 7 8 Score INSTRUCTIONS: This exam is closed book with four sheets of notes permitted. The exam consists of
More informationElectronics and Communication Exercise 1
Electronics and Communication Exercise 1 1. For matrices of same dimension M, N and scalar c, which one of these properties DOES NOT ALWAYS hold? (A) (M T ) T = M (C) (M + N) T = M T + N T (B) (cm)+ =
More informationECE342 Test 3: Nov 30, :008:00, Closed Book. Name : Solution
ECE342 Test 3: Nov 30, 2010 6:008:00, Closed Book Name : Solution All solutions must provide units as appropriate. Unless otherwise stated, assume T = 300 K. 1. (25 pts) Consider the amplifier shown
More informationProf. Shayla Sawyer CP08 solution
What does the time constant represent in an exponential function? How do you define a sinusoid? What is impedance? How is a capacitor affected by an input signal that changes over time? How is an inductor
More informationECE 6412, Spring Final Exam Page 1
ECE 64, Spring 005 Final Exam Page FINAL EXAMINATION SOLUTIONS (Average score = 89/00) Problem (0 points This problem is required) A comparator consists of an amplifier cascaded with a latch as shown below.
More informationThe CommonEmitter Amplifier
c Copyright 2009. W. Marshall Leach, Jr., Professor, Georgia Institute of Technology, School of Electrical and Computer Engineering. The CommonEmitter Amplifier Basic Circuit Fig. shows the circuit diagram
More informationPhasors: Impedance and Circuit Anlysis. Phasors
Phasors: Impedance and Circuit Anlysis Lecture 6, 0/07/05 OUTLINE Phasor ReCap Capacitor/Inductor Example Arithmetic with Complex Numbers Complex Impedance Circuit Analysis with Complex Impedance Phasor
More informationEE105 Fall 2015 Microelectronic Devices and Circuits Frequency Response. Prof. Ming C. Wu 511 Sutardja Dai Hall (SDH)
EE05 Fall 205 Microelectronic Devices and Circuits Frequency Response Prof. Ming C. Wu wu@eecs.berkeley.edu 5 Sutardja Dai Hall (SDH) Amplifier Frequency Response: Lower and Upper Cutoff Frequency Midband
More informationSOME USEFUL NETWORK THEOREMS
APPENDIX D SOME USEFUL NETWORK THEOREMS Introduction In this appendix we review three network theorems that are useful in simplifying the analysis of electronic circuits: Thévenin s theorem Norton s theorem
More informationECE 201 Fall 2009 Final Exam
ECE 01 Fall 009 Final Exam December 16, 009 Division 0101: Tan (11:30am) Division 001: Clark (7:30 am) Division 0301: Elliott (1:30 pm) Instructions 1. DO NOT START UNTIL TOLD TO DO SO.. Write your Name,
More informationEE100Su08 Lecture #9 (July 16 th 2008)
EE100Su08 Lecture #9 (July 16 th 2008) Outline HW #1s and Midterm #1 returned today Midterm #1 notes HW #1 and Midterm #1 regrade deadline: Wednesday, July 23 rd 2008, 5:00 pm PST. Procedure: HW #1: Bart
More informationAmplifiers, Source followers & Cascodes
Amplifiers, Source followers & Cascodes Willy Sansen KULeuven, ESATMICAS Leuven, Belgium willy.sansen@esat.kuleuven.be Willy Sansen 005 02 Operational amplifier Differential pair v : B v + Current mirror
More informationECE137B Final Exam. There are 5 problems on this exam and you have 3 hours There are pages 119 in the exam: please make sure all are there.
ECE37B Final Exam There are 5 problems on this exam and you have 3 hours There are pages 9 in the exam: please make sure all are there. Do not open this exam until told to do so Show all work: Credit
More informationECE 546 Lecture 11 MOS Amplifiers
ECE 546 Lecture MOS Amplifiers Spring 208 Jose E. SchuttAine Electrical & Computer Engineering University of Illinois jesa@illinois.edu ECE 546 Jose Schutt Aine Amplifiers Definitions Used to increase
More informationGeneral Purpose Transistors
General Purpose Transistors NPN and PNP Silicon These transistors are designed for general purpose amplifier applications. They are housed in the SOT 33/SC which is designed for low power surface mount
More informationEE292: Fundamentals of ECE
EE292: Fundamentals of ECE Fall 2012 TTh 10:0011:15 SEB 1242 Lecture 4 120906 http://www.ee.unlv.edu/~b1morris/ee292/ 2 Outline Review Voltage Divider Current Divider NodeVoltage Analysis 3 Network Analysis
More informationElectronics II. Midterm #2
The University of Toledo EECS:3400 Electronics I Section sums_elct7.fm  StudentName Electronics II Midterm # Problems Points. 8. 3. 7 Total 0 Was the exam fair? yes no The University of Toledo sums_elct7.fm
More informationBasics of Network Theory (PartI)
Basics of Network Theory (PartI). A square waveform as shown in figure is applied across mh ideal inductor. The current through the inductor is a. wave of peak amplitude. V 0 0.5 t (m sec) [Gate 987: Marks]
More information