Lecture 14: Electrical Noise

Size: px
Start display at page:

Download "Lecture 14: Electrical Noise"

Transcription

1 EECS 142 Lecture 14: Electrical Noise Prof. Ali M. Niknejad University of California, Berkeley Copyright c 2008 by Ali M. Niknejad A.M.Niknejad University of California, Berkeley EECS 142 Lecture 14 p.1/20

2 Introduction to Noise v o (t) t All electronic amplifiers generate noise. This noise originates from the random thermal motion of carriers and the discreteness of charge. Noise signals are random and must be treated by statistical means. Even though we cannot predict the actual noise waveform, we can predict the statistics such as the mean (average) and variance. A.M.Niknejad University of California, Berkeley EECS 142 Lecture 14 p.2/20

3 Noise Power The average value of the noise waveform is zero v n (t) =<v n (t) >= 1 T T v n (t)dt =0 The mean is also zero if we freeze time and take an infinite number of samples from identical amplifiers. The variance, though, is non-zero. Equivalently, we may say that the signal power is non-zero v n (t) 2 = 1 T T v 2 n(t)dt 0 The RMS (root-mean-square) voltage is given by v n,rms = v n (t) 2 A.M.Niknejad University of California, Berkeley EECS 142 Lecture 14 p.3/20

4 Power Spectrum of Noise S(ω) white noise is flat ω The power spectrum of the noise shows the concentration of noise power at any given frequency. Many noise sources are white in that the spectrum is flat (up to extremely high frequencies) In such cases the noise waveform is totally unpredictable as a function of time. In other words, there is absolutely no correlation between the noise waveform at time t 1 and some later time t 1 + δ, no matter how small we make δ. A.M.Niknejad University of California, Berkeley EECS 142 Lecture 14 p.4/20

5

6

7

8

9

10

11

12

13

14

15

16 Formulation of the problem Shot noise in a p-n junction Thermal Noise in a p-n junction But

17 Statistical Derivation: Forward/Reverse Current Decomposition Independent and so treated separately for noise Arrival of electron (hole) modeled with a Poisson process with arrival rate of λ. Variance (and the mean) of a Poisson process is proportional to its rate Using Carson s Rules for this process we obtain: λ

18 A Closer Look Shot noise at zero bias is same as Johnson noise (junction is at Thermal Eqilibrium) With applied bias, the forward or reverse components dominate and we end up with the shot-noise equation again

19 Noise of a resistor Thermal noise as a two-sided shot noise: Assume a shorted resistor with just random diffusive motion The concentration of carriers is set by electrons in conduction band rather than barrier height Again we will have a Poisson process with the arrival rate being a function of concentration, diffusion constant and length of travel. Noise Spectrum = 2q (I r +I f )

20 Decomposition of F/R Current in a resistor Diffusion Currents (Brownian Motion Current)

21 References: Van der Ziel, A., "Theory of Shot Noise in Junction Diodes and Junction Transistors," Proceedings of the IRE, vol.43, no.11, pp , Nov Van der Ziel, A., "Noise in solid-state devices and lasers," Proceedings of the IEEE, vol.58, no.8, pp , Aug Sarpeshkar, R.; Delbruck, T.; Mead, C.A., "White noise in MOS transistors and resistors," Circuits and Devices Magazine, IEEE, vol.9, no.6, pp.23-29, Nov 1993 Rolf Landaeur, Solid-state shot noise, Phys. Rev., Issue 24 June 1993.

22 Thermal Noise of a Resistor R v 2 n G i 2 n All resistors generate noise. The noise power generated by a resistor R can be represented by a series voltage source with mean square value v 2 n v 2 n =4kTRB Equivalently, we can represent this with a current source in shunt i 2 n =4kTGB A.M.Niknejad University of California, Berkeley EECS 142 Lecture 14 p.5/20

23 Resistor Noise Example Here B is the bandwidth of observation and kt is Boltzmann s constant times the temperature of observation This result comes from thermodynamic considerations, thus explaining the appearance of kt Often we speak of the spot noise, or the noise in a specific narrowband δf vn 2 =4kTRδf Since the noise is white, the shape of the noise spectrum is determined by the external elements (L s and C s) A.M.Niknejad University of California, Berkeley EECS 142 Lecture 14 p.6/20

24 Resistor Noise Example Suppose that R = 10kΩ and T =20 C = 293K. 4kT = vn 2 = B v n,rms = v n (t) 2 = B If we limit the bandwidth of observation to B =10 6 MHz, then we have v n,rms 13μV This represents the limit for the smallest voltage we can resolve across this resistor in this bandwidth A.M.Niknejad University of California, Berkeley EECS 142 Lecture 14 p.7/20

25 Combination of Resistors If we put two resistors in series, then the mean square noise voltage is given by v 2 n =4kT(R 1 + R 2 )B = v 2 n1 + v2 n2 The noise powers add, not the noise voltages Likewise, for two resistors in parallel, we can add the mean square currents i 2 n =4kT(G 1 + G 2 )B = i 2 n1 + i2 n2 This holds for any pair of independent noise sources (zero correlation) A.M.Niknejad University of California, Berkeley EECS 142 Lecture 14 p.8/20

26 Resistive Circuits R 1 R 2 R T v 2 Tn V S R 3 R L R L V T,s For an arbitrary resistive circuit, we can find the equivalent noise by using a Thevenin (Norton) equivalent circuit or by transforming all noise sources to the output by the appropriate power gain (e.g. voltage squared or current squared) V T,s = V S R 3 R 1 + R 3 v 2 Tn =4kTR T B =4kT(R 2 + R 1 R 3 )B A.M.Niknejad University of California, Berkeley EECS 142 Lecture 14 p.9/20

27 Noise for Passive Circuits (I) v 2 eq Z(jω) Passive Noisy Circuit Passive Noiseless Circuit For a general linear circuit, the mean square noise voltage (current) at any port is given by the equivalent input resistance (conductance) veq 2 =4kTR(Z(f))δf A.M. Niknejad University of California, Berkeley EECS 142 Lecture 14 p. 10/20

28 Noise for Passive Circuits (II) This is the spot noise. If the network has a filtering property, then we integrate over the band of interest v 2 T,eq =4kT B R(Z(f))df Unlike resistors, L s and C s do not generate noise. They do shape the noise due to their frequency dependence. A.M. Niknejad University of California, Berkeley EECS 142 Lecture 14 p. 11/20

29 Example: Noise of an RC Circuit G C To find the equivalent mean square noise voltage of an RC circuit, begin by calculating the impedance Z = 1 Y = 1 G + jωc = G jωc G 2 + ω 2 C 2 Integrating the noise over all frequencies, we have v 2 n = 4kT 2π 0 G G 2 + ω 2 C 2 dω = kt C Notice the result is independent of R. Since the noise and BW is proportional/inversely proportional to R, its influence cancels out A.M. Niknejad University of California, Berkeley EECS 142 Lecture 14 p. 12/20

30 Noise of a Receiving Antenna v 2 n Assume we construct an antenna with ideal conductors so R wire =0 If we connect the antenna to a spectrum analyzer, though, we will observe noise The noise is also white but the magnitude depends on where we point our antenna (sky versus ground) A.M. Niknejad University of California, Berkeley EECS 142 Lecture 14 p. 13/20

31 Equivalent Antenna Temperature R rad R rad v 2 a =4kT A R rad B v 2 a V a V a T A T A is the equivalent antenna temperature and R rad is the radiation resistance of the antenna Since the antenna does not generate any of its own thermal noise, the observed noise must be incident on the antenna. In fact, it s black body radiation. Physically T A is related to the temperature of the external bodies radiating into space (e.g. space or the ground) A.M. Niknejad University of California, Berkeley EECS 142 Lecture 14 p. 14/20

32 Diode Shot Noise A forward biased diode exhibits noise called shot noise. This noise arises due to the quantized nature of charge. The noise mean square current is given by i 2 d,n =2qI DCB The noise is white and proportional to the DC current I DC Reversed biased diodes exhibit excess noise not related to shot noise. A.M. Niknejad University of California, Berkeley EECS 142 Lecture 14 p. 15/20

33 Noise in a BJT All physical resistors in a BJT produce noise (r b, r e, r c ). The output resistance r o, though, is not a physical resistor. Likewise, r π, is not a physical resistor. Thus these resistances do not generate noise The junctions of a BJT exhibit shot noise i 2 b,n =2qI BB i 2 c,n =2qI C B At low frequencies the transistor exhibits Flicker Noise or 1/f Noise. A.M. Niknejad University of California, Berkeley EECS 142 Lecture 14 p. 16/20

34 BJT Hybrid-Π Model v 2 r b r b C μ v 2 r c r c + i 2 b r π C π v π g m v π r o i 2 c v 2 r e r e The above equivalent circuit includes noise sources. Note that a small-signal equivalent circuit is appropriate because the noise perturbation is very small A.M. Niknejad University of California, Berkeley EECS 142 Lecture 14 p. 17/20

35 FET Noise In addition to the extrinsic physical resistances in a FET (r g, r s, r d ), the channel resistance also contributes thermal noise The drain current noise of the FET is therefore given by i 2 d,n =4kTγg ds0δf + K I a D C ox L 2 eff f e δf The first term is the thermal noise due to the channel resistance and the second term is the Flicker Noise, also called the 1/f noise, which dominates at low frequencies. The factor γ = 2 3 for a long channel device. The constants K, a, and e are usually determined empirically. A.M. Niknejad University of California, Berkeley EECS 142 Lecture 14 p. 18/20

36 FET Channel Resistance Consider a FET with V DS =0. Then the channel conductance is given by g ds,0 = I DS W = μc ox V DS L (V GS V T ) For a long-channel device, this is also equal to the device transconductance g m in saturation g m = I DS V GS = μc ox W L (V GS V T ) For short-channel devices, this relation is not true, but we can define α = g m g d0 1 A.M. Niknejad University of California, Berkeley EECS 142 Lecture 14 p. 19/20

37 FET Noise Equivalent Circuit v 2 R g R g C gd v 2 R d R d + C gs v gs g m v gs r o i 2 d v 2 R s R s The resistance of the substrate also generates thermal noise. In most circuits we will be concerned with the noise due to the channel i 2 d and the input gate noise v2 R g A.M. Niknejad University of California, Berkeley EECS 142 Lecture 14 p. 20/20

Transistor Noise Lecture 14, High Speed Devices

Transistor Noise Lecture 14, High Speed Devices Transistor Noise 016-03-03 Lecture 14, High Speed Devices 016 1 Transistor Noise A very brief introduction 016-03-0 Lecture 13, High Speed Devices 016 Summary hybrid p Noise is a randomly varying voltage/current

More information

Transistor Noise Lecture 10 High Speed Devices

Transistor Noise Lecture 10 High Speed Devices Transistor Noise 1 Transistor Noise A very brief introduction to circuit and transistor noise. I an not an expert regarding noise Maas: Noise in Linear and Nonlinear Circuits Lee: The Design of CMOS RFIC

More information

Two-Port Noise Analysis

Two-Port Noise Analysis Berkeley Two-Port Noise Analysis Prof. Ali M. Niknejad U.C. Berkeley Copyright c 2015 by Ali M. Niknejad 1/26 Equivalent Noise Generators v 2 n Noisy Two-Port i 2 n Noiseless Two-Port Any noisy two port

More information

Lecture 23: Negative Resistance Osc, Differential Osc, and VCOs

Lecture 23: Negative Resistance Osc, Differential Osc, and VCOs EECS 142 Lecture 23: Negative Resistance Osc, Differential Osc, and VCOs Prof. Ali M. Niknejad University of California, Berkeley Copyright c 2005 by Ali M. Niknejad A. M. Niknejad University of California,

More information

Biasing the CE Amplifier

Biasing the CE Amplifier Biasing the CE Amplifier Graphical approach: plot I C as a function of the DC base-emitter voltage (note: normally plot vs. base current, so we must return to Ebers-Moll): I C I S e V BE V th I S e V th

More information

in Electronic Devices and Circuits

in Electronic Devices and Circuits in Electronic Devices and Circuits Noise is any unwanted excitation of a circuit, any input that is not an information-bearing signal. Noise comes from External sources: Unintended coupling with other

More information

6.776 High Speed Communication Circuits Lecture 10 Noise Modeling in Amplifiers

6.776 High Speed Communication Circuits Lecture 10 Noise Modeling in Amplifiers 6.776 High Speed Communication Circuits Lecture 10 Noise Modeling in Amplifiers Michael Perrott Massachusetts Institute of Technology March 8, 2005 Copyright 2005 by Michael H. Perrott Notation for Mean,

More information

Frequency Response Prof. Ali M. Niknejad Prof. Rikky Muller

Frequency Response Prof. Ali M. Niknejad Prof. Rikky Muller EECS 105 Spring 2017, Module 4 Frequency Response Prof. Ali M. Niknejad Department of EECS Announcements l HW9 due on Friday 2 Review: CD with Current Mirror 3 Review: CD with Current Mirror 4 Review:

More information

ELEN 610 Data Converters

ELEN 610 Data Converters Spring 04 S. Hoyos - EEN-60 ELEN 60 Data onverters Sebastian Hoyos Texas A&M University Analog and Mixed Signal Group Spring 04 S. Hoyos - EEN-60 Electronic Noise Signal to Noise ratio SNR Signal Power

More information

Lecture 15: MOS Transistor models: Body effects, SPICE models. Context. In the last lecture, we discussed the modes of operation of a MOS FET:

Lecture 15: MOS Transistor models: Body effects, SPICE models. Context. In the last lecture, we discussed the modes of operation of a MOS FET: Lecture 15: MOS Transistor models: Body effects, SPICE models Context In the last lecture, we discussed the modes of operation of a MOS FET: oltage controlled resistor model I- curve (Square-Law Model)

More information

Chapter 13 Small-Signal Modeling and Linear Amplification

Chapter 13 Small-Signal Modeling and Linear Amplification Chapter 13 Small-Signal Modeling and Linear Amplification Microelectronic Circuit Design Richard C. Jaeger Travis N. Blalock 1/4/12 Chap 13-1 Chapter Goals Understanding of concepts related to: Transistors

More information

5. EXPERIMENT 5. JFET NOISE MEASURE- MENTS

5. EXPERIMENT 5. JFET NOISE MEASURE- MENTS 5. EXPERIMENT 5. JFET NOISE MEASURE- MENTS 5.1 Object The objects of this experiment are to measure the spectral density of the noise current output of a JFET, to compare the measured spectral density

More information

Lecture 37: Frequency response. Context

Lecture 37: Frequency response. Context EECS 05 Spring 004, Lecture 37 Lecture 37: Frequency response Prof J. S. Smith EECS 05 Spring 004, Lecture 37 Context We will figure out more of the design parameters for the amplifier we looked at in

More information

UNIVERSITY OF CALIFORNIA College of Engineering Department of Electrical Engineering and Computer Sciences

UNIVERSITY OF CALIFORNIA College of Engineering Department of Electrical Engineering and Computer Sciences UNIVERSITY OF CALIFORNIA College of Engineering Department of Electrical Engineering and Computer Sciences E. Alon Final EECS 240 Monday, May 19, 2008 SPRING 2008 You should write your results on the exam

More information

Electronic Circuits 1. Transistor Devices. Contents BJT and FET Characteristics Operations. Prof. C.K. Tse: Transistor devices

Electronic Circuits 1. Transistor Devices. Contents BJT and FET Characteristics Operations. Prof. C.K. Tse: Transistor devices Electronic Circuits 1 Transistor Devices Contents BJT and FET Characteristics Operations 1 What is a transistor? Three-terminal device whose voltage-current relationship is controlled by a third voltage

More information

Analysis and Design of Analog Integrated Circuits Lecture 14. Noise Spectral Analysis for Circuit Elements

Analysis and Design of Analog Integrated Circuits Lecture 14. Noise Spectral Analysis for Circuit Elements Analysis and Design of Analog Integrated Circuits Lecture 14 Noise Spectral Analysis for Circuit Elements Michael H. Perrott March 18, 01 Copyright 01 by Michael H. Perrott All rights reserved. Recall

More information

pickup from external sources unwanted feedback RF interference from system or elsewhere, power supply fluctuations ground currents

pickup from external sources unwanted feedback RF interference from system or elsewhere, power supply fluctuations ground currents Noise What is NOISE? A definition: Any unwanted signal obscuring signal to be observed two main origins EXTRINSIC NOISE examples... pickup from external sources unwanted feedback RF interference from system

More information

MOS Transistors. Prof. Krishna Saraswat. Department of Electrical Engineering Stanford University Stanford, CA

MOS Transistors. Prof. Krishna Saraswat. Department of Electrical Engineering Stanford University Stanford, CA MOS Transistors Prof. Krishna Saraswat Department of Electrical Engineering S Stanford, CA 94305 saraswat@stanford.edu 1 1930: Patent on the Field-Effect Transistor! Julius Lilienfeld filed a patent describing

More information

Homework Assignment 08

Homework Assignment 08 Homework Assignment 08 Question 1 (Short Takes) Two points each unless otherwise indicated. 1. Give one phrase/sentence that describes the primary advantage of an active load. Answer: Large effective resistance

More information

Lecture 11: J-FET and MOSFET

Lecture 11: J-FET and MOSFET ENE 311 Lecture 11: J-FET and MOSFET FETs vs. BJTs Similarities: Amplifiers Switching devices Impedance matching circuits Differences: FETs are voltage controlled devices. BJTs are current controlled devices.

More information

EE 330 Lecture 22. Small Signal Modelling Operating Points for Amplifier Applications Amplification with Transistor Circuits

EE 330 Lecture 22. Small Signal Modelling Operating Points for Amplifier Applications Amplification with Transistor Circuits EE 330 Lecture 22 Small Signal Modelling Operating Points for Amplifier Applications Amplification with Transistor Circuits Exam 2 Friday March 9 Exam 3 Friday April 13 Review Session for Exam 2: 6:00

More information

6.012 Electronic Devices and Circuits Spring 2005

6.012 Electronic Devices and Circuits Spring 2005 6.012 Electronic Devices and Circuits Spring 2005 May 16, 2005 Final Exam (200 points) -OPEN BOOK- Problem NAME RECITATION TIME 1 2 3 4 5 Total General guidelines (please read carefully before starting):

More information

Vidyalankar S.E. Sem. III [EXTC] Analog Electronics - I Prelim Question Paper Solution

Vidyalankar S.E. Sem. III [EXTC] Analog Electronics - I Prelim Question Paper Solution . (a) S.E. Sem. [EXTC] Analog Electronics - Prelim Question Paper Solution Comparison between BJT and JFET BJT JFET ) BJT is a bipolar device, both majority JFET is an unipolar device, electron and minority

More information

Circle the one best answer for each question. Five points per question.

Circle the one best answer for each question. Five points per question. ID # NAME EE-255 EXAM 3 November 8, 2001 Instructor (circle one) Talavage Gray This exam consists of 16 multiple choice questions and one workout problem. Record all answers to the multiple choice questions

More information

Capacitors Diodes Transistors. PC200 Lectures. Terry Sturtevant. Wilfrid Laurier University. June 4, 2009

Capacitors Diodes Transistors. PC200 Lectures. Terry Sturtevant. Wilfrid Laurier University. June 4, 2009 Wilfrid Laurier University June 4, 2009 Capacitor an electronic device which consists of two conductive plates separated by an insulator Capacitor an electronic device which consists of two conductive

More information

ECE 342 Electronic Circuits. Lecture 6 MOS Transistors

ECE 342 Electronic Circuits. Lecture 6 MOS Transistors ECE 342 Electronic Circuits Lecture 6 MOS Transistors Jose E. Schutt-Aine Electrical & Computer Engineering University of Illinois jesa@illinois.edu 1 NMOS Transistor Typically L = 0.1 to 3 m, W = 0.2

More information

I. Frequency Response of Voltage Amplifiers

I. Frequency Response of Voltage Amplifiers I. Frequency Response of Voltage Amplifiers A. Common-Emitter Amplifier: V i SUP i OUT R S V BIAS R L v OUT V Operating Point analysis: 0, R s 0, r o --->, r oc --->, R L ---> Find V BIAS such that I C

More information

EE 230 Lecture 33. Nonlinear Circuits and Nonlinear Devices. Diode BJT MOSFET

EE 230 Lecture 33. Nonlinear Circuits and Nonlinear Devices. Diode BJT MOSFET EE 230 Lecture 33 Nonlinear Circuits and Nonlinear Devices Diode BJT MOSFET Review from Last Time: n-channel MOSFET Source Gate L Drain W L EFF Poly Gate oxide n-active p-sub depletion region (electrically

More information

Figure 1: MOSFET symbols.

Figure 1: MOSFET symbols. c Copyright 2008. W. Marshall Leach, Jr., Professor, Georgia Institute of Technology, School of Electrical and Computer Engineering. The MOSFET Device Symbols Whereas the JFET has a diode junction between

More information

Chapter 4 Field-Effect Transistors

Chapter 4 Field-Effect Transistors Chapter 4 Field-Effect Transistors Microelectronic Circuit Design Richard C. Jaeger Travis N. Blalock 5/5/11 Chap 4-1 Chapter Goals Describe operation of MOSFETs. Define FET characteristics in operation

More information

MOS Transistor Theory

MOS Transistor Theory MOS Transistor Theory So far, we have viewed a MOS transistor as an ideal switch (digital operation) Reality: less than ideal EE 261 Krish Chakrabarty 1 Introduction So far, we have treated transistors

More information

Workshop WMB. Noise Modeling

Workshop WMB. Noise Modeling Workshop WMB Noise Modeling Manfred Berroth, Markus Grözing, Stefan Heck, Alexander Bräckle University of Stuttgart, Germany WMB (IMS) Parameter Extraction Strategies For Compact Transistor Models IMS

More information

EE105 Fall 2014 Microelectronic Devices and Circuits. NMOS Transistor Capacitances: Saturation Region

EE105 Fall 2014 Microelectronic Devices and Circuits. NMOS Transistor Capacitances: Saturation Region EE105 Fall 014 Microelectronic Devices and Circuits Prof. Ming C. Wu wu@eecs.berkeley.edu 511 Sutardja Dai Hall (SDH) 1 NMOS Transistor Capacitances: Saturation Region Drain no longer connected to channel

More information

MOS Transistor Properties Review

MOS Transistor Properties Review MOS Transistor Properties Review 1 VLSI Chip Manufacturing Process Photolithography: transfer of mask patterns to the chip Diffusion or ion implantation: selective doping of Si substrate Oxidation: SiO

More information

EECS240 Spring Today s Lecture. Lecture 2: CMOS Technology and Passive Devices. Lingkai Kong EECS. EE240 CMOS Technology

EECS240 Spring Today s Lecture. Lecture 2: CMOS Technology and Passive Devices. Lingkai Kong EECS. EE240 CMOS Technology EECS240 Spring 2013 Lecture 2: CMOS Technology and Passive Devices Lingkai Kong EECS Today s Lecture EE240 CMOS Technology Passive devices Motivation Resistors Capacitors (Inductors) Next time: MOS transistor

More information

Electronic Circuits Summary

Electronic Circuits Summary Electronic Circuits Summary Andreas Biri, D-ITET 6.06.4 Constants (@300K) ε 0 = 8.854 0 F m m 0 = 9. 0 3 kg k =.38 0 3 J K = 8.67 0 5 ev/k kt q = 0.059 V, q kt = 38.6, kt = 5.9 mev V Small Signal Equivalent

More information

EE 230 Lecture 31. THE MOS TRANSISTOR Model Simplifcations THE Bipolar Junction TRANSISTOR

EE 230 Lecture 31. THE MOS TRANSISTOR Model Simplifcations THE Bipolar Junction TRANSISTOR EE 23 Lecture 3 THE MOS TRANSISTOR Model Simplifcations THE Bipolar Junction TRANSISTOR Quiz 3 Determine I X. Assume W=u, L=2u, V T =V, uc OX = - 4 A/V 2, λ= And the number is? 3 8 5 2? 6 4 9 7 Quiz 3

More information

Lecture 13 MOSFET as an amplifier with an introduction to MOSFET small-signal model and small-signal schematics. Lena Peterson

Lecture 13 MOSFET as an amplifier with an introduction to MOSFET small-signal model and small-signal schematics. Lena Peterson Lecture 13 MOSFET as an amplifier with an introduction to MOSFET small-signal model and small-signal schematics Lena Peterson 2015-10-13 Outline (1) Why is the CMOS inverter gain not infinite? Large-signal

More information

UNIVERSITY OF CALIFORNIA, BERKELEY College of Engineering Department of Electrical Engineering and Computer Sciences

UNIVERSITY OF CALIFORNIA, BERKELEY College of Engineering Department of Electrical Engineering and Computer Sciences UNIVERSITY OF CALIFORNIA, BERKELEY College of Engineering Department of Electrical Engineering and Computer Sciences EE 105: Microelectronic Devices and Circuits Spring 2008 MIDTERM EXAMINATION #1 Time

More information

EEC 118 Lecture #2: MOSFET Structure and Basic Operation. Rajeevan Amirtharajah University of California, Davis Jeff Parkhurst Intel Corporation

EEC 118 Lecture #2: MOSFET Structure and Basic Operation. Rajeevan Amirtharajah University of California, Davis Jeff Parkhurst Intel Corporation EEC 118 Lecture #2: MOSFET Structure and Basic Operation Rajeevan Amirtharajah University of California, Davis Jeff Parkhurst Intel Corporation Announcements Lab 1 this week, report due next week Bring

More information

R. Ludwig and G. Bogdanov RF Circuit Design: Theory and Applications 2 nd edition. Figures for Chapter 6

R. Ludwig and G. Bogdanov RF Circuit Design: Theory and Applications 2 nd edition. Figures for Chapter 6 R. Ludwig and G. Bogdanov RF Circuit Design: Theory and Applications 2 nd edition Figures for Chapter 6 Free electron Conduction band Hole W g W C Forbidden Band or Bandgap W V Electron energy Hole Valence

More information

ECE 342 Electronic Circuits. 3. MOS Transistors

ECE 342 Electronic Circuits. 3. MOS Transistors ECE 342 Electronic Circuits 3. MOS Transistors Jose E. Schutt-Aine Electrical & Computer Engineering University of Illinois jschutt@emlab.uiuc.edu 1 NMOS Transistor Typically L = 0.1 to 3 m, W = 0.2 to

More information

ECE-343 Test 2: Mar 21, :00-8:00, Closed Book. Name : SOLUTION

ECE-343 Test 2: Mar 21, :00-8:00, Closed Book. Name : SOLUTION ECE-343 Test 2: Mar 21, 2012 6:00-8:00, Closed Book Name : SOLUTION 1. (25 pts) (a) Draw a circuit diagram for a differential amplifier designed under the following constraints: Use only BJTs. (You may

More information

Microelectronic Devices and Circuits Lecture 13 - Linear Equivalent Circuits - Outline Announcements Exam Two -

Microelectronic Devices and Circuits Lecture 13 - Linear Equivalent Circuits - Outline Announcements Exam Two - 6.012 Microelectronic Devices and Circuits Lecture 13 Linear Equivalent Circuits Outline Announcements Exam Two Coming next week, Nov. 5, 7:309:30 p.m. Review Subthreshold operation of MOSFETs Review Large

More information

VLSI Design and Simulation

VLSI Design and Simulation VLSI Design and Simulation Performance Characterization Topics Performance Characterization Resistance Estimation Capacitance Estimation Inductance Estimation Performance Characterization Inverter Voltage

More information

Switching circuits: basics and switching speed

Switching circuits: basics and switching speed ECE137B notes; copyright 2018 Switching circuits: basics and switching speed Mark Rodwell, University of California, Santa Barbara Amplifiers vs. switching circuits Some transistor circuit might have V

More information

ECE-342 Test 3: Nov 30, :00-8:00, Closed Book. Name : Solution

ECE-342 Test 3: Nov 30, :00-8:00, Closed Book. Name : Solution ECE-342 Test 3: Nov 30, 2010 6:00-8:00, Closed Book Name : Solution All solutions must provide units as appropriate. Unless otherwise stated, assume T = 300 K. 1. (25 pts) Consider the amplifier shown

More information

Assignment 3 ELEC 312/Winter 12 R.Raut, Ph.D.

Assignment 3 ELEC 312/Winter 12 R.Raut, Ph.D. Page 1 of 3 ELEC 312: ELECTRONICS II : ASSIGNMENT-3 Department of Electrical and Computer Engineering Winter 2012 1. A common-emitter amplifier that can be represented by the following equivalent circuit,

More information

Guest Lectures for Dr. MacFarlane s EE3350

Guest Lectures for Dr. MacFarlane s EE3350 Guest Lectures for Dr. MacFarlane s EE3350 Michael Plante Sat., -08-008 Write name in corner.. Problem Statement Amplifier Z S Z O V S Z I Z L Transducer, Antenna, etc. Coarse Tuning (optional) Amplifier

More information

Physical Noise Sources

Physical Noise Sources AppendixA Physical Noise Sources Contents A.1 Physical Noise Sources................ A-2 A.1.1 Thermal Noise................ A-3 A.1.2 Nyquist s Formula.............. A-5 A.1.3 Shot Noise..................

More information

Device Models (PN Diode, MOSFET )

Device Models (PN Diode, MOSFET ) Device Models (PN Diode, MOSFET ) Instructor: Steven P. Levitan steve@ece.pitt.edu TA: Gayatri Mehta, José Martínez Book: Digital Integrated Circuits: A Design Perspective; Jan Rabaey Lab Notes: Handed

More information

Lecture 11: MOS Transistor

Lecture 11: MOS Transistor Lecture 11: MOS Transistor Prof. Niknejad Lecture Outline Review: MOS Capacitors Regions MOS Capacitors (3.8 3.9) CV Curve Threshold Voltage MOS Transistors (4.1 4.3): Overview Cross-section and layout

More information

Device Models (PN Diode, MOSFET )

Device Models (PN Diode, MOSFET ) Device Models (PN Diode, MOSFET ) Instructor: Steven P. Levitan steve@ece.pitt.edu TA: Gayatri Mehta, José Martínez Book: Digital Integrated Circuits: A Design Perspective; Jan Rabaey Lab Notes: Handed

More information

3. Basic building blocks. Analog Design for CMOS VLSI Systems Franco Maloberti

3. Basic building blocks. Analog Design for CMOS VLSI Systems Franco Maloberti Inverter with active load It is the simplest gain stage. The dc gain is given by the slope of the transfer characteristics. Small signal analysis C = C gs + C gs,ov C 2 = C gd + C gd,ov + C 3 = C db +

More information

Chapter 6: Field-Effect Transistors

Chapter 6: Field-Effect Transistors Chapter 6: Field-Effect Transistors slamic University of Gaza Dr. Talal Skaik FETs vs. BJTs Similarities: Amplifiers Switching devices mpedance matching circuits Differences: FETs are voltage controlled

More information

0 t < 0 1 t 1. u(t) =

0 t < 0 1 t 1. u(t) = A. M. Niknejad University of California, Berkeley EE 100 / 42 Lecture 13 p. 22/33 Step Response A unit step function is described by u(t) = ( 0 t < 0 1 t 1 While the waveform has an artificial jump (difficult

More information

55:041 Electronic Circuits The University of Iowa Fall Exam 2

55:041 Electronic Circuits The University of Iowa Fall Exam 2 Exam 2 Name: Score /60 Question 1 One point unless indicated otherwise. 1. An engineer measures the (step response) rise time of an amplifier as t r = 0.35 μs. Estimate the 3 db bandwidth of the amplifier.

More information

Lecture 12: MOS Capacitors, transistors. Context

Lecture 12: MOS Capacitors, transistors. Context Lecture 12: MOS Capacitors, transistors Context In the last lecture, we discussed PN diodes, and the depletion layer into semiconductor surfaces. Small signal models In this lecture, we will apply those

More information

Lecture 210 Physical Aspects of ICs (12/15/01) Page 210-1

Lecture 210 Physical Aspects of ICs (12/15/01) Page 210-1 Lecture 210 Physical Aspects of ICs (12/15/01) Page 210-1 LECTURE 210 PHYSICAL ASPECTS OF ICs (READING: Text-Sec. 2.5, 2.6, 2.8) INTRODUCTION Objective Illustrate the physical aspects of integrated circuits

More information

Session 0: Review of Solid State Devices. From Atom to Transistor

Session 0: Review of Solid State Devices. From Atom to Transistor Session 0: Review of Solid State Devices From Atom to Transistor 1 Objective To Understand: how Diodes, and Transistors operate! p n p+ n p- n+ n+ p 2 21 Century Alchemy! Ohm s law resistivity Resistivity

More information

ID # NAME. EE-255 EXAM 3 April 7, Instructor (circle one) Ogborn Lundstrom

ID # NAME. EE-255 EXAM 3 April 7, Instructor (circle one) Ogborn Lundstrom ID # NAME EE-255 EXAM 3 April 7, 1998 Instructor (circle one) Ogborn Lundstrom This exam consists of 20 multiple choice questions. Record all answers on this page, but you must turn in the entire exam.

More information

Digital Integrated Circuits A Design Perspective. Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic. The Devices. July 30, Devices.

Digital Integrated Circuits A Design Perspective. Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic. The Devices. July 30, Devices. Digital Integrated Circuits A Design Perspective Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic The July 30, 2002 1 Goal of this chapter Present intuitive understanding of device operation Introduction

More information

The current source. The Active Current Source

The current source. The Active Current Source V ref + - The current source Minimum noise euals: Thevenin Norton = V ref DC current through resistor gives an increase of /f noise (granular structure) Accuracy of source also determined by the accuracy

More information

Section 12: Intro to Devices

Section 12: Intro to Devices Section 12: Intro to Devices Extensive reading materials on reserve, including Robert F. Pierret, Semiconductor Device Fundamentals EE143 Ali Javey Bond Model of Electrons and Holes Si Si Si Si Si Si Si

More information

Robert W. Brodersen EECS140 Analog Circuit Design

Robert W. Brodersen EECS140 Analog Circuit Design INTRODUCTION University of California Berkeley College of Engineering Department of Electrical Engineering and Computer Science Robert. Brodersen EECS40 Analog Circuit Design ROBERT. BRODERSEN LECTURE

More information

EE105 - Fall 2006 Microelectronic Devices and Circuits

EE105 - Fall 2006 Microelectronic Devices and Circuits EE105 - Fall 2006 Microelectronic Devices and Circuits Prof. Jan M. Rabaey (jan@eecs) Lecture 7: MOS Transistor Some Administrative Issues Lab 2 this week Hw 2 due on We Hw 3 will be posted same day MIDTERM

More information

PHYS 352. Shot Noise, 1/f Noise. current (which is rate of charge)

PHYS 352. Shot Noise, 1/f Noise. current (which is rate of charge) PHYS 352 Shot Noise, 1/f Noise Shot Noise current (which is rate of charge) current does not flow completely smoothly when charges arrive as quanta e.g. charge collection in a photodiode is a random, independent

More information

MOS Transistor I-V Characteristics and Parasitics

MOS Transistor I-V Characteristics and Parasitics ECEN454 Digital Integrated Circuit Design MOS Transistor I-V Characteristics and Parasitics ECEN 454 Facts about Transistors So far, we have treated transistors as ideal switches An ON transistor passes

More information

ECE 497 JS Lecture - 12 Device Technologies

ECE 497 JS Lecture - 12 Device Technologies ECE 497 JS Lecture - 12 Device Technologies Spring 2004 Jose E. Schutt-Aine Electrical & Computer Engineering University of Illinois jose@emlab.uiuc.edu 1 NMOS Transistor 2 ρ Source channel charge density

More information

ECE315 / ECE515 Lecture 11 Date:

ECE315 / ECE515 Lecture 11 Date: ecture 11 Date: 15.09.016 MOS Differential Pair Quantitative Analysis differential input Small Signal Analysis MOS Differential Pair ECE315 / ECE515 M 1 and M are perfectly matched (at least in theory!)

More information

SOME USEFUL NETWORK THEOREMS

SOME USEFUL NETWORK THEOREMS APPENDIX D SOME USEFUL NETWORK THEOREMS Introduction In this appendix we review three network theorems that are useful in simplifying the analysis of electronic circuits: Thévenin s theorem Norton s theorem

More information

figure shows a pnp transistor biased to operate in the active mode

figure shows a pnp transistor biased to operate in the active mode Lecture 10b EE-215 Electronic Devices and Circuits Asst Prof Muhammad Anis Chaudhary BJT: Device Structure and Physical Operation The pnp Transistor figure shows a pnp transistor biased to operate in the

More information

EE105 Fall 2014 Microelectronic Devices and Circuits

EE105 Fall 2014 Microelectronic Devices and Circuits EE05 Fall 204 Microelectronic Devices and Circuits Prof. Ming C. Wu wu@eecs.berkeley.edu 5 Sutardja Dai Hall (SDH) Terminal Gain and I/O Resistances of BJT Amplifiers Emitter (CE) Collector (CC) Base (CB)

More information

EE115C Winter 2017 Digital Electronic Circuits. Lecture 3: MOS RC Model, CMOS Manufacturing

EE115C Winter 2017 Digital Electronic Circuits. Lecture 3: MOS RC Model, CMOS Manufacturing EE115C Winter 2017 Digital Electronic Circuits Lecture 3: MOS RC Model, CMOS Manufacturing Agenda MOS Transistor: RC Model (pp. 104-113) S R on D CMOS Manufacturing Process (pp. 36-46) S S C GS G G C GD

More information

At point G V = = = = = = RB B B. IN RB f

At point G V = = = = = = RB B B. IN RB f Common Emitter At point G CE RC 0. 4 12 0. 4 116. I C RC 116. R 1k C 116. ma I IC 116. ma β 100 F 116µ A I R ( 116µ A)( 20kΩ) 2. 3 R + 2. 3 + 0. 7 30. IN R f Gain in Constant Current Region I I I C F

More information

The Devices. Digital Integrated Circuits A Design Perspective. Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic. July 30, 2002

The Devices. Digital Integrated Circuits A Design Perspective. Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic. July 30, 2002 Digital Integrated Circuits A Design Perspective Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic The Devices July 30, 2002 Goal of this chapter Present intuitive understanding of device operation Introduction

More information

EECS 105: FALL 06 FINAL

EECS 105: FALL 06 FINAL University of California College of Engineering Department of Electrical Engineering and Computer Sciences Jan M. Rabaey TuTh 2-3:30 Wednesday December 13, 12:30-3:30pm EECS 105: FALL 06 FINAL NAME Last

More information

Operation and Modeling of. The MOS Transistor. Second Edition. Yannis Tsividis Columbia University. New York Oxford OXFORD UNIVERSITY PRESS

Operation and Modeling of. The MOS Transistor. Second Edition. Yannis Tsividis Columbia University. New York Oxford OXFORD UNIVERSITY PRESS Operation and Modeling of The MOS Transistor Second Edition Yannis Tsividis Columbia University New York Oxford OXFORD UNIVERSITY PRESS CONTENTS Chapter 1 l.l 1.2 1.3 1.4 1.5 1.6 1.7 Chapter 2 2.1 2.2

More information

ELECTRONICS IA 2017 SCHEME

ELECTRONICS IA 2017 SCHEME ELECTRONICS IA 2017 SCHEME CONTENTS 1 [ 5 marks ]...4 2...5 a. [ 2 marks ]...5 b. [ 2 marks ]...5 c. [ 5 marks ]...5 d. [ 2 marks ]...5 3...6 a. [ 3 marks ]...6 b. [ 3 marks ]...6 4 [ 7 marks ]...7 5...8

More information

! MOS Capacitances. " Extrinsic. " Intrinsic. ! Lumped Capacitance Model. ! First Order Capacitor Summary. ! Capacitance Implications

! MOS Capacitances.  Extrinsic.  Intrinsic. ! Lumped Capacitance Model. ! First Order Capacitor Summary. ! Capacitance Implications ESE 570: Digital Integrated Circuits and VLSI Fundamentals Lec 7: February, 07 MOS SPICE Models, MOS Parasitic Details Lecture Outline! MOS Capacitances " Extrinsic " Intrinsic! Lumped Capacitance Model!

More information

Thermal noise in field-effect devices

Thermal noise in field-effect devices Thermal noise in field-effect devices J. W. Haslett, M.Sc, and F. N. Trofimenkoff, Ph.D. Abstract Thermal-noise calculations for both junction-gate and m.o.s. field-effect transistors are performed using

More information

ECE-343 Test 1: Feb 10, :00-8:00pm, Closed Book. Name : SOLUTION

ECE-343 Test 1: Feb 10, :00-8:00pm, Closed Book. Name : SOLUTION ECE-343 Test : Feb 0, 00 6:00-8:00pm, Closed Book Name : SOLUTION C Depl = C J0 + V R /V o ) m C Diff = τ F g m ω T = g m C µ + C π ω T = g m I / D C GD + C or V OV GS b = τ i τ i = R i C i ω H b Z = Z

More information

University of Toronto. Final Exam

University of Toronto. Final Exam University of Toronto Final Exam Date - Dec 16, 013 Duration:.5 hrs ECE331 Electronic Circuits Lecturer - D. Johns ANSWER QUESTIONS ON THESE SHEETS USING BACKS IF NECESSARY 1. Equation sheet is on last

More information

Lecture 3: CMOS Transistor Theory

Lecture 3: CMOS Transistor Theory Lecture 3: CMOS Transistor Theory Outline Introduction MOS Capacitor nmos I-V Characteristics pmos I-V Characteristics Gate and Diffusion Capacitance 2 Introduction So far, we have treated transistors

More information

The Devices: MOS Transistors

The Devices: MOS Transistors The Devices: MOS Transistors References: Semiconductor Device Fundamentals, R. F. Pierret, Addison-Wesley Digital Integrated Circuits: A Design Perspective, J. Rabaey et.al. Prentice Hall NMOS Transistor

More information

ECE 546 Lecture 10 MOS Transistors

ECE 546 Lecture 10 MOS Transistors ECE 546 Lecture 10 MOS Transistors Spring 2018 Jose E. Schutt-Aine Electrical & Computer Engineering University of Illinois jesa@illinois.edu NMOS Transistor NMOS Transistor N-Channel MOSFET Built on p-type

More information

Introduction to Semiconductor Devices

Introduction to Semiconductor Devices Physics 233 Experiment 48 Introduction to Semiconductor Devices References 1. G.W. Neudeck, The PN Junction Diode, Addison-Wesley MA 1989 2. Background notes (Appendix A) 3. Specification sheet for Diode

More information

EE C245 ME C218 Introduction to MEMS Design

EE C245 ME C218 Introduction to MEMS Design EE C45 ME C18 Introduction to MEMS Design Fall 008 Prof. Clark T.-C. Nguyen Dept. of Electrical Engineering & Computer Sciences University of California at Berkeley Berkeley, CA 9470 Lecture 6: Output

More information

CMOS Cross Section. EECS240 Spring Dimensions. Today s Lecture. Why Talk About Passives? EE240 Process

CMOS Cross Section. EECS240 Spring Dimensions. Today s Lecture. Why Talk About Passives? EE240 Process EECS240 Spring 202 CMOS Cross Section Metal p - substrate p + diffusion Lecture 2: CMOS Technology and Passive Devices Poly n - well n + diffusion Elad Alon Dept. of EECS EECS240 Lecture 2 4 Today s Lecture

More information

Lecture 4: CMOS Transistor Theory

Lecture 4: CMOS Transistor Theory Introduction to CMOS VLSI Design Lecture 4: CMOS Transistor Theory David Harris, Harvey Mudd College Kartik Mohanram and Steven Levitan University of Pittsburgh Outline q Introduction q MOS Capacitor q

More information

ECE 415/515 ANALOG INTEGRATED CIRCUIT DESIGN

ECE 415/515 ANALOG INTEGRATED CIRCUIT DESIGN ECE 415/515 ANALOG INTEGRATED CIRCUIT DESIGN CMOS PROCESS CHARACTERIZATION VISHAL SAXENA VSAXENA@UIDAHO.EDU Vishal Saxena DESIGN PARAMETERS Analog circuit designers care about: Open-loop Gain: g m r o

More information

Bipolar Junction Transistor (BJT) - Introduction

Bipolar Junction Transistor (BJT) - Introduction Bipolar Junction Transistor (BJT) - Introduction It was found in 1948 at the Bell Telephone Laboratories. It is a three terminal device and has three semiconductor regions. It can be used in signal amplification

More information

Spring Semester 2012 Final Exam

Spring Semester 2012 Final Exam Spring Semester 2012 Final Exam Note: Show your work, underline results, and always show units. Official exam time: 2.0 hours; an extension of at least 1.0 hour will be granted to anyone. Materials parameters

More information

1/13/12 V DS. I d V GS. C ox ( = f (V GS ,V DS ,V SB = I D. + i d + I ΔV + I ΔV BS V BS. 19 January 2012

1/13/12 V DS. I d V GS. C ox ( = f (V GS ,V DS ,V SB = I D. + i d + I ΔV + I ΔV BS V BS. 19 January 2012 /3/ 9 January 0 Study the linear model of MOS transistor around an operating point." MOS in saturation: V GS >V th and V S >V GS -V th " VGS vi - I d = I i d VS I d = µ n ( L V V γ Φ V Φ GS th0 F SB F

More information

Introduction and Background

Introduction and Background Analog CMOS Integrated Circuit Design Introduction and Background Dr. Jawdat Abu-Taha Department of Electrical and Computer Engineering Islamic University of Gaza jtaha@iugaza.edu.ps 1 Marking Assignments

More information

E2.2 Analogue Electronics

E2.2 Analogue Electronics E2.2 Analogue Electronics Instructor : Christos Papavassiliou Office, email : EE 915, c.papavas@imperial.ac.uk Lectures : Monday 2pm, room 408 (weeks 2-11) Thursday 3pm, room 509 (weeks 4-11) Problem,

More information

ELEC 3908, Physical Electronics, Lecture 19. BJT Base Resistance and Small Signal Modelling

ELEC 3908, Physical Electronics, Lecture 19. BJT Base Resistance and Small Signal Modelling ELEC 3908, Physical Electronics, Lecture 19 BJT Base Resistance and Small Signal Modelling Lecture Outline Lecture 17 derived static (dc) injection model to predict dc currents from terminal voltages This

More information

Introduction to Semiconductor Devices

Introduction to Semiconductor Devices Physics 233 Experiment 48 Introduction to Semiconductor Devices References 1. G.W. Neudeck, The PN Junction Diode, Addison-Wesley MA 1989 2. Background notes (Appendix A) 3. Specification sheet for Diode

More information

Device Physics: The Bipolar Transistor

Device Physics: The Bipolar Transistor Monolithic Amplifier Circuits: Device Physics: The Bipolar Transistor Chapter 4 Jón Tómas Guðmundsson tumi@hi.is 2. Week Fall 2010 1 Introduction In analog design the transistors are not simply switches

More information

Paper Review. Special Topics in Optical Engineering II (15/1) Minkyu Kim. IEEE Journal of Quantum Electronics, Feb 1985

Paper Review. Special Topics in Optical Engineering II (15/1) Minkyu Kim. IEEE Journal of Quantum Electronics, Feb 1985 Paper Review IEEE Journal of Quantum Electronics, Feb 1985 Contents Semiconductor laser review High speed semiconductor laser Parasitic elements limitations Intermodulation products Intensity noise Large

More information