EE 330 Lecture 16. Devices in Semiconductor Processes. MOS Transistors
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1 EE 330 Lecture 16 Devices in Semiconductor Processes MOS Transistors
2 Review from Last Time Model Summary I D I V DS V S I B V BS = 0 0 VS VT W VDS ID = μcox VS VT VDS VS V VDS VS VT L T < W μc ( V V ) V V V V V L I =I =0 B OX S T S T DS S T Note: This is the third model we have introduced for the MOSFET (Deep triode special case of triode where V DS is small ) R CH = L W 1 ( VS VT ) µ COX Cutoff Triode Saturation
3 Review from Last Time raphical Representation of MOS Model I D 3.5 Triode I = μc W V L D OX DS V S4 0 V V S T W V = < L W ( ) L DS I μc V V V V V V V V D OX S T DS S T DS S T μc V V V V V V V OX S T S T DS S T I =I =0 B Deep Triode RegionRegion Saturation 0.5 V S VDS Cutoff V S3 V S V DS
4 Review from Last Time Model Extensions 300 I D V A 1 λ = V DS Projections intersect V DS axis at same point, termed Early Voltage Typical values from -0V to -00V Usually use parameter λ instead of V A in MOS model
5 Review from Last Time Further Model Extensions Existing model does not depend upon the bulk voltage! Observe that changing the bulk voltage will change the electric field in the channel region! V DS V S ID V BS I B I E (V BS small) Changing the bulk voltage will change the thickness of the inversion layer Changing the bulk voltage will change the threshold voltage of the device V T ( φ V φ ) = VT0 + γ BS
6 Review from Last Time Typical Effects of Bulk on Threshold Voltage for n-channel Device V T ( φ V φ ) = VT0 + γ BS 1 γ 0.4V - φ 0.6V V T V T0 ~ -5V V BS Bulk-Diffusion enerally Reverse Biased (V BS < 0 or at least less than 0.3V) for n- channel Shift in threshold voltage with bulk voltage can be substantial Often V BS =0
7 Review from Last Time Model Extension Summary I I B = 0 = 0 0 V V S T W V = < L W μc ( V V ) ( 1+ λv ) V V V V V L DS I μc V V V V V V V V D OX S T DS S T DS S T V T OX S T DS S T DS S T + γ ( φ V φ ) = VT0 BS Model Parameters : {μ,c OX,V T0,φ,γ,λ} Design Parameters : {W,L} but only one degree of freedom W/L
8 Operation Regions by Applications Id I D Triode Region Saturation Region Analog Circuits Cutoff Region Vds Digital Circuits V DS Most analog circuits operate in the saturation region (basic VVR operates in triode and is an exception) Most digital circuits operate in triode and cutoff regions and switch between these two with Boolean inputs
9 Output Impedance Model in Saturation Region I D 300 Analog Circuits Id In saturation region W I=μC V V L Vds ( ) [ 1+λV ] D OX S T DS W W I=μC V V μc V V L L ( ) + λ ( ) V DS V D OX S T OX S T DS W 1 I =μc ( V V ) + V L R DEQ D OX S T DS 1 R = DEQ W λμc V V L ( ) OX S T
10 Output Impedance Model in Saturation Region I D 300 Analog Circuits Id In saturation region D W I=μC V V L Vds ( ) [ 1+λV ] D OX S T DS V DS I D D S S W L V S μc ( V V ) OX S T R DEQ V DS W 1 I =μc ( V V ) + V L R R = 1 1 W λi L D OX S T DS DEQ DEQ λμc ( V V ) OX S T Slope of output characteristics in saturation region gives rise to output resistance DNOM
11 Model Extension (short devices) 0 V V S T W V = < L W μc ( V V ) V V V V V OX S T S T DS S T L DS I μc V V V V V V V V D OX S T DS S T DS S T As the channel length becomes very short, velocity saturation will occur in the channel and this will occur with electric fields around V/u. So, if a gate length is around 1u, then voltages up to V can be applied without velocity saturation. But, if gate length decreases and voltages are kept high, velocity saturation will occur 0 V V S T θ W I μc V V V V V V V θ L 1 W θμc V V V V V V L α ( ) θ ( V ) α = < D OX S T DS S T DS 1 S T α ( ) θ ( V ) OX S T S T DS 1 S α is the velocity saturation index, α 1 T α
12 Model Extension (short devices) 0 V V S T θ W I = D μc V V V V V V < V OX S T DS S T DS 1 S θ L 1 W θμc V V V V V V OX S T S T DS 1 S L α ( ) θ ( V ) α α ( ) θ ( V ) α is the velocity saturation index, α 1 T T α No longer a square-law model (some term it an α-power model) For long devices, α= Channel length modulation (λ) and bulk effects can be added to the velocity Saturation as well Degrading of α is not an attractive limitation of the MOSFET
13 Model Extension (BSIM model)
14 Model Errors with Different W/L Values I D Actual Modeled with one value of L, W Modeled with another value of L, W V S3 V S V S1 V DS Binning models can improve model accuracy
15 BSIM Binning Model - Bin on device sizes - multiple BSIM models! With 3 bins, this model has 3040 model parameters!
16 Model Changes with Process Variations (n-ch characteristics shown) I D TT FS or FF (Fast n, slow p or Fast n, fast p ) SS or SF (Slow n, slow p or Slow n, fast p ) V S3 V S V S1 V DS Corner models can improve model accuracy
17 BSIM Corner Models with Binning - Often 4 corners in addition to nominal TT, FF, FS, SF, and SS - bin on device sizes With 3 size bins and 4 corners, this model has 15,00 model parameters!
18 How many models of the MOSFET do we have? Switch-level model () Square-law model (with λ and bulk additions) α-law model (with λ and bulk additions) BSIM model (with binning extensions)
19 Model Status Simple dc Model Square-Law Model Small Signal Better Analytical dc Model Sophisticated Model for Computer Simulations BSIM Model Square-Law Model (with extensions for λ,γ effects) Short-Channel α-law Model Frequency Dependent Small Signal Simpler dc Model Switch-Level Models Ideal switches R SW and C S
20 In the next few slides, the models we have developed will be listed and reviewed Square-law Model Switch-level Models Extended Square-law model Short-channel model BSIM Model BSIM Binning Model Corner Models
21 Square-Law Model I D V S4 V S3 V DS V S V S1 0 V V S T W V = < L W ( ) L DS I μc V V V V V V V V D OX S T DS S T DS S T μc V V V V V V V OX S T S T DS S T Model Parameters : {μ,c OX,V T0 } Design Parameters : {W,L} but only one degree of freedom W/L
22 Switch-Level Models Drain ate D Source R SW C S V S Switch closed for V S = 1 S Switch-level model including gate capacitance and drain resistance C S and R SW dependent upon device sizes and process For minimum-sized devices in a 0.5u process KΩ n channel C S 1.5fF R sw 6KΩ p channel Considerable emphasis will be placed upon device sizing to manage C S and R SW Model Parameters : {C S,R SW }
23 Extended Square-Law Model I I B = 0 = 0 0 V V S T W V = < L W μc ( V V ) ( 1+ λv ) V V V V V L DS I μc V V V V V V V V D OX S T DS S T DS S T V T OX S T DS S T DS S T + γ ( φ V φ ) = VT0 BS Model Parameters : {μ,c OX,V T0,φ,γ,λ} Design Parameters : {W,L} but only one degree of freedom W/L
24 Short-Channel Model 0 V V S T θ W I = D μc V V V V V V < V OX S T DS S T DS 1 S θ L 1 W θμc V V V V V V OX S T S T DS 1 S L α ( ) θ ( V ) α α ( ) θ ( V ) T T α α is the velocity saturation index, α 1 Channel length modulation (λ) and bulk effects can be added to the velocity Saturation as well
25 BSIM model Note this model has 95 model parameters!
26 BSIM Binning Model - Bin on device sizes - multiple BSIM models! With 3 bins, this model has 3040 model parameters!
27 BSIM Corner Models - Often 4 corners in addition to nominal TT, FF, FS, SF, and SS - five different BSIM models! TT: typical-typical FF: fast n, fast p FS: fast n, slow p SF: slow n, fast p SS: slow n, slow p With 4 corners, this model has 475 model parameters!
28 Accuracy Complexity Hierarchical Model Comparisons BSIM Binning Models Analytical Numerical (for simulation only) L Number of Model Parameters BSIM Models Number of Model Parameters Square-Law Models Number of Model Parameters Switch-Level Models Approx 3000 (for 30 bins) Approx to 6 W Number of Model Parameters 0 to
29 Corner Models Basic Model { FF (Fast n, Fast p) FS (Fast n, Slow p) TT Typical-Typical SF (Slow n, Fast p) SS (Slow n, Slow p) Corner Model Applicable at any level in model hierarchy (same model, different parameters) Often 4 corners (FF, FS, SF, SS) used but sometimes many more Designers must provide enough robustness so good yield at all corners
30 n-channel. p-channel modeling Source ate Drain Bulk I D 3 V S4.5 D n-channel MOSFET D V S3 V S S D S VDS S4 S3 S S1 V S1 V > V > V > V > 0 V DS I V S I D B S D S I B B V BS V DS 0 V V S Tn W V = < L W ( ) L I =I =0 DS I μc V V V V V V V V D n OX S Tn DS S Tn DS S Tn B (for enhancement devices) μ C V V V V V V V n OX S Tn S Tn DS S Tn Positive V DS and V S cause a positive I D
31 Bulk Source n-channel. p-channel modeling ate Drain (for enhancement devices) p-channel MOSFET S S D D D B 0 V V S Tp S W VDS I = -μc V V V V V V > V V S L V S W B V BS -μ C p OX ( V V S Tp ) V V V V V S Tp DS S Tp V I DS L I B I =I =0 B I D D D p OX S Tp DS S Tp DS S Tp Negative V DS and V S cause a negative I D Functional form of models are the same, just sign differences and some parameter differences (usually mobility is the most important)
32 n-channel. p-channel modeling Bulk Source ate Drain V S I I D S B D I B V BS V DS p-channel MOSFET (for enhancement devices) 0 V V S Tp W V L W ( ) L I =I =0 DS I = -μc V V V V V V > V V D p OX S Tp DS S Tp DS S Tp B -μ C V V V V V V V p OX S Tp S Tp DS S Tp Alternate equivalent representation 0 V V S Tp W V L W ( ) L I =I =0 B These look like those for the n-channel device but with DS I = μc V V V V V V < V V D p OX S Tp DS S Tp DS S Tp μ C V V V V V V V p OX S Tp S Tp DS S Tp
33 D n-channel. p-channel modeling D S S S D S D D D B B S S I V S I D D I B B V BS V DS V S I S B I B V BS V DS S I D D I D V S4 V S3 Models essentially the same with different signs and model parameters 1 V S V S V DS VDS VS4 > VS3 > VS > V S1> 0 0 V V S Tn W V = < L W μ C ( V V ) V V V V V L I =I =0 DS I μc V V V V V V V V D n OX S Tn DS S Tn DS S Tn B n OX S Tn S Tn DS S Tn 0 V V S Tp W V L W ( ) L I =I =0 DS I = -μc V V V V V V > V V D p OX S Tp DS S Tp DS S Tp B -μ C p OX VS VTp VS VTp VDS VS VTp
34 Model Relationships Determine R SW and C S for an n-channel MOSFET from square-law model In the 0.5u CMOS process if L=1u, W=1u (Assume μc OX =100μAV -, C OX =.5fFu -,V T0 =1V, V DD =3.5V, V SS =0) 0 V V S T W V = < L W ( ) L DS I μc V V V V V V V V D OX S T DS S T DS S T μc V V V V V V V OX S T S T DS S T when SW is on, operation is deep triode
35 Model Relationships Determine R SW and C S for an n-channel MOSFET from square-law model In the 0.5u CMOS process if L=1u, W=1u (Assume μc OX =100μAV -, C OX =.5fFu -,V T0 =1V, V DD =3.5V, V SS =0) W V W L L ( ) DS I = μc V V V μc V V V D OX S T DS OX S T DS V 1 1 DS R = = = = 4KΩ SQ I W 1 D V S =VDD μc ( V V ) ( E 4) ( OX S T ) L V S =3.5V 1 C S = C OX WL = (.5fFµ - )(1µ ) =.5fF
36 Model Relationships Determine R SW and C S for an p-channel MOSFET from square-law model In the 0.5u CMOS process if L=1u, W=1u ( C OX =.5fFu -,V T0 =1V, V DD =3.5V, V SS =0) Observe µ n \ µ p 3 0 V V S T W V = < L W ( ) L DS I μc V V V V V V V V D OX S T DS S T DS S T μc V V V V V V V OX S T S T DS S T When SW is on, operation is deep triode
37 Model Relationships Determine R SW and C S for an p-channel MOSFET from square-law model In the 0.5u CMOS process if L=1u, W=1u ( C OX =.5fFu -,V T0 =1V, V DD =3.5V, V SS =0) Observe µ n \ µ p 3 0 V V S T W V = < L W ( ) L DS I μc V V V V V V V V D OX S T DS S T DS S T μc V V V V V V V OX S T S T DS S T When SW is on, operation is deep triode
38 Model Relationships Determine R SW and C S for an p-channel MOSFET from square-law model In the 0.5u CMOS process if L=1u, W=1u Observe µ n \ µ p 3 ( C OX =.5fFu -,V T0 =1V, V DD =3.5V, V SS =0) W V W DS I = μc V V V μc ( V V ) V L L D p OX S T DS p OX S T DS V 1 1 DS R = = = = 1KΩ SQ I W 1 1 D V S =VDD μc ( V V ) ( E 4) ( p OX S T ) L V S =3.5V 3 1 C S = C OX WL = (.5fFµ - )(1µ ) =.5fF Observe the resistance of the p-channel device is approximately 3 times larger than that of the n-channel device for same bias and dimensions!
39 Modeling of the MOSFET oal: Obtain a mathematical relationship between the port variables of a device. I = f ( V,V,V ) I I D B 1 = f = f 3 S DS BS ( VS,VDS,VBS ) ( V ) S,VDS,VBS ate Drain I D I D I B V DS Bulk Simple dc Model V S V BS Small Signal Better Analytical dc Model Sophisticated Model for Computer Simulations Frequency Dependent Small Signal Simpler dc Model
40 Small-Signal Model oal with small signal model is to predict performance of circuit or device in the vicinity of an operating point Operating point is often termed Q-point
41 Small-Signal Model y Y Q Q-point X Q x Analytical expressions for small signal model will be developed later
42 End of Lecture 14
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