EE 435. Lecture 2: Basic Op Amp Design. - Single Stage Low Gain Op Amps

Save this PDF as:
 WORD  PNG  TXT  JPG

Size: px
Start display at page:

Download "EE 435. Lecture 2: Basic Op Amp Design. - Single Stage Low Gain Op Amps"

Transcription

1 EE 435 ecture 2: Basic Op Amp Design - Single Stage ow Gain Op Amps 1

2 Review from last lecture: How does an amplifier differ from an operational amplifier?? Op Amp Amplifier Amplifier used in open-loop applications Operational Amplifier used in feedback applications 2

3 Review from last lecture: Conventional Wisdom Does Not Always Provide Correct Perspective even in some of the most basic or fundamental areas!! Just because its published doesn t mean its correct Just because famous people convey information as fact doesn t mean they are right Keep an open mind about everything that is done and always ask whether approach others are following is leading you in the right direction 3

4 Review from last lecture: What is an Operational Amplifier? Textbook Definition: Voltage Amplifier with Very arge Gain Very High Input Impedance Very ow Output Impedance Differential Input and Single-Ended Output 4

5 Review from last lecture: What is an Operational Amplifier? Amplifier with Very arge Gain 5

6 Review from last lecture: Are differential input and singleended outputs needed? Consider Basic Amplifiers R 2 R 1 V 1 V IN R 1 R 2 V 1 A V Inverting Amplifier V IN A V Noninverting Amplifier Only single-ended input is needed for Inverting Amplifier! Many applications only need single-ended inputs! 6

7 Review from last lecture: Basic Inverting Amplifier Using Single-Ended Op Amp R 2 R 1 V 1 V IN R 2 V IN R 1 A V Inverting Amplifier with Single-Ended Op Amp 7

8 Review from last lecture: Fully Differential Amplifier R 1 R 2 V IN R 1 R 2 Widely (almost exclusively) used in integrated amplif Seldom available in catalog parts 8

9 What is an Operational Amplifier? ets see what the experts say! X IN A X OUT β Conventional Wisdom does not provide good guidance on what an amplifier or an operational amplifier should be! What are the implications of this observation? 9

10 Basic Op Amp Design Outline Fundamental Amplifier Design Issues Single-Stage ow Gain Op Amps Single-Stage High Gain Op Amps Two-Stage Op Amp Other Basic Gain Enhancement Approaches 10

11 Single-Stage ow-gain Op Amps Single-ended input Differential Input (Symbol not intended to distinguish between different amplifier types) 11

12 Single-ended Op Amp Inverting Amplifier Consider: V YQ V YQ Slope = -A Slope = -A V XQ V IN V XQ V IN Assume Q-point at {V XQ,V YQ } V f OUT V IN V A V V V OUT IN xq YQ When operating near the Q-point, the linear and nonlinear model of the amplifier are nearly the same If the gain of the amplifier is large, V XQ is a characteristic of the amplifier 12

13 V IN R 1 Single-ended Op Amp Inverting Amplifier V 1 R 2 A V V = -A V -V +V O 1 XQ YQ R R V = V + V O IN R 1+R2 R 1+R2 V YQ Eliminating V 1 we obtain: R 1 R V = -A V + 2 V -V +V 0 0 IN XQ YQ R 1+R2 R 1+R2 Slope = -A If we define V iss by V IN =V INQ +V iss V XQ V IN R2 -A R 1 R 2 A 1 V = V +V V V R 1 1 R1 R A 1+A 1 A 1 R1 R2 R 1+R2 R1 R2 0 iss INQ XQ YQ 13

14 Single-ended Op Amp Inverting Amplifier R 2 V IN R 1 V 1 A V R2 -A R 1 R 2 A 1 V = V + V V V R 1 1 R1 R A 1+A 1 A 1 R1 R2 R 1+ R2 R1 R2 0 iss INQ XQ YQ But if A is large, this reduces to R R V = - V + V + V -V 2 2 O inss XQ XQ inq R1 R1 Note that as long as A is large, if V inq is close to V XQ R V - V + V 2 O inss XQ R1 14

15 Single-ended Op Amp Inverting Amplifier V IN R 1 V 1 R 2 A V V = -A V -V +V O 1 XQ YQ R R V = V + V O IN R 1+R2 R 1+R2 Summary: V YQ R R V = - V + V + V -V 2 2 O inss XQ XQ inq R1 R1 Slope = -A V XQ V IN What type of circuits have the transfer characteristic shown? 15

16 Single-stage single-input low-gain op amp V DD V DD V XX I DQ M 2 V in M 1 C V in M 1 C V SS V SS Basic Structure Practical Implementation Have added the load capacitance to include frequency dependence of the amplifier gain 16

17 This is not a new idea! 17

18 Review of ss steady-state analysis Standard Approach to Circuit Analysis X i (t) Time Domain Circuit Circuit Analysis KV, KC Set of Differential Equations Solution of Differential Equations X OUT (t) 18

19 Review of ss steady-state analysis Time, Phasor, and s- Domain Analysis X i (t) X i (S) s Transform Phasor Transform X i (jω) s-domain Circuit Time Domain Circuit Phasor Domain Circuit Circuit Analysis KV, KC Circuit Analysis KV, KC Circuit Analysis KV, KC Set of inear equations in s Set of Differential Equations Set of inear equations in jω Solution of inear Equations Solution of Differential Equations Solution of inear Equations X OUT (S) Inverse s Transform Inverse Phasor Transform X OUT (jω) X OUT (t) 19

20 Review of ss steady-state analysis Time and s- Domain Analysis X i (t) X i (S) s-transform s-domain Circuit Time Domain Circuit Circuit Analysis KV, KC Circuit Analysis KV, KC Set of inear equations in s Set of Differential Equations Solution of inear Equations Solution of Differential Equations X OUT (S) Inverse s Transform X OUT (t) 20

21 Review of ss steady-state analysis s- Domain Analysis X i (t) X i (S) s- Transform s- Domain Circuit Time Domain Circuit Circuit Analysis KV, KC Set of inear equations in s Solution of inear Equations X OUT (S) Inverse s Transform X OUT (t) 21

22 Review of ss steady-state analysis Dc and small-signal equivalent elements Element ss equivalent dc equivalnet dc Voltage Source V DC V DC ac Voltage Source V AC V AC dc Current Source I DC I DC ac Current Source I AC I AC Resistor R R R 22

23 Review of ss steady-state analysis Dc and small-signal equivalent elements Element ss equivalent dc equivalnet Capacitors C arge C Small C arge Inductors Small Diodes Simplified MOS transistors Simplified Simplified 23

24 Review of ss steady-state analysis Dc and small-signal equivalent elements Element ss equivalent dc equivalnet Bipolar Transistors Simplified Simplified Dependent Sources 24

25 Review of ss steady-state analysis Summary of Sinusoidal Steady-State Analysis Methods for inear Networks Time-Domain Circuit Circuit Analysis Differential Equations aplace Transform inear s-domain Equations s V OUT s =T sv s IN Transfer Function of Time-Domain Circuit: Key Theorem: V Ts = V OUT IN s s If a sinusoidal input V IN =V M sin(ωt+θ) is applied to a linear system that has transfer function T(s), then the steady-state output is given by the expression V T jω sin ωt+θ+ Tjω v t out M 25

26 Single-stage single-input low-gain op amp V DD V DD I DQ V XX M 2 V in M 1 C V in M 1 C V SS V SS Small Signal Models g o C V IN V gs g m V gs V gs1 g m1 V gs1 g 01 +g 02 V IN V O C A v sc g m g o dc Voltage gain is ratio of overall transconductance gain to output conductance A v sc g g m1 o1 g o2 26

27 Single-stage single-input low-gain op amp V DD V DD I DQ M 1 C V XX M 2 C V in V in M 1 Observe in either case the small signal equivalent circuit is a two-port of the form: V in V SS I 2 V SS V 1 G M V 1 G V 2 All properties of the circuit are determined by G M and G 27

28 Single-stage single-input low-gain op amp Small Signal Model of the op amp I 2 V in V 1 G M V 1 G V 2 Alternate equivalent small signal model obtained by Norton to Thevenin transformation V 1 A V V 1 G I 2 V 2 A M V = - G All properties of the circuit are determined by A V and G G 28

29 Single-stage single-input low-gain op amp V IN V 1 G M V 1 G C -G A M v = sc +G A = v0 -G G M G BW = C A V G G G GB = = G C C M M GB and A VO are two of the most important parameters in an op amp 29

30 Single-stage single-input low-gain op amp V IN V 1 G M V 1 G C -g A m v = sc +g 0 for notational convenience -g A m v0 = g 0 g BW = C 0 V IN V 1 g m V 1 g 0 C gm g0 g GB = = g C C m 0 Op Amp The parameters g m and g o give little insight into design 30

31 How do we design an amplifier with a given architecture in general or this architecture in particular? What is the design space? V DD I DQ M 1 C Generally V SS, V DD,C (and possibly Q )will be fixed Must determine { W 1, 1,I DQ and V INQ } Thus there are 4 design variables But W 1 and 1 appear as a ratio in almost all performance characteristics of interest V in and I DQ is related to V INQ, W 1 and 1 V SS Thus the design space generally has only two independent variables or two degrees of freedom W 1 1 Thus design or synthesis with this architecture involves exploring the two-dimensional design space 31 W 1,I DQ 1,I DQ

32 How do we design an amplifier with a given architecture in general or this architecture in particular? What is the design space? Generally V SS, V DD,C (and possibly Q )will be fixed Must determine { W 1, 1,I DQ and V INQ } Thus there are 4 design variables But W 1 and 1 appear as a ratio in almost all performance characteristics of interest and I DQ is related to V INQ, W 1 and 1 Thus the design space generally has only two independent variables or two degrees of freedom W 1 Thus design or synthesis with this architecture involves exploring the two-dimensional design space W 1 1,I DQ 1,I DQ 1. Determine the design space 2. Identify the constraints 3. Determine the entire set of unknown variables and the Degrees of Freedom 4. Determine an appropriate parameter domain (Parameter domains for characterizing the design space are not unique!) 5. Explore the resultant design space with the identified number of Degrees of Freedom 32

33 How do we design an amplifier with a given architecture? 1. Determine the design space 2. Identify the constraints 3. Determine the entire set of unknown variables and the Degrees of Freedom 4. Determine an appropriate parameter domain 5. Explore the resultant design space with the identified number of Degrees of Freedom 33

34 Parameter Domains for Characterizing Amplifier Performance Should give insight into design Variables should be independent Should be of minimal size Should result in simple design expressions Most authors give little consideration to either the parameter domain or the degrees of freedom that constrain the designer 34

35 Parameter Domains for Characterizing Amplifier Performance Consider basic op amp structure V in V DD I DQ M 1 V SS C -g A m v = sc +g 0 -g A m v0 = g 0 g GB = C Small signal parameter domain : g m, g0 m Degrees of Freedom: 2 Small signal parameter domain obscures implementation issues 35

36 Parameter Domains for Characterizing Amplifier Performance Consider basic op amp structure V in V DD V SS I DQ M 1 C -g A m v = sc +g 0 -g A m v0 = g 0 g GB = C What parameters does the designer really have to work with? W,IDQ Degrees of Freedom: 2 Call this the natural parameter domain m 36

37 V in g m Parameter Domains for Characterizing Amplifier Performance Consider basic op amp structure 2I V DQ EB V DD V SS I DQ M 1 C μc OXW V EB C OX Natural parameter domain W I DQ W,IDQ g GB = C How do performance metrics A VO and GB relate to the natural domain parameters? m -g A m v0 = g 0 g λi o DQ 37

38 Parameter Domains for Characterizing Amplifier Performance Degrees of Freedom: 2 Small signal parameter domain : -g A = m gm g v0 0 GB = C Natural design parameter domain: A V0 = W 2μCOX λidq GB = {g m,g 0 } W 2μCOX C -g A m v = sc +g 0 W,IDQ IDQ Expressions very complicated Both A V0 and GB depend upon both design paramaters Natural parameter domain gives little insight into design and has complicated expressions 38

39 Parameter Domains for Characterizing Amplifier Performance Degrees of Freedom: 2 Small signal parameter domain : -g A = m gm g v0 Natural design parameter domain: 0 W 2μCOX A V0= λ IDQ GB = GB = C {g m,g 0 } W,IDQ 2μCOX W IDQ C Process Dependent Architecture Dependent Process Dependent Architecture Dependent 39

40 Parameter Domains for Characterizing Amplifier Performance Degrees of Freedom: 2 Small signal parameter domain : -gm gm A v0 = g 0 Natural design parameter domain: W 2μCOX A V0= λ IDQ Alternate parameter domain: GB = C {g m,g 0 } GB = W,IDQ 2μCOX W IDQ C P,V EB P=power=V DD I DQ V EB =excess bias =V GSQ -V T g 2I 1 2 A V0 = = = g V λi λv M DQ 0 EB DQ EB gm 2IDQ 1 2 P GB = = = C V C V C V EB DD EB 40

41 Parameter Domains for Characterizing Amplifier Performance Degrees of Freedom: 2 Small signal parameter domain : -g g m m A v0 = g 0 Natural design parameter domain: W 2μCOX A V0= λ IDQ GB = C {g m,g 0 } W,IDQ Alternate parameter domain: A = V0 2 1 λ V EB GB = 2μCOX W IDQ C 2 P GB= V DD C V EB P,V EB Process Dependent 41

42 Parameter Domains for Characterizing Amplifier Performance Degrees of Freedom: 2 Small signal parameter domain : -g A = m gm g Natural design parameter domain: A v0 VO 2 C OX W I DQ Alternate parameter domain: A = V0 0 EB GB GB = C {g m,g 0 } 2C C OX W P λ V GB= V DD C V EB I DQ W,IDQ P,V EB Architecture Dependent 42

43 Parameter Domains for Characterizing Amplifier Performance Degrees of Freedom: 2 Small signal parameter domain : -g A = m gm g v0 Natural design parameter domain: A VO 2 C OX W I DQ Alternate parameter domain: A = V0 0 EB GB = C {g m,g 0 } GB 2C Alternate parameter domain gives considerable insight into design Alternate parameter domain provides modest parameter decoupling 43 Term in box figure of merit for comparing architectures C OX W P λ V GB= V DD C V EB I DQ W,IDQ P,V EB

44 Parameter Domains for Characterizing Amplifier Performance Design often easier if approached in the alternate parameter domain How does one really get the design done, though? That is, how does one get back from the alternate parameter domain to the natural parameter domain? Alternate parameter domain: P,V EB V DD V in V SS I DQ M 1 C W =? =? I DQ =? V INQ =? 44

45 Parameter Domains for Characterizing Amplifier Performance Design often easier if approached in the alternate parameter domain How does one really get the design done, though? That is, how does one get back from the alternate parameter domain to the natural parameter domain? Alternate parameter domain: P,V EB Natural design parameter domain: W,IDQ I DQ P = V DD W P = V μc V 2 DD OX EB V =V V I INQ SS T DQ 2 C W OX 45

46 How do we design an amplifier with a given architecture? 1. Determine the design space 2. Identify the constraints 3. Determine the entire set of unknown variables and the Degrees of Freedom 4. Determine an appropriate parameter domain 5. Explore the resultant design space with the identified number of Degrees of Freedom 46

47 Design With the Basic Amplifier Structure Consider basic op amp structure V DD I DQ Alternate parameter domain: Degrees of Freedom: 2 A = V0 2 1 λ V EB P,V EB V in V SS M 1 C P W P I = = 2 V DQ DD 2 P GB= V DD C V EB V μc V INQ SS T DQ DD OX EB V =V V I 2 C W OX But what if the design requirement dictates that V INQ =0? Increase the number of constraints from 2 to 3 Decrease the Degrees of Freedom from 2 to 1 Question: How can one meet two or more performance requirements with one design degree of freedom with this circuit? 50

48 Design With the Basic Amplifier Structure Consider basic op amp structure V DD I DQ Alternate parameter domain: Degrees of Freedom: 2 A = V0 2 1 λ V EB P,V EB V in V SS M 1 C P W P I = = 2 V DQ DD 2 P GB= V DD C V EB V μc V INQ SS T DQ DD OX EB V =V V I 2 C W OX But what if the design requirement dictates that V INQ =0? Question: How can one meet two or more performance requirements with one design degree of freedom with this circuit? Degrees of Freedom: 1 uck or Can t 51

EE 435. Lecture 2: Basic Op Amp Design. - Single Stage Low Gain Op Amps

EE 435. Lecture 2: Basic Op Amp Design. - Single Stage Low Gain Op Amps EE 435 ecture 2: Basic Op mp Design - Single Stage ow Gain Op mps 1 Review from last lecture: How does an amplifier differ from an operational amplifier?? Op mp mplifier mplifier used in open-loop applications

More information

EE 435. Lecture 3 Spring Design Space Exploration --with applications to single-stage amplifier design

EE 435. Lecture 3 Spring Design Space Exploration --with applications to single-stage amplifier design EE 435 ecture 3 Spring 2019 Design Space Exploration --with applications to single-stage amplifier design 1 Review from last lecture: Single-ended Op Amp Inverting Amplifier V IN R 1 V 1 R 2 A V V OUT

More information

EE 435. Lecture 3 Spring Design Space Exploration --with applications to single-stage amplifier design

EE 435. Lecture 3 Spring Design Space Exploration --with applications to single-stage amplifier design EE 435 Lecture 3 Spring 2016 Design Space Exploration --with applications to single-stage amplifier design 1 Review from last lecture: Single-ended Op Amp Inverting Amplifier V IN R 1 V 1 R 2 A V V OUT

More information

EE 330 Lecture 22. Small Signal Modelling Operating Points for Amplifier Applications Amplification with Transistor Circuits

EE 330 Lecture 22. Small Signal Modelling Operating Points for Amplifier Applications Amplification with Transistor Circuits EE 330 Lecture 22 Small Signal Modelling Operating Points for Amplifier Applications Amplification with Transistor Circuits Exam 2 Friday March 9 Exam 3 Friday April 13 Review Session for Exam 2: 6:00

More information

EE 330 Lecture 25. Amplifier Biasing (precursor) Two-Port Amplifier Model

EE 330 Lecture 25. Amplifier Biasing (precursor) Two-Port Amplifier Model EE 330 Lecture 25 Amplifier Biasing (precursor) Two-Port Amplifier Model Review from Last Lecture Exam Schedule Exam 2 Friday March 24 Review from Last Lecture Graphical Analysis and Interpretation 2 OX

More information

Input and Output Impedances with Feedback

Input and Output Impedances with Feedback EE 3 Lecture Basic Feedback Configurations Generalized Feedback Schemes Integrators Differentiators First-order active filters Second-order active filters Review from Last Time Input and Output Impedances

More information

EE 435. Lecture 16. Compensation Systematic Two-Stage Op Amp Design

EE 435. Lecture 16. Compensation Systematic Two-Stage Op Amp Design EE 435 Lecture 6 Compensation Systematic Two-Stage Op Amp Design Review from last lecture Review of Basic Concepts Pole Locations and Stability Theorem: A system is stable iff all closed-loop poles lie

More information

EE 330 Lecture 25. Small Signal Modeling

EE 330 Lecture 25. Small Signal Modeling EE 330 Lecture 25 Small Signal Modeling Review from Last Lecture Amplification with Transistors From Wikipedia: Generall, an amplifier or simpl amp, is an device that changes, usuall increases, the amplitude

More information

Chapter 10 Sinusoidal Steady State Analysis Chapter Objectives:

Chapter 10 Sinusoidal Steady State Analysis Chapter Objectives: Chapter 10 Sinusoidal Steady State Analysis Chapter Objectives: Apply previously learn circuit techniques to sinusoidal steady-state analysis. Learn how to apply nodal and mesh analysis in the frequency

More information

Chapter 10 AC Analysis Using Phasors

Chapter 10 AC Analysis Using Phasors Chapter 10 AC Analysis Using Phasors 10.1 Introduction We would like to use our linear circuit theorems (Nodal analysis, Mesh analysis, Thevenin and Norton equivalent circuits, Superposition, etc.) to

More information

Lecture 13 MOSFET as an amplifier with an introduction to MOSFET small-signal model and small-signal schematics. Lena Peterson

Lecture 13 MOSFET as an amplifier with an introduction to MOSFET small-signal model and small-signal schematics. Lena Peterson Lecture 13 MOSFET as an amplifier with an introduction to MOSFET small-signal model and small-signal schematics Lena Peterson 2015-10-13 Outline (1) Why is the CMOS inverter gain not infinite? Large-signal

More information

ECE315 / ECE515 Lecture 11 Date:

ECE315 / ECE515 Lecture 11 Date: ecture 11 Date: 15.09.016 MOS Differential Pair Quantitative Analysis differential input Small Signal Analysis MOS Differential Pair ECE315 / ECE515 M 1 and M are perfectly matched (at least in theory!)

More information

EE100Su08 Lecture #9 (July 16 th 2008)

EE100Su08 Lecture #9 (July 16 th 2008) EE100Su08 Lecture #9 (July 16 th 2008) Outline HW #1s and Midterm #1 returned today Midterm #1 notes HW #1 and Midterm #1 regrade deadline: Wednesday, July 23 rd 2008, 5:00 pm PST. Procedure: HW #1: Bart

More information

EE 230 Lecture 25. Waveform Generators. - Sinusoidal Oscillators The Wein-Bridge Structure

EE 230 Lecture 25. Waveform Generators. - Sinusoidal Oscillators The Wein-Bridge Structure EE 230 Lecture 25 Waveform Generators - Sinusoidal Oscillators The Wein-Bridge Structure Quiz 9 The circuit shown has been proposed as a sinusoidal oscillator. Determine the oscillation criteria and the

More information

Schedule. ECEN 301 Discussion #20 Exam 2 Review 1. Lab Due date. Title Chapters HW Due date. Date Day Class No. 10 Nov Mon 20 Exam Review.

Schedule. ECEN 301 Discussion #20 Exam 2 Review 1. Lab Due date. Title Chapters HW Due date. Date Day Class No. 10 Nov Mon 20 Exam Review. Schedule Date Day lass No. 0 Nov Mon 0 Exam Review Nov Tue Title hapters HW Due date Nov Wed Boolean Algebra 3. 3.3 ab Due date AB 7 Exam EXAM 3 Nov Thu 4 Nov Fri Recitation 5 Nov Sat 6 Nov Sun 7 Nov Mon

More information

4/27 Friday. I have all the old homework if you need to collect them.

4/27 Friday. I have all the old homework if you need to collect them. 4/27 Friday Last HW: do not need to turn it. Solution will be posted on the web. I have all the old homework if you need to collect them. Final exam: 7-9pm, Monday, 4/30 at Lambert Fieldhouse F101 Calculator

More information

EE 230 Lecture 20. Nonlinear Op Amp Applications. The Comparator Nonlinear Analysis Methods

EE 230 Lecture 20. Nonlinear Op Amp Applications. The Comparator Nonlinear Analysis Methods EE 230 Lecture 20 Nonlinear Op Amp Applications The Comparator Nonlinear Analysis Methods Quiz 14 What is the major purpose of compensation when designing an operatinal amplifier? And the number is? 1

More information

Chapter 10 Feedback. PART C: Stability and Compensation

Chapter 10 Feedback. PART C: Stability and Compensation 1 Chapter 10 Feedback PART C: Stability and Compensation Example: Non-inverting Amplifier We are analyzing the two circuits (nmos diff pair or pmos diff pair) to realize this symbol: either of the circuits

More information

Electronic Circuits Summary

Electronic Circuits Summary Electronic Circuits Summary Andreas Biri, D-ITET 6.06.4 Constants (@300K) ε 0 = 8.854 0 F m m 0 = 9. 0 3 kg k =.38 0 3 J K = 8.67 0 5 ev/k kt q = 0.059 V, q kt = 38.6, kt = 5.9 mev V Small Signal Equivalent

More information

CHAPTER 14 SIGNAL GENERATORS AND WAVEFORM SHAPING CIRCUITS

CHAPTER 14 SIGNAL GENERATORS AND WAVEFORM SHAPING CIRCUITS CHAPTER 4 SIGNA GENERATORS AND WAEFORM SHAPING CIRCUITS Chapter Outline 4. Basic Principles of Sinusoidal Oscillators 4. Op Amp RC Oscillators 4.3 C and Crystal Oscillators 4.4 Bistable Multivibrators

More information

(amperes) = (coulombs) (3.1) (seconds) Time varying current. (volts) =

(amperes) = (coulombs) (3.1) (seconds) Time varying current. (volts) = 3 Electrical Circuits 3. Basic Concepts Electric charge coulomb of negative change contains 624 0 8 electrons. Current ampere is a steady flow of coulomb of change pass a given point in a conductor in

More information

EE40 Lec 20. MOS Circuits

EE40 Lec 20. MOS Circuits EE40 Lec 20 MOS Circuits eading: Chap. 12 of Hambley Supplement reading on MOS Circuits http://www.inst.eecs.berkeley.edu/~ee40/fa09/handouts/ee40_mos_circuit.pdf Slide 1 Bias circuits OUTLINE Smallsignal

More information

SOME USEFUL NETWORK THEOREMS

SOME USEFUL NETWORK THEOREMS APPENDIX D SOME USEFUL NETWORK THEOREMS Introduction In this appendix we review three network theorems that are useful in simplifying the analysis of electronic circuits: Thévenin s theorem Norton s theorem

More information

EE 3120 Electric Energy Systems Study Guide for Prerequisite Test Wednesday, Jan 18, pm, Room TBA

EE 3120 Electric Energy Systems Study Guide for Prerequisite Test Wednesday, Jan 18, pm, Room TBA EE 3120 Electric Energy Systems Study Guide for Prerequisite Test Wednesday, Jan 18, 2006 6-7 pm, Room TBA First retrieve your EE2110 final and other course papers and notes! The test will be closed book

More information

Lecture 37: Frequency response. Context

Lecture 37: Frequency response. Context EECS 05 Spring 004, Lecture 37 Lecture 37: Frequency response Prof J. S. Smith EECS 05 Spring 004, Lecture 37 Context We will figure out more of the design parameters for the amplifier we looked at in

More information

Lecture 23: Negative Resistance Osc, Differential Osc, and VCOs

Lecture 23: Negative Resistance Osc, Differential Osc, and VCOs EECS 142 Lecture 23: Negative Resistance Osc, Differential Osc, and VCOs Prof. Ali M. Niknejad University of California, Berkeley Copyright c 2005 by Ali M. Niknejad A. M. Niknejad University of California,

More information

PHYS225 Lecture 9. Electronic Circuits

PHYS225 Lecture 9. Electronic Circuits PHYS225 Lecture 9 Electronic Circuits Last lecture Field Effect Transistors Voltage controlled resistor Various FET circuits Switch Source follower Current source Similar to BJT Draws no input current

More information

EE105 - Fall 2006 Microelectronic Devices and Circuits. Some Administrative Issues

EE105 - Fall 2006 Microelectronic Devices and Circuits. Some Administrative Issues EE105 - Fall 006 Microelectronic evices and Circuits Prof. Jan M. Rabaey (jan@eecs Lecture 8: MOS Small Signal Model Some Administrative Issues REIEW Session Next Week Tu Sept 6 6:00-7:30pm; 060 alley

More information

Chapter 13 Small-Signal Modeling and Linear Amplification

Chapter 13 Small-Signal Modeling and Linear Amplification Chapter 13 Small-Signal Modeling and Linear Amplification Microelectronic Circuit Design Richard C. Jaeger Travis N. Blalock 1/4/12 Chap 13-1 Chapter Goals Understanding of concepts related to: Transistors

More information

Electronics II. Final Examination

Electronics II. Final Examination The University of Toledo f17fs_elct27.fm 1 Electronics II Final Examination Problems Points 1. 11 2. 14 3. 15 Total 40 Was the exam fair? yes no The University of Toledo f17fs_elct27.fm 2 Problem 1 11

More information

EE 230 Lecture 33. Nonlinear Circuits and Nonlinear Devices. Diode BJT MOSFET

EE 230 Lecture 33. Nonlinear Circuits and Nonlinear Devices. Diode BJT MOSFET EE 230 Lecture 33 Nonlinear Circuits and Nonlinear Devices Diode BJT MOSFET Review from Last Time: n-channel MOSFET Source Gate L Drain W L EFF Poly Gate oxide n-active p-sub depletion region (electrically

More information

Conventional Wisdom Benefits and Consequences of Annealing Understanding of Engineering Principles

Conventional Wisdom Benefits and Consequences of Annealing Understanding of Engineering Principles EE 508 Lecture 41 Conventional Wisdom Benefits and Consequences of Annealing Understanding of Engineering Principles by Randy Geiger Iowa State University Review from last lecture Conventional Wisdom:

More information

OPERATIONAL AMPLIFIER APPLICATIONS

OPERATIONAL AMPLIFIER APPLICATIONS OPERATIONAL AMPLIFIER APPLICATIONS 2.1 The Ideal Op Amp (Chapter 2.1) Amplifier Applications 2.2 The Inverting Configuration (Chapter 2.2) 2.3 The Non-inverting Configuration (Chapter 2.3) 2.4 Difference

More information

University of Toronto. Final Exam

University of Toronto. Final Exam University of Toronto Final Exam Date - Dec 16, 013 Duration:.5 hrs ECE331 Electronic Circuits Lecturer - D. Johns ANSWER QUESTIONS ON THESE SHEETS USING BACKS IF NECESSARY 1. Equation sheet is on last

More information

ECEN 326 Electronic Circuits

ECEN 326 Electronic Circuits ECEN 326 Electronic Circuits Stability Dr. Aydın İlker Karşılayan Texas A&M University Department of Electrical and Computer Engineering Ideal Configuration V i Σ V ε a(s) V o V fb f a(s) = V o V ε (s)

More information

Department of Electrical Engineering and Computer Sciences University of California, Berkeley. Final Exam Solutions

Department of Electrical Engineering and Computer Sciences University of California, Berkeley. Final Exam Solutions Electrical Engineering 42/00 Summer 202 Instructor: Tony Dear Department of Electrical Engineering and omputer Sciences University of alifornia, Berkeley Final Exam Solutions. Diodes Have apacitance?!?!

More information

Electronics II. Midterm #1

Electronics II. Midterm #1 The University of Toledo EECS:3400 Electronics I su3ms_elct7.fm Section Electronics II Midterm # Problems Points. 5. 6 3. 9 Total 0 Was the exam fair? yes no The University of Toledo su3ms_elct7.fm Problem

More information

Notes for course EE1.1 Circuit Analysis TOPIC 10 2-PORT CIRCUITS

Notes for course EE1.1 Circuit Analysis TOPIC 10 2-PORT CIRCUITS Objectives: Introduction Notes for course EE1.1 Circuit Analysis 4-5 Re-examination of 1-port sub-circuits Admittance parameters for -port circuits TOPIC 1 -PORT CIRCUITS Gain and port impedance from -port

More information

Bipolar Junction Transistor (BJT) - Introduction

Bipolar Junction Transistor (BJT) - Introduction Bipolar Junction Transistor (BJT) - Introduction It was found in 1948 at the Bell Telephone Laboratories. It is a three terminal device and has three semiconductor regions. It can be used in signal amplification

More information

MOS Transistor Theory

MOS Transistor Theory MOS Transistor Theory So far, we have viewed a MOS transistor as an ideal switch (digital operation) Reality: less than ideal EE 261 Krish Chakrabarty 1 Introduction So far, we have treated transistors

More information

E1.1 Analysis of Circuits ( ) Revision Lecture 1 1 / 13

E1.1 Analysis of Circuits ( ) Revision Lecture 1 1 / 13 RevisionLecture 1: E1.1 Analysis of Circuits (2014-4530) Revision Lecture 1 1 / 13 Format Question 1 (40%): eight short parts covering the whole syllabus. Questions 2 and 3: single topic questions (answer

More information

Lecture 120 Compensation of Op Amps-I (1/30/02) Page ECE Analog Integrated Circuit Design - II P.E. Allen

Lecture 120 Compensation of Op Amps-I (1/30/02) Page ECE Analog Integrated Circuit Design - II P.E. Allen Lecture 20 Compensation of Op AmpsI (/30/02) Page 20 LECTURE 20 COMPENSATION OF OP AMPS I (READING: GHLM 425434 and 624638, AH 249260) INTRODUCTION The objective of this presentation is to present the

More information

Lecture 23 Frequency Response of Amplifiers (I) Common Source Amplifier. December 1, 2005

Lecture 23 Frequency Response of Amplifiers (I) Common Source Amplifier. December 1, 2005 6.02 Microelectronic Devices and Circuits Fall 2005 Lecture 23 Lecture 23 Frequency Response of Amplifiers (I) Common Source Amplifier December, 2005 Contents:. Introduction 2. Intrinsic frequency response

More information

Homework Assignment 08

Homework Assignment 08 Homework Assignment 08 Question 1 (Short Takes) Two points each unless otherwise indicated. 1. Give one phrase/sentence that describes the primary advantage of an active load. Answer: Large effective resistance

More information

Sinusoidal Steady State Analysis (AC Analysis) Part I

Sinusoidal Steady State Analysis (AC Analysis) Part I Sinusoidal Steady State Analysis (AC Analysis) Part I Amin Electronics and Electrical Communications Engineering Department (EECE) Cairo University elc.n102.eng@gmail.com http://scholar.cu.edu.eg/refky/

More information

E40M. Op Amps. M. Horowitz, J. Plummer, R. Howe 1

E40M. Op Amps. M. Horowitz, J. Plummer, R. Howe 1 E40M Op Amps M. Horowitz, J. Plummer, R. Howe 1 Reading A&L: Chapter 15, pp. 863-866. Reader, Chapter 8 Noninverting Amp http://www.electronics-tutorials.ws/opamp/opamp_3.html Inverting Amp http://www.electronics-tutorials.ws/opamp/opamp_2.html

More information

Unit 2: Modeling in the Frequency Domain. Unit 2, Part 4: Modeling Electrical Systems. First Example: Via DE. Resistors, Inductors, and Capacitors

Unit 2: Modeling in the Frequency Domain. Unit 2, Part 4: Modeling Electrical Systems. First Example: Via DE. Resistors, Inductors, and Capacitors Unit 2: Modeling in the Frequency Domain Part 4: Modeling Electrical Systems Engineering 582: Control Systems I Faculty of Engineering & Applied Science Memorial University of Newfoundland January 20,

More information

Design of Analog Integrated Circuits

Design of Analog Integrated Circuits Design of Analog Integrated Circuits Chapter 11: Introduction to Switched- Capacitor Circuits Textbook Chapter 13 13.1 General Considerations 13.2 Sampling Switches 13.3 Switched-Capacitor Amplifiers 13.4

More information

6.301 Solid-State Circuits Recitation 14: Op-Amps and Assorted Other Topics Prof. Joel L. Dawson

6.301 Solid-State Circuits Recitation 14: Op-Amps and Assorted Other Topics Prof. Joel L. Dawson First, let s take a moment to further explore device matching for current mirrors: I R I 0 Q 1 Q 2 and ask what happens when Q 1 and Q 2 operate at different temperatures. It turns out that grinding through

More information

EE 230 Lecture 21. Nonlinear Op Amp Applications. Nonlinear analysis methods Comparators with Hysteresis

EE 230 Lecture 21. Nonlinear Op Amp Applications. Nonlinear analysis methods Comparators with Hysteresis EE 230 Lecture 2 Nonlinear Op Amp Applications Nonlinear analysis methods Comparators with Hysteresis Quiz 5 Plot the transfer charactristics of the following circuit. Assume the op amp has =2 and SATL

More information

EE 330 Lecture 25. Amplifier Biasing (precursor) Two-Port Amplifier Model

EE 330 Lecture 25. Amplifier Biasing (precursor) Two-Port Amplifier Model EE 330 Lecture 25 Amplifier Biasing (precursor) Two-Port Amplifier Model Amplifier Biasing (precursor) V CC R 1 V out V in B C E V EE Not convenient to have multiple dc power supplies Q very sensitive

More information

Chapter 10: Sinusoidal Steady-State Analysis

Chapter 10: Sinusoidal Steady-State Analysis Chapter 10: Sinusoidal Steady-State Analysis 10.1 10.2 10.3 10.4 10.5 10.6 10.9 Basic Approach Nodal Analysis Mesh Analysis Superposition Theorem Source Transformation Thevenin & Norton Equivalent Circuits

More information

EE 330 Lecture 16. Devices in Semiconductor Processes. MOS Transistors

EE 330 Lecture 16. Devices in Semiconductor Processes. MOS Transistors EE 330 Lecture 16 Devices in Semiconductor Processes MOS Transistors Review from Last Time Model Summary I D I V DS V S I B V BS = 0 0 VS VT W VDS ID = μcox VS VT VDS VS V VDS VS VT L T < W μc ( V V )

More information

EECS 105: FALL 06 FINAL

EECS 105: FALL 06 FINAL University of California College of Engineering Department of Electrical Engineering and Computer Sciences Jan M. Rabaey TuTh 2-3:30 Wednesday December 13, 12:30-3:30pm EECS 105: FALL 06 FINAL NAME Last

More information

EIT Review. Electrical Circuits DC Circuits. Lecturer: Russ Tatro. Presented by Tau Beta Pi The Engineering Honor Society 10/3/2006 1

EIT Review. Electrical Circuits DC Circuits. Lecturer: Russ Tatro. Presented by Tau Beta Pi The Engineering Honor Society 10/3/2006 1 EIT Review Electrical Circuits DC Circuits Lecturer: Russ Tatro Presented by Tau Beta Pi The Engineering Honor Society 10/3/2006 1 Session Outline Basic Concepts Basic Laws Methods of Analysis Circuit

More information

I. Frequency Response of Voltage Amplifiers

I. Frequency Response of Voltage Amplifiers I. Frequency Response of Voltage Amplifiers A. Common-Emitter Amplifier: V i SUP i OUT R S V BIAS R L v OUT V Operating Point analysis: 0, R s 0, r o --->, r oc --->, R L ---> Find V BIAS such that I C

More information

EE 330 Lecture 31. Current Source Biasing Current Sources and Mirrors

EE 330 Lecture 31. Current Source Biasing Current Sources and Mirrors EE 330 Lecture 31 urrent Source Biasing urrent Sources and Mirrors eview from Last Lecture Basic mplifier Gain Table DD DD DD DD in B E out in B E out E B BB in E out in B E E out in 2 D Q EE SS E/S /D

More information

E2.2 Analogue Electronics

E2.2 Analogue Electronics E2.2 Analogue Electronics Instructor : Christos Papavassiliou Office, email : EE 915, c.papavas@imperial.ac.uk Lectures : Monday 2pm, room 408 (weeks 2-11) Thursday 3pm, room 509 (weeks 4-11) Problem,

More information

EE105 Fall 2015 Microelectronic Devices and Circuits Frequency Response. Prof. Ming C. Wu 511 Sutardja Dai Hall (SDH)

EE105 Fall 2015 Microelectronic Devices and Circuits Frequency Response. Prof. Ming C. Wu 511 Sutardja Dai Hall (SDH) EE05 Fall 205 Microelectronic Devices and Circuits Frequency Response Prof. Ming C. Wu wu@eecs.berkeley.edu 5 Sutardja Dai Hall (SDH) Amplifier Frequency Response: Lower and Upper Cutoff Frequency Midband

More information

1/13/12 V DS. I d V GS. C ox ( = f (V GS ,V DS ,V SB = I D. + i d + I ΔV + I ΔV BS V BS. 19 January 2012

1/13/12 V DS. I d V GS. C ox ( = f (V GS ,V DS ,V SB = I D. + i d + I ΔV + I ΔV BS V BS. 19 January 2012 /3/ 9 January 0 Study the linear model of MOS transistor around an operating point." MOS in saturation: V GS >V th and V S >V GS -V th " VGS vi - I d = I i d VS I d = µ n ( L V V γ Φ V Φ GS th0 F SB F

More information

EE C245 ME C218 Introduction to MEMS Design

EE C245 ME C218 Introduction to MEMS Design EE C45 ME C8 Introduction to MEMS Design Fall 007 Prof. Clark T.-C. Nguyen Dept. of Electrical Engineering & Computer Sciences University of California at Berkeley Berkeley, CA 9470 Lecture 5: Output t

More information

EE 230. Lecture 4. Background Materials

EE 230. Lecture 4. Background Materials EE 230 Lecture 4 Background Materials Transfer Functions Test Equipment in the Laboratory Quiz 3 If the input to a system is a sinusoid at KHz and if the output is given by the following expression, what

More information

EE313 Fall 2013 Exam #1 (100 pts) Thursday, September 26, 2013 Name. 1) [6 pts] Convert the following time-domain circuit to the RMS Phasor Domain.

EE313 Fall 2013 Exam #1 (100 pts) Thursday, September 26, 2013 Name. 1) [6 pts] Convert the following time-domain circuit to the RMS Phasor Domain. Name If you have any questions ask them. Remember to include all units on your answers (V, A, etc). Clearly indicate your answers. All angles must be in the range 0 to +180 or 0 to 180 degrees. 1) [6 pts]

More information

EE 435. Lecture 22. Offset Voltages Common Mode Feedback

EE 435. Lecture 22. Offset Voltages Common Mode Feedback EE 435 Lecture Offset Voltages Common Mode Feedback Review from last lecture Offset Voltage Two types of offset voltage: Systematic Offset Voltage Random Offset Voltage V ICQ Definition: The output offset

More information

ECE2262 Electric Circuits. Chapter 4: Operational Amplifier (OP-AMP) Circuits

ECE2262 Electric Circuits. Chapter 4: Operational Amplifier (OP-AMP) Circuits ECE2262 Electric Circuits Chapter 4: Operational Amplifier (OP-AMP) Circuits 1 4.1 Operational Amplifiers 2 4. Voltages and currents in electrical circuits may represent signals and circuits can perform

More information

Electric Circuits II Sinusoidal Steady State Analysis. Dr. Firas Obeidat

Electric Circuits II Sinusoidal Steady State Analysis. Dr. Firas Obeidat Electric Circuits II Sinusoidal Steady State Analysis Dr. Firas Obeidat 1 Table of Contents 1 2 3 4 5 Nodal Analysis Mesh Analysis Superposition Theorem Source Transformation Thevenin and Norton Equivalent

More information

EE 330. Lecture 35. Parasitic Capacitances in MOS Devices

EE 330. Lecture 35. Parasitic Capacitances in MOS Devices EE 330 Lecture 35 Parasitic Capacitances in MOS Devices Exam 2 Wed Oct 24 Exam 3 Friday Nov 16 Review from Last Lecture Cascode Configuration Discuss V CC gm1 gm1 I B VCC V OUT g02 g01 A - β β VXX Q 2

More information

LECTURE 130 COMPENSATION OF OP AMPS-II (READING: GHLM , AH )

LECTURE 130 COMPENSATION OF OP AMPS-II (READING: GHLM , AH ) Lecture 30 Compensation of Op AmpsII (/26/04) Page 30 LECTURE 30 COMPENSATION OF OP AMPSII (READING: GHLM 638652, AH 260269) INTRODUCTION The objective of this presentation is to continue the ideas of

More information

ECE 255, Frequency Response

ECE 255, Frequency Response ECE 255, Frequency Response 19 April 2018 1 Introduction In this lecture, we address the frequency response of amplifiers. This was touched upon briefly in our previous lecture in Section 7.5 of the textbook.

More information

EE539: Analog Integrated Circuit Design;

EE539: Analog Integrated Circuit Design; EE539: Analog Integrated Circuit Design; Nagendra Krishnapura (nagendra@iitm.ac.in) 4 Feb. 006 1 DIFFERENTIA AMPIFIER Simple differential amplifier circuit is shown in the below figure In this circuit

More information

ECE 546 Lecture 11 MOS Amplifiers

ECE 546 Lecture 11 MOS Amplifiers ECE 546 Lecture MOS Amplifiers Spring 208 Jose E. Schutt-Aine Electrical & Computer Engineering University of Illinois jesa@illinois.edu ECE 546 Jose Schutt Aine Amplifiers Definitions Used to increase

More information

Chapter 4 Field-Effect Transistors

Chapter 4 Field-Effect Transistors Chapter 4 Field-Effect Transistors Microelectronic Circuit Design Richard C. Jaeger Travis N. Blalock 5/5/11 Chap 4-1 Chapter Goals Describe operation of MOSFETs. Define FET characteristics in operation

More information

ECEN 325 Electronics

ECEN 325 Electronics ECEN 325 Electronics Introduction Dr. Aydın İlker Karşılayan Texas A&M University Department of Electrical and Computer Engineering Ohm s Law i R i R v 1 v v 2 v v 1 v 2 v = v 1 v 2 v = v 1 v 2 v = ir

More information

Biasing the CE Amplifier

Biasing the CE Amplifier Biasing the CE Amplifier Graphical approach: plot I C as a function of the DC base-emitter voltage (note: normally plot vs. base current, so we must return to Ebers-Moll): I C I S e V BE V th I S e V th

More information

3. Basic building blocks. Analog Design for CMOS VLSI Systems Franco Maloberti

3. Basic building blocks. Analog Design for CMOS VLSI Systems Franco Maloberti Inverter with active load It is the simplest gain stage. The dc gain is given by the slope of the transfer characteristics. Small signal analysis C = C gs + C gs,ov C 2 = C gd + C gd,ov + C 3 = C db +

More information

EE 330 Lecture 30. Basic amplifier architectures

EE 330 Lecture 30. Basic amplifier architectures 33 Lecture 3 asic aplifier architectures asic plifier Structures MOS and ipolar Transistors oth have 3 priary terinals MOS transistor has a fourth terinal that is generally considered a parasitic D terinal

More information

To find the step response of an RC circuit

To find the step response of an RC circuit To find the step response of an RC circuit v( t) v( ) [ v( t) v( )] e tt The time constant = RC The final capacitor voltage v() The initial capacitor voltage v(t ) To find the step response of an RL circuit

More information

ECE-305: Fall 2017 MOS Capacitors and Transistors

ECE-305: Fall 2017 MOS Capacitors and Transistors ECE-305: Fall 2017 MOS Capacitors and Transistors Pierret, Semiconductor Device Fundamentals (SDF) Chapters 15+16 (pp. 525-530, 563-599) Professor Peter Bermel Electrical and Computer Engineering Purdue

More information

Bandwidth of op amps. R 1 R 2 1 k! 250 k!

Bandwidth of op amps. R 1 R 2 1 k! 250 k! Bandwidth of op amps An experiment - connect a simple non-inverting op amp and measure the frequency response. From the ideal op amp model, we expect the amp to work at any frequency. Is that what happens?

More information

Homework Assignment 11

Homework Assignment 11 Homework Assignment Question State and then explain in 2 3 sentences, the advantage of switched capacitor filters compared to continuous-time active filters. (3 points) Continuous time filters use resistors

More information

EE 435. Lecture 22. Offset Voltages

EE 435. Lecture 22. Offset Voltages EE 435 Lecture Offset Voltages . Review from last lecture. Offset Voltage Definition: The input-referred offset voltage is the differential dc input voltage that must be applied to obtain the desired output

More information

EE 330 Lecture 33. Cascaded Amplifiers High-Gain Amplifiers Current Source Biasing

EE 330 Lecture 33. Cascaded Amplifiers High-Gain Amplifiers Current Source Biasing EE 330 Lecture 33 Cascaded Amplifiers High-Gain Amplifiers Current Source Biasing Review from Last Time Can use these equations only when small signal circuit is EXACTLY like that shown!! Review from Last

More information

Lecture 7, ATIK. Continuous-time filters 2 Discrete-time filters

Lecture 7, ATIK. Continuous-time filters 2 Discrete-time filters Lecture 7, ATIK Continuous-time filters 2 Discrete-time filters What did we do last time? Switched capacitor circuits with nonideal effects in mind What should we look out for? What is the impact on system

More information

Chapter 5. BJT AC Analysis

Chapter 5. BJT AC Analysis Chapter 5. Outline: The r e transistor model CB, CE & CC AC analysis through r e model common-emitter fixed-bias voltage-divider bias emitter-bias & emitter-follower common-base configuration Transistor

More information

Homework Assignment 09

Homework Assignment 09 Homework Assignment 09 Question 1 (Short Takes) Two points each unless otherwise indicated. 1. What is the 3-dB bandwidth of the amplifier shown below if r π = 2.5K, r o = 100K, g m = 40 ms, and C L =

More information

Lecture 5 Review Current Source Active Load Modified Large / Small Signal Models Channel Length Modulation

Lecture 5 Review Current Source Active Load Modified Large / Small Signal Models Channel Length Modulation Lecture 5 Review Current Source Active Load Modified Large / Small Signal Models Channel Length Modulation Text sec 1.2 pp. 28-32; sec 3.2 pp. 128-129 Current source Ideal goal Small signal model: Open

More information

Homework 6 Solutions and Rubric

Homework 6 Solutions and Rubric Homework 6 Solutions and Rubric EE 140/40A 1. K-W Tube Amplifier b) Load Resistor e) Common-cathode a) Input Diff Pair f) Cathode-Follower h) Positive Feedback c) Tail Resistor g) Cc d) Av,cm = 1/ Figure

More information

EE C245 ME C218 Introduction to MEMS Design Fall 2011

EE C245 ME C218 Introduction to MEMS Design Fall 2011 EE C245 ME C218 Introduction to MEMS Design Fall 2011 Prof. Clark T.-C. Nguyen Dept. of Electrical Engineering & Computer Sciences University of California at Berkeley Berkeley, CA 94720 Lecture EE C245:

More information

EE 330 Lecture 31. Basic amplifier architectures. Common Emitter/Source Common Collector/Drain Common Base/Gate

EE 330 Lecture 31. Basic amplifier architectures. Common Emitter/Source Common Collector/Drain Common Base/Gate 33 Lecture 3 asic aplifier architectures oon itter/source oon ollector/drain oon ase/gate eview fro arlier Lecture Two-port representation of aplifiers plifiers can be odeled as a two-port y 2 2 y y 22

More information

Robert W. Brodersen EECS140 Analog Circuit Design

Robert W. Brodersen EECS140 Analog Circuit Design INTRODUCTION University of California Berkeley College of Engineering Department of Electrical Engineering and Computer Science Robert. Brodersen EECS40 Analog Circuit Design ROBERT. BRODERSEN LECTURE

More information

DESIGN MICROELECTRONICS ELCT 703 (W17) LECTURE 3: OP-AMP CMOS CIRCUIT. Dr. Eman Azab Assistant Professor Office: C

DESIGN MICROELECTRONICS ELCT 703 (W17) LECTURE 3: OP-AMP CMOS CIRCUIT. Dr. Eman Azab Assistant Professor Office: C MICROELECTRONICS ELCT 703 (W17) LECTURE 3: OP-AMP CMOS CIRCUIT DESIGN Dr. Eman Azab Assistant Professor Office: C3.315 E-mail: eman.azab@guc.edu.eg 1 TWO STAGE CMOS OP-AMP It consists of two stages: First

More information

0 t < 0 1 t 1. u(t) =

0 t < 0 1 t 1. u(t) = A. M. Niknejad University of California, Berkeley EE 100 / 42 Lecture 13 p. 22/33 Step Response A unit step function is described by u(t) = ( 0 t < 0 1 t 1 While the waveform has an artificial jump (difficult

More information

Chapter 3. FET Amplifiers. Spring th Semester Mechatronics SZABIST, Karachi. Course Support

Chapter 3. FET Amplifiers. Spring th Semester Mechatronics SZABIST, Karachi. Course Support Chapter 3 Spring 2012 4 th Semester Mechatronics SZABIST, Karachi 2 Course Support humera.rafique@szabist.edu.pk Office: 100 Campus (404) Official: ZABdesk https://sites.google.com/site/zabistmechatronics/home/spring-2012/ecd

More information

PHASOR DIAGRAMS HANDS-ON RELAY SCHOOL WSU PULLMAN, WA.

PHASOR DIAGRAMS HANDS-ON RELAY SCHOOL WSU PULLMAN, WA. PHASOR DIAGRAMS HANDS-ON RELAY SCHOOL WSU PULLMAN, WA. RON ALEXANDER - BPA What are phasors??? In normal practice, the phasor represents the rms maximum value of the positive half cycle of the sinusoid

More information

Sinusoidal Steady-State Analysis

Sinusoidal Steady-State Analysis Sinusoidal Steady-State Analysis Almost all electrical systems, whether signal or power, operate with alternating currents and voltages. We have seen that when any circuit is disturbed (switched on or

More information

At point G V = = = = = = RB B B. IN RB f

At point G V = = = = = = RB B B. IN RB f Common Emitter At point G CE RC 0. 4 12 0. 4 116. I C RC 116. R 1k C 116. ma I IC 116. ma β 100 F 116µ A I R ( 116µ A)( 20kΩ) 2. 3 R + 2. 3 + 0. 7 30. IN R f Gain in Constant Current Region I I I C F

More information

EE292: Fundamentals of ECE

EE292: Fundamentals of ECE EE292: Fundamentals of ECE Fall 2012 TTh 10:00-11:15 SEB 1242 Lecture 20 121101 http://www.ee.unlv.edu/~b1morris/ee292/ 2 Outline Chapters 1-3 Circuit Analysis Techniques Chapter 10 Diodes Ideal Model

More information

EE 435. Lecture 10: Current Mirror Op Amps

EE 435. Lecture 10: Current Mirror Op Amps EE 435 ecture 0: urrent Mirror Op mps Review from last lecture: Folded ascode mplifier DD DD B3 B3 B B3 B2 B2 B3 DD DD B B B4 I T QURTER IRUIT Op mp 2 Review from last lecture: Folded ascode Op mp DD M

More information

ECE137B Final Exam. There are 5 problems on this exam and you have 3 hours There are pages 1-19 in the exam: please make sure all are there.

ECE137B Final Exam. There are 5 problems on this exam and you have 3 hours There are pages 1-19 in the exam: please make sure all are there. ECE37B Final Exam There are 5 problems on this exam and you have 3 hours There are pages -9 in the exam: please make sure all are there. Do not open this exam until told to do so Show all work: Credit

More information