EE 435. Lecture 2: Basic Op Amp Design. - Single Stage Low Gain Op Amps

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1 EE 435 ecture 2: Basic Op mp Design - Single Stage ow Gain Op mps 1

2 Review from last lecture: How does an amplifier differ from an operational amplifier?? Op mp mplifier mplifier used in open-loop applications Operational mplifier used in feedback applications 2

3 Review from last lecture: What is an Operational mplifier? Textbook Definition: Voltage mplifier with Very arge Gain Very High Input Impedance Very ow Output Impedance Differential Input and Single-Ended Output This represents the Conventional Wisdom! Does this correctly reflect what an operational amplifier really is? 3

4 Review from last lecture: What Characteristics are Really F Needed for Op mps? 1 1 β β 1. Very arge Gain -β -β 1 1 VF = 1+ β β To make F (or VF ) insensitive to variations in To make F (or VF ) insensitive to nonlinearities of 2. Port Configurations Consistent with pplication 4

5 Review from last lecture: Port Configurations for Op mps (Could also have single-ended input and differential output though less common) 5

6 Review from last lecture: What Characteristics do Many Customers and Designers ssume are Needed for Op mps? 1. Very arge Voltage Gain and 2. ow Output Impedance 3. High Input Impedance 4. arge Output Swing 3. arge Input Range 4. Good High-frequency Performance 5. Fast Settling 6. dequate Phase Margin 7. Good CMRR 8. Good PSRR 9. ow Power Dissipation 10. Reasonable inearity 11. 6

7 What is an Operational mplifier? ets see what the experts say! X IN X OUT β Conventional Wisdom does not provide good guidance on what an amplifier or an operational amplifier should be! What are the implications of this observation? 7

8 Conventional Wisdom Does Not lways Provide Correct Perspective even in some of the most basic or fundamental areas!! Just because its published doesn t mean its correct Just because famous people convey information as fact doesn t mean they are right Keep an open mind about everything that is done and always ask whether the approach others are following is leading you in the right direction 8

9 Basic Op mp Design Outline Fundamental mplifier Design Issues Single-Stage ow Gain Op mps Single-Stage High Gain Op mps Two-Stage Op mp Other Basic Gain Enhancement pproaches 9

10 Single-Stage ow-gain Op mps Single-ended input Differential Input (Symbol not intended to distinguish between different amplifier types) 10

11 Single-ended Op mp Inverting mplifier Consider: V YQ V YQ Slope = - Slope = - V XQ V IN V XQ V IN ssume Q-point at {V XQ,V YQ } V f OUT V IN V V V V OUT IN xq YQ When operating near the Q-point, the linear and nonlinear model of the amplifier are nearly the same If the gain of the amplifier is large, V XQ is a characteristic of the amplifier 11

12 V IN R 1 Single-ended Op mp Inverting mplifier (assume the feedback network does not affect the relationship between V 1 and ) V 1 R 2 V V = - V -V +V O 1 XQ YQ R R V = V + V O IN R 1+R2 R 1+R2 V YQ Eliminating V 1 we obtain: R 1 R V = - V + 2 V -V +V 0 0 IN XQ YQ R 1+R2 R 1+R2 Slope = - If we define V iss by V IN =V INQ +V iss V XQ V IN R2 - R 1 R 2 1 V = V +V V V R 1 1 R1 R R1 R2 R 1+R2 R1 R2 0 iss INQ XQ YQ 12

13 Single-ended Op mp Inverting mplifier R 2 V IN R 1 V 1 V R2 - R 1 R 2 1 V = V + V V V R 1 1 R1 R R1 R2 R 1+ R2 R1 R2 0 iss INQ XQ YQ But if is large, this reduces to R R V = - V + V + V -V 2 2 O inss XQ XQ inq R1 R1 Note that as long as is large, if V inq is close to V XQ R V - V + V 2 O inss XQ R1 13

14 Single-ended Op mp Inverting mplifier (assume the feedback network does not affect the relationship between V 1 and ) V IN R 1 V 1 R 2 V V = - V -V +V O 1 XQ YQ R R V = V + V O IN R 1+R2 R 1+R2 Summary: V YQ R R V = - V + V + V -V 2 2 O inss XQ XQ inq R1 R1 Slope = - V XQ V IN What type of circuits have the transfer characteristic shown? 14

15 Single-stage single-input low-gain op amp V DD V DD V XX I DQ M 2 V in M 1 C V in M 1 C V SS V SS Basic Structure Practical Implementation Have added the load capacitance to include frequency dependence of the amplifier gain 15

16 This is not a new idea! 16

17 Review of ss steady-state analysis Standard pproach to Circuit nalysis X i (t) Time Domain Circuit Circuit nalysis KV, KC Set of Differential Equations Solution of Differential Equations X OUT (t) 17

18 Review of ss steady-state analysis Time, Phasor, and s- Domain nalysis X i (t) X i (S) s Transform Phasor Transform X i (jω) s-domain Circuit Time Domain Circuit Phasor Domain Circuit Circuit nalysis KV, KC Circuit nalysis KV, KC Circuit nalysis KV, KC Set of inear equations in s Set of Differential Equations Set of inear equations in jω Solution of inear Equations Solution of Differential Equations Solution of inear Equations X OUT (S) Inverse s Transform Inverse Phasor Transform X OUT (jω) X OUT (t) 18

19 Review of ss steady-state analysis Time and s- Domain nalysis X i (t) X i (S) s-transform s-domain Circuit Time Domain Circuit Circuit nalysis KV, KC Circuit nalysis KV, KC Set of inear equations in s Set of Differential Equations Solution of inear Equations Solution of Differential Equations X OUT (S) Inverse s Transform X OUT (t) 19

20 Review of ss steady-state analysis s- Domain nalysis X i (t) X i (S) s- Transform s- Domain Circuit Time Domain Circuit Circuit nalysis KV, KC Set of inear equations in s Solution of inear Equations X OUT (S) Inverse s Transform X OUT (t) 20

21 Review of ss steady-state analysis Dc and small-signal equivalent elements Element ss equivalent dc equivalnet dc Voltage Source V DC V DC ac Voltage Source V C V C dc Current Source I DC I DC ac Current Source I C I C Resistor R R R 21

22 Review of ss steady-state analysis Dc and small-signal equivalent elements Element ss equivalent dc equivalnet Capacitors C arge C Small C arge Inductors Small Diodes Simplified MOS transistors Simplified Simplified 22

23 Review of ss steady-state analysis Dc and small-signal equivalent elements Element ss equivalent dc equivalnet Bipolar Transistors Simplified Simplified Dependent Sources 23

24 Review of ss steady-state analysis Summary of Sinusoidal Steady-State nalysis Methods for inear Networks vin t Time-Domain Circuit Circuit nalysis Differential Equations aplace Transform inear s-domain Equations s vin t aplace Transform V IN s s-domain Circuit T(s) s Transfer Function of Time-Domain Circuit: Key Theorem: V Ts = V OUT IN s s If a sinusoidal input V IN =V M sin(ωt+θ) is applied to a linear system that has transfer function T(s), then the steady-state output is given by the expression out V T jω sin ωt+θ+ Tjω v t M 24

25 Single-stage single-input low-gain op amp V DD V DD I DQ V XX M 2 V in M 1 C V in M 1 C V SS V SS Small Signal Models g o C V gs g m V g 01 +g 02 V IN gs V IN V gs1 g m1 V gs1 C v sc g m g o dc Voltage gain is ratio of overall transconductance gain to output conductance v sc g g m1 o1 g o2 25

26 Single-stage single-input low-gain op amp V DD V DD I DQ M 1 C V XX M 2 C V in V in M 1 Observe in either case the small signal equivalent circuit is a two-port of the form: V in V SS I 2 V SS V 1 G M V 1 G V 2 ll properties of the circuit are determined by G M and G 26

27 Single-stage single-input low-gain op amp Small Signal Model of the op amp I 2 V in V 1 G M V 1 G V 2 lternate equivalent small signal model obtained by Norton to Thevenin transformation V 1 V V 1 G I 2 V 2 M V = - G ll properties of the circuit are determined by V and G G 27

28 Single-stage single-input low-gain op amp V IN V 1 G M V 1 G C -G M v = sc +G = v0 -G G M G BW = C V G G G GB = = G C C M M GB and VO are two of the most important parameters in an op amp 28

29 Single-stage single-input low-gain op amp V IN V 1 G M V 1 G C -g m v = sc +g 0 for notational convenience -g m v0 = g 0 g BW = C 0 V IN V 1 g m V 1 g 0 C gm g0 g GB = = g C C m 0 Op mp The parameters g m and g o give little insight into design 29

30 How do we design an amplifier with a given architecture in general or this architecture in particular? What is the design space? V DD I DQ M 1 C Generally V SS, V DD,C (and possibly Q )will be fixed Must determine { W 1, 1,I DQ and V INQ } Thus there are 4 design variables But W 1 and 1 appear as a ratio in almost all performance characteristics of interest V in V SS and I DQ is related to V INQ, W 1 and 1 (this is a constraint) Thus the design space generally has only two independent variables or two degrees of freedom W 1 1 Thus design or synthesis with this architecture involves exploring the two-dimensional design space 30 W 1,I DQ 1,I DQ

31 How do we design an amplifier with a given architecture in general or this architecture in particular? What is the design space? Generally V SS, V DD,C (and possibly Q )will be fixed Must determine { W 1, 1,I DQ and V INQ } Thus there are 4 design variables But W 1 and 1 appear as a ratio in almost all performance characteristics of interest and I DQ is related to V INQ, W 1 and 1 Thus the design space generally has only two independent variables or two degrees of freedom W 1 Thus design or synthesis with this architecture involves exploring the two-dimensional design space W 1 1,I DQ 1,I DQ 1. Determine the design space 2. Identify the constraints 3. Determine the entire set of unknown variables and the Degrees of Freedom 4. Determine an appropriate parameter domain (Parameter domains for characterizing the design space are not unique!) 5. Explore the resultant design space with the identified number of Degrees of Freedom 31

32 How do we design an amplifier with a given architecture? 1. Determine the design space 2. Identify the constraints 3. Determine the entire set of unknown variables and the Degrees of Freedom 4. Determine an appropriate parameter domain 5. Explore the resultant design space with the identified number of Degrees of Freedom 32

33 Parameter Domains for Characterizing mplifier Performance Should give insight into design Variables should be independent Should be of minimal size Should result in simple design expressions Most authors give little consideration to either the parameter domain or the degrees of freedom that constrain the designer 33

34 Parameter Domains for Characterizing mplifier Performance Consider basic op amp structure V in V DD I DQ M 1 V SS C -g m v = sc +g 0 -g m v0 = g 0 g GB = C Small signal parameter domain : g m, g0 m Degrees of Freedom: 2 Small signal parameter domain obscures implementation issues 34

35 Parameter Domains for Characterizing mplifier Performance Consider basic op amp structure V in V DD V SS I DQ M 1 C -g m v = sc +g 0 -g m v0 = g 0 g GB = C What parameters does the designer really have to work with? W,IDQ Degrees of Freedom: 2 Call this the natural parameter domain m 35

36 V in g m Parameter Domains for Characterizing mplifier Performance Consider basic op amp structure 2I V DQ EB V DD V SS I DQ M 1 C μc OXW V EB C OX Natural parameter domain W I DQ W,IDQ g GB = C How do performance metrics VO and GB relate to the natural domain parameters? m -g m v0 = g 0 g λi o DQ 36

37 Parameter Domains for Characterizing mplifier Performance Degrees of Freedom: 2 Small signal parameter domain : -g = m gm g v0 0 GB = C Natural design parameter domain: V0 = W 2μCOX λidq GB = {g m,g 0 } W 2μCOX C -g m v = sc +g 0 W,IDQ IDQ Expressions very complicated Both V0 and GB depend upon both design paramaters Natural parameter domain gives little insight into design and has complicated expressions 37

38 Parameter Domains for Characterizing mplifier Performance Degrees of Freedom: 2 Small signal parameter domain : -g = m gm g v0 Natural design parameter domain: 0 W 2μCOX V0= λ IDQ GB = GB = C {g m,g 0 } W,IDQ 2μCOX W IDQ C Process Dependent rchitecture Dependent Process Dependent rchitecture Dependent 38

39 Parameter Domains for Characterizing mplifier Performance Degrees of Freedom: 2 Small signal parameter domain : -gm gm v0 = g 0 Natural design parameter domain: W 2μCOX V0= λ IDQ lternate parameter domain: GB = C {g m,g 0 } GB = W,IDQ 2μCOX W IDQ C P,V EB P=power=V DD I DQ V EB =excess bias =V GSQ -V T g 2I 1 2 V0 = = = g V λi λv M DQ 0 EB DQ EB gm 2IDQ 1 2 P GB = = = C V C V C V EB DD EB 39

40 Parameter Domains for Characterizing mplifier Performance Degrees of Freedom: 2 Small signal parameter domain : -g g m m v0 = g 0 Natural design parameter domain: W 2μCOX V0= λ IDQ GB = C {g m,g 0 } W,IDQ lternate parameter domain: = V0 2 1 λ V EB GB = 2μCOX W IDQ C 2 P GB= V DD C V EB P,V EB Process Dependent 40

41 Parameter Domains for Characterizing mplifier Performance Degrees of Freedom: 2 Small signal parameter domain : -g = m gm g Natural design parameter domain: v0 VO 2 C OX W I DQ lternate parameter domain: = V0 0 EB GB GB = C {g m,g 0 } 2C C OX W P λ V GB= V DD C V EB I DQ W,IDQ P,V EB rchitecture Dependent 41

42 Parameter Domains for Characterizing mplifier Performance Degrees of Freedom: 2 Small signal parameter domain : -g = m gm g v0 Natural design parameter domain: VO 2 C OX W I DQ lternate parameter domain: = V0 0 EB GB = C {g m,g 0 } GB 2C lternate parameter domain gives considerable insight into design lternate parameter domain provides modest parameter decoupling 42 Term in box figure of merit for comparing architectures C OX W P λ V GB= V DD C V EB I DQ W,IDQ P,V EB

43 End of ecture 2 43

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