MC74HCT373A/D. Octal 3-State Noninverting Transparent Latch with LSTTL-Compatible Inputs. High Performance Silicon Gate CMOS
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1 Ocal -Sae Noninvering Traparen Lach wih LSTTL-Compaible Inpus High Performance Silicon Gae CMOS The MC7HCT7A may be used as a level converer for inerfacing TTL or NMOS oupus o High Speed CMOS inpus. The HCT7A is idenical in pinou o he LS7. The eigh laches of he HCT7A are raparen ype laches. While he Lach Enable is high he oupus follow he aa Inpus. When Lach Enable is aken low, daa meeing he seup and hold imes becomes lached. The Oupu Enable does no affec he sae of he lach, bu when Oupu Enable is high, all oupus are forced o he high impedance sae. Thus, daa may be lached even when he oupus are no enabled. The HCT7A is idenical in funcion o he HCT57A, which has he inpu pi on he opposie side of he package from he oupu pi. This device is similar in funcion o he HCT5A, which has invering oupus. Feaures Oupu rive Capabiliy: 5 LSTTL Loads TTL/NMOS Compaible Inpu Levels Oupus irecly Inerface o CMOS, NMOS, and TTL Operaing olage Range:.5 o Low Inpu Curren:.0 A In Compliance wih he Requiremens efined by JEEC Sandard No. 7 A Chip Complexiy: 96 FETs or 9 Equivalen Gaes These evices are Pb Free and are RoHS Complian ATA INPUTS LATCH ENAB ENAB LOGIC IAGRAM PIN = CC PIN 0 = GN NONINERTING S SOIC W SUFFIX CASE 75 ENAB ÎÎ ORERING INFORMATION evice Package Shipping MC7HCT7AWG SOIC (Pb Free) 8 / Rail MC7HCT7AWRG MC7HCT7ATRG hp://oemi.com MARKING IAGRAMS HCT7A AWLYYWWG SOIC PIN ASSIGNMENT GN SOIC (Pb Free) TSSOP (Pb Free) 000 / Tape & Reel 500 / Tape & Reel For informaion on ape and reel specificaio, including par orienaion and ape sizes, please refer o our Tape and Reel Packaging Specificaion Brochure, BR80/. TSSOP T SUFFIX CASE 98E CC LATCH ENAB HCT 7A ALYW TSSOP A = Assembly Locaion WL, L = Wafer Lo YY, Y = Year WW, W = Work Week G or = Pb Free Package (Noe: Microdo may be in eiher locaion) Semiconducor Componens Indusries, LLC, Sepember, Rev. Publicaion Order Number: MC7HCT7A/
2 Î Î esign Crieria alue ÎÎÎ Unis Î Inernal Gae Coun* 9 ÎÎÎ ea. Î Inernal Gae Propagaion elay.5 Î Inernal Gae Power issipaion 5.0 Î W Speed Power Produc pj *Equivalen o a wo inpu NAN gae. FUNCTION TAB Inpus Oupu Oupu Lach Enable Enable L H H H L H L L L L X No Change H X X Z X = don care Z = high impedance MAXIMUM RATINGS Symbol Parameer alue Uni CC C Supply olage (Referenced o GN) 0.5 o +7.0 in C Inpu olage (Referenced o GN) 0.5 o CC ou C Oupu olage (Referenced o GN) 0.5 o CC I in C Inpu Curren, per Pin ± ma I ou C Oupu Curren, per Pin ±5 ma I CC C Supply Curren, CC and GN Pi ±75 ma P Power issipaion in Sill Air, SOIC Package TSSOP Package T sg Sorage Temperaure 65 o +50 C T L Lead Temperaure, mm from Case for 0 Seconds (SOIC or TSSOP Package) 60 Sresses exceeding hose lised in he Maximum Raings able may damage he device. If any of hese limis are exceeded, device funcionaliy should no be assumed, damage may occur and reliabiliy may be affeced. eraing: SOIC Package: 7 mw/ C from 65 o 5 C TSSOP Package: 6. mw/ C from 65 o 5 C mw C This device conai proecion circuiry o guard agai damage due o high saic volages or elecric fields. However, precauio mus be aken o avoid applicaio of any volage higher han maximum raed volages o his high impedance circui. For proper operaion, in and ou should be corained o he range GN ( in or ou ) CC. Unused inpus mus always be ied o an appropriae logic volage level (e.g., eiher GN or CC ). Unused oupus mus be lef open. RECOMMENE OPERATING CONITIONS Symbol Parameer Min Max Uni CC C Supply olage (Referenced o GN).5 in, ou C Inpu olage, Oupu olage (Referenced o GN) 0 CC T A Operaing Temperaure, All Package Types C r, f Inpu Rise and Fall Time (Figure ) Funcional operaion above he sresses lised in he Recommended Operaing Ranges is no implied. Exended exposure o sresses beyond he Recommended Operaing Ranges limis may affec device reliabiliy. hp://oemi.com
3 C ECTRICAL CHARACTERISTICS (olages Referenced o GN) Guaraneed Limi Symbol Parameer Tes Condiio CC 55 o 5 C 85 C 5 C Uni IH Minimum High Level Inpu olage ou = 0. or CC 0. I ou A.5 IL Maximum Low Level Inpu olage ou = 0. or CC 0. I ou A.5 OH Minimum High Level Oupu olage in = IH or IL I ou A in = IH or IL I ou 6.0 ma OL Maximum Low Level Oupu olage in = IH or IL I ou A I in Maximum Inpu Leakage Curren in = IH or IL I ou 6.0 ma in = CC or GN ±0. ±.0 ±.0 A I OZ Maximum Three Sae Leakage Curren Oupu in High Impedance Sae in = IL or IH ou = CC or GN ±0.5 ±5.0 ±0 A I CC Maximum uiescen Supply Curren (per Package) in = CC or GN I ou = 0 A A I CC Addiional uiescen Supply in =., Any One Inpu 55 C 5 C o 5 CÎÎÎ Curren in = CC or GN, Oher Inpus ÎÎÎ ÎÎÎ ma.9. NOTE:. Toal Supply Curren = I CC + I CC. l ou = 0 A AC ECTRICAL CHARACTERISTICS ( CC = 5.0 ±0%, C L = 50 pf, Inpu r = f = 6.0 ) ÎÎÎ Guaraneed Limi ÎÎÎ 55 o Symbol ÎÎÎ Parameer 5 C 85 C 5 CÎÎÎ Uni PLH, ÎÎÎ Maximum Propagaion elay, Inpu o 8 5 ÎÎÎ PHL ÎÎÎ (Figures and 5) Î PLH, PHL ÎÎÎ Maximum Propagaion elay, Lach Enable o 0 8 ÎÎÎ (Figures and 5) ÎÎÎ PLZ, Maximum Propagaion elay, Oupu Enable o PHZ ÎÎÎ (Figures and 6) Î PZL, ÎÎÎ Maximum Propagaion elay, Oupu Enable o 5 5 ÎÎÎ PZH (Figures and 6) TLH, Maximum Oupu Traiion Time, Any Oupu 5 8 THL ÎÎÎ (Figures and 5) Î C in Maximum Inpu Capaciance pf C ou Maximum Three Sae Oupu Capaciance ÎÎ (Oupu in High Impedance Sae) Î pf 5 C, CC = 5.0 C P Power issipaion Capaciance (Per Lach)* * Used o deermine he no load dynamic power coumpion: P = C P CC f + I CC CC. 65 pf hp://oemi.com
4 TIMING REUIREMENTS ( CC = 5.0 ±0%, Inpu r = f = 6.0 ) Î Guaraneed Limi ÎÎÎ 55 o Î Symbol Parameer 5 C 85 C 5 C ÎÎÎ Uni su Minimum Seup Time, Inpu o Lach Enable 0 5 ÎÎÎ (Figure ) Î h Minimum Hold Time, Lach Enable o Inpu 0 5 ÎÎ (Figure ) Î w ÎÎÎ Minimum Pulse Widh, Lach Enable 5 8 ÎÎÎ (Figure ) ÎÎ Î r, f ÎÎÎ Maximum Inpu Rise and Fall Times ÎÎÎ (Figure ) ÎÎÎ EXPANE LOGIC IAGRAM LATCH ENAB ENAB hp://oemi.com
5 SWITCHING WAEFORMS INPUT r PLH TLH %. 90% f GN PHL THL LATCH ENAB w PLH PHL GN Figure. Figure. ENAB PZH PHZ PZL PLZ 0% 90% GN HIGH IMPEANCE OL OH HIGH IMPEANCE INPUT LATCH ENAB su ALI h GN GN Figure. Figure. TEST CIRCUITS TEST POINT TEST POINT EICE UNER TEST C L * EICE UNER TEST k C L * CONNECT TO CC WHEN TESTING PLZ AN PZL. CONNECT TO GN WHEN TESTING PHZ AN PZH. *Includes all probe and jig capaciance *Includes all probe and jig capaciance Figure 5. Figure 6. hp://oemi.com 5
6 PACKAGE IMENSIONS TSSOP T SUFFIX CASE 98E 0 ISSUE C 0.5 (0.006) T L 0.5 (0.006) T U X L/ PIN IENT U S S C 0.00 (0.00) T SEATING PLANE X K REF 0.0 (0.00) M T U S S 0 A G H B U N J J N K K ÍÍÍÍ ÍÍÍÍ SORING FOOTPRINT* 7.06 SECTION N N 0.5 (0.00) M NOTES:. IMENSIONING AN TORANCING PER ANSI Y.5M, 98.. CONTROLLING IMENSION: MILLIMETER.. IMENSION A OES NOT INCLUE MOL FLASH, PROTRUSIONS OR GATE BURRS. MOL FLASH OR GATE BURRS SHALL NOT EXCEE 0.5 (0.006) PER SIE.. IMENSION B OES NOT INCLUE INTERA FLASH OR PROTRUSION. INTERA FLASH OR PROTRUSION SHALL NOT EXCEE 0.5 (0.00) PER SIE. 5. IMENSION K OES NOT INCLUE AMBAR PROTRUSION. ALLOWAB AMBAR PROTRUSION SHALL BE 0.08 (0.00) TOTAL IN EXCESS OF THE K IMENSION AT MAXIMUM MATERIAL CONITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. IMENSION A AN B ARE TO BE ETERMINE AT ATUM PLANE W. F MILLIMETERS INCHES IM MIN MAX MIN MAX ETAIL E A B C W F G 0.65 BSC 0.06 BSC H J ETAIL E J K K L 6.0 BSC 0.5 BSC M PITCH 6X 0.6 6X.6 IMENSIONS: MILLIMETERS *For addiional informaion on our Pb Free sraegy and soldering deails, please download he ON Semiconducor Soldering and Mouning Techniques Reference Manual, SORRM/. hp://oemi.com 6
7 PACKAGE IMENSIONS SOIC W SUFFIX CASE ISSUE G H 0X 0.5 M B M E A h X 5 NOTES:. IMENSIONS ARE IN MILLIMETERS.. INTERPRET IMENSIONS AN TORANCES PER ASME Y.5M, 99.. IMENSIONS AN E O NOT INCLUE MOL PROTRUSION.. MAXIMUM MOL PROTRUSION 0.5 PER SIE. 5. IMENSION B OES NOT INCLUE AMBAR PROTRUSION. ALLOWAB PROTRUSION SHALL BE 0. TOTAL IN EXCESS OF B IMENSION AT MAXIMUM MATERIAL CONITION. X B 0.5 M T A S 8X e 0 B B S A A T SEATING PLANE C L MILLIMETERS IM MIN MAX A.5.65 A B C E e.7 BSC H h L ON Semiconducor and he are regisered rademarks of Semiconducor Componens Indusries, LLC (SCILLC) or is subsidiaries in he Unied Saes and/or oher counries. SCILLC ow he righs o a number of paens, rademarks, copyrighs, rade secres, and oher inellecual propery. A lising of SCILLC s produc/paen coverage may be accessed a Marking.pdf. SCILLC reserves he righ o make changes wihou furher noice o any producs herein. SCILLC makes no warrany, represenaion or guaranee regarding he suiabiliy of is producs for any paricular purpose, nor does SCILLC assume any liabiliy arising ou of he applicaion or use of any produc or circui, and specifically disclaims any and all liabiliy, including wihou limiaion special, coequenial or incidenal damages. Typical parameers which may be provided in SCILLC daa shees and/or specificaio can and do vary in differen applicaio and acual performance may vary over ime. All operaing parameers, including Typicals mus be validaed for each cusomer applicaion by cusomer s echnical expers. SCILLC does no convey any licee under is paen righs nor he righs of ohers. SCILLC producs are no designed, inended, or auhorized for use as componens in sysems inended for surgical implan ino he body, or oher applicaio inended o suppor or susain life, or for any oher applicaion in which he failure of he SCILLC produc could creae a siuaion where personal injury or deah may occur. Should Buyer purchase or use SCILLC producs for any such uninended or unauhorized applicaion, Buyer shall indemnify and hold SCILLC and is officers, employees, subsidiaries, affiliaes, and disribuors harmless agai all claims, coss, damages, and expees, and reasonable aorney fees arising ou of, direcly or indirecly, any claim of personal injury or deah associaed wih such uninended or unauhorized use, even if such claim alleges ha SCILLC was negligen regarding he design or manufacure of he par. SCILLC is an Equal Opporuniy/Affirmaive Acion Employer. This lieraure is subjec o all applicable copyrigh laws and is no for resale in any manner. PUBLICATION ORERING INFORMATION LITERATURE FULFILLMENT: Lieraure isribuion Cener for ON Semiconducor P.O. Box 56, enver, Colorado 807 USA Phone: or Toll Free USA/Canada Fax: or Toll Free USA/Canada orderli@oemi.com N. American Technical Suppor: Toll Free USA/Canada Europe, Middle Eas and Africa Technical Suppor: Phone: Japan Cusomer Focus Cener Phone: hp://oemi.com 7 ON Semiconducor Websie: Order Lieraure: hp:// For addiional informaion, please conac your local Sales Represenaive MC7HCT7A/
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74HC74. Dual D Flip Flop with Set and Reset. High Performance Silicon Gate CMOS
Dual D Flip Flop with Set and Reset High Performance Silicon Gate CMOS The 74HC74 is identical in pinout to the LS74. The device inputs are compatible with standard CMOS outputs; with pullup resistors,
MJE18006G SWITCHMODE. NPN Bipolar Power Transistor For Switching Power Supply Applications POWER TRANSISTOR 6.0 AMPERES 1000 VOLTS 100 WATTS
SWITCHMODE NPN Bipolar Power Transisor For Swiching Power Supply Applicaions The has an applicaions specific saeofhear die designed for use in V lineoperaed SWITCHMODE Power supplies and elecronic ligh
MC74HC244A Octal 3 State Noninverting Buffer/Line Driver/ Line Receiver
Octal 3 State Noninverting Buffer/Line Driver/ Line Receiver High Performance Silicon Gate CMOS The MC74HC244A is identical in pinout to the LS244. The device inputs are compatible with standard CMOS outputs;
MC74HC393A. Dual 4-Stage Binary Ripple Counter. High Performance Silicon Gate CMOS
Dual 4-Sage Binary Ripple ouner High Performance Silicon Gae MOS The M74H393A is idenical in pinou o he LS393. The device inpus are compaible wih sandard MOS oupus; wih pullup resisors, hey are compaible
MC74AC377, MC74ACT377. Octal D Flip Flop with Clock Enable
Octal FlipFlop with Clock Enable The MC74AC377/74ACT377 has eight edge-triggered, -type flip-flops with individual inputs and outputs. The common buffered Clock () input loads all flip-flops simultaneously,
MJE5740G, MJE5742G. NPN Silicon Power Darlington Transistors POWER DARLINGTON TRANSISTORS 8 AMPERES VOLTS 80 WATTS
MJE74G, MJE74G NPN Silicon Power Darlingon Transisors The MJE74G and MJE74G Darlingon ransisors are designed for highvolage power swiching in inducive circuis. Feaures These Devices are PbFree and are
MJE5740, MJE5742. NPN Silicon Power Darlington Transistors POWER DARLINGTON TRANSISTORS 8 AMPERES VOLTS 80 WATTS
is a Preferred Device NPN Silicon Power Darlingon Transisors The and Darlingon ransisors are designed for highvolage power swiching in inducive circuis. Feaures PbFree Packages are Available* Applicaions
MC74HC138A. 1-of-8 Decoder/ Demultiplexer. High Performance Silicon Gate CMOS
MC74HC38A -of-8 Decoder/ Demultiplexer High Performance Silicon Gate CMOS The MC74HC38A is identical in pinout to the LS38. The device inputs are compatible with standard CMOS outputs; with pullup resistors,
MC74HC132A. Quad 2 Input NAND Gate with Schmitt Trigger Inputs. High Performance Silicon Gate CMOS
Quad 2 Input NAND Gate with Schmitt Trigger Inputs High Performance Silicon Gate CMOS The is identical in pinout to the LS32. The device inputs are compatible with standard CMOS outputs; with pull up resistors,
SN74LS175MEL. Quad D Flip Flop LOW POWER SCHOTTKY
uad Flip Flop The LSTTL/MSI SN74LS75 is a high speed uad Flip-Flop. The device is useful for general flip-flop requirements where clock and clear inputs are common. The information on the inputs is stored
PIN ASSIGNMENT LOGI DIAGRAM LOK a RESET a a 2 a LOK b RESET b b LOK, 3 BINARY OUNTER 3, 4, 0 5, 9 6, a 4 a b 3 b RESET
Dual 4 Sage Binary Ripple ouner High Performance Silicon Gae MOS The M74H393A is idenical in pinou o he LS393. The device inpus are compaible wih sandard MOS oupus; wih pullup resisors, hey are compaible
FST Bit Bus Switch
FST32 4-Bit Bus Switch The ON Semiconductor FST32 is a quad, high performance switch. The device is CMOS TTL compatible when operating between 4 and. Volts. The device exhibits extremely low R ON and adds
NLSV2T Bit Dual-Supply Inverting Level Translator
2-Bit Dual-Supply Inverting Level Translator The NLSV2T240 is a 2 bit configurable dual supply voltage level translator. The input A n and output B n ports are designed to track two different power supply
MC14017B. Decade Counter
M407B ecade ouner The M407B is a five sage Johon decade couner wih buil in code converer. High speed operaion and spike free oupus are obained by use of a Johon decade couner design. The en decoded oupus
74HC86. Quad 2 Input Exclusive OR Gate. High Performance Silicon Gate CMOS
Quad 2 Input Exclusive OR Gate MARKING DIAGRAMS High Performance Silicon Gate CMOS The is identical in pinout to the LS86. The device inputs are compatible with standard CMOS outputs; with pullup resistors,
MC74VHC245. Octal Bus Buffer/Line Driver
MC74HC245 Octal Bus Buffer/Line Driver The MC74HC245 is an advanced high speed CMOS octal bus transceiver fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent
MC14040B. 12-Bit Binary Counter
M4040B 2Bi Binary ouner The M4040B 2sage binary couner is coruced wih MOS Phannel and Nhannel enhancemen mode devices in a single monolihic srucure. This par is designed wih an inpu wave shaping circui
MC74LVX Bit Addressable Latch/1 of 8 Decoder CMOS Logic Level Shifter. with LSTTL Compatible Inputs
8Bit Addressable Latch/of8 ecoder CMOS Logic Level Shifter with LSTTLCompatible Inputs The MCLVX9 is an 8bit Addressable Latch fabricated with silicon gate CMOS technology. The internal circuit is composed
Analog Multiplexer Demultiplexer High-Performance Silicon-Gate CMOS
TECHNICAL DATA IW0B Analog Muliplexer Demuliplexer HighPerformance SiliconGae CMOS The IW0B analog muliplexer/demuliplexer is digially conrolled analog swiches having low ON impedance and very low OFF
74LVC374A. Low-Voltage CMOS Octal D-Type Flip-Flop. With 5 V Tolerant Inputs and Outputs (3 State, Non Inverting)
Low-Voltage CMOS Octal -Type Flip-Flop With 5 V Tolerant Inputs and Outputs (3 State, Non Inverting) The 74LVC374A is a high performance, non inverting octal type flip flop operating from a 1.2 to 3.6
MC74HC139A. Dual 1 of 4 Decoder/ Demultiplexer. High Performance Silicon Gate CMOS
MC74HC39A Dual of 4 Decoder/ Demultiplexer High Performance Silicon Gate CMOS The MC74HC39A is identical in pinout to the LS39. The device inputs are compatible with standard CMOS outputs; with pull up
MC74VHC14. Hex Schmitt Inverter
MC74HC4 Hex Schmitt Inverter The MC74HC4 is an advanced high speed CMOS Schmitt inverter fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky
74HC74. Dual D Flip Flop with Set and Reset. High Performance Silicon Gate CMOS
Dual D Flip Flop with Set and Reset High Performance Silicon Gate CMOS The 4HC4 is identical in pinout to the LS4. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they
MC74VHCT373A. Octal D-Type Latch with 3-State Output
Octal -Type atch with 3-State Output The MC74CT373A is an advanced high speed CMOS octal latch with 3 state output fabricated with silicon gate CMOS technology. It achieves high speed operation similar
MC74HCT259A. 8-Bit Addressable Latch 1-of-8 Decoder with LSTTL Inputs. High Performance Silicon Gate CMOS
MC74CT259A 8-Bit Addressable atch -of-8 ecoder with STT Inputs igh Performance Silicon Gate CMOS The MC74CT259A is identical in pinout to the S259. The device inputs are compatible with standard CMOS and
MC74HC374A. Octal 3-State Non-Inverting D Flip-Flop. High Performance Silicon Gate CMOS
M7H37A Octal 3-State Non-Inverting Flip-Flop High Performance Silicon Gate MOS The M7H37A is identical in pinout to the LS37. The device inputs are compatible with standard MOS outputs; with pullup resistors,
74FST Bit Bus Switch
4FST32 4 Bit Bus Switch The ON Semiconductor 4FST32 is a quad, high performance switch. The device is CMOS TTL compatible when operating between 4 and. Volts. The device exhibits extremely low R ON and
NTMFS4833NT3G. Power MOSFET. 30 V, 191 A, Single N-Channel, SO-8 FL Features
Power MOSFET 3 V, 191 A, Single N-Channel, SO-8 FL Features Low R S(on) to Minimize Conduction Losses Low Capacitance to Minimize river Losses Optimized Gate Charge to Minimize Switching Losses These are
MC74VHC132. Quad 2 Input NAND Schmitt Trigger
MC74HC32 Quad 2 Input NAND Schmitt Trigger The MC74HC32 is an advanced high speed CMOS Schmitt NAND trigger fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent
NLSV22T244. Dual 2-Bit Dual-Supply Non-Inverting Level Translator
Dual 2-Bit Dual-Supply Non-Inverting Level Translator The NLSV22T244 is a dual 2 bit configurable dual supply bus buffer level translator. The input ports A and the output ports B are designed to track
MC74AC132, MC74ACT132. Quad 2 Input NAND Schmitt Trigger
MC74AC32, MC74ACT32 Quad 2 Input NAND Schmitt Trigger The MC74AC/74ACT32 contains four 2 input NAND gates which are capable of transforming slowly changing input signals into sharply defined, jitter free
Part Ordering code Marking Remarks 1N4148W-V 1N4148W-V-GS18 or 1N4148W-V-GS08 A2 Tape and Reel
Small Signal Fas Swiching Diode Feaures These diodes are also available in oher case syles including he DO- case wih he ype designaion N8, he MiniMELF case wih he ype designaion LL8, and he SOT- case wih
MC74AC109, MC74ACT109. Dual JK Positive Edge Triggered Flip Flop
MC9, MC9 Dual JK Positive EdgeTriggered FlipFlop The MC9/9 coists of two highspeed completely independent traition clocked JK flipflops. The clocking operation is independent of rise and fall times of
SN74LS151MEL. 8 Input Multiplexer LOW POWER SCHOTTKY
8 Input Multiplexer The TTL/MSI SN74LS5 is a high speed 8-input Digital Multiplexer. It provides, in one package, the ability to select one bit of data from up to eight sources. The LS5 can be used as
MC74ACT Input Universal Shift/Storage Register with Synchronous Reset and Common I/O Pins
8 Input Universal Shift/Storage Register with Synchronous Reset and Common I/O Pins The MC74ACT323 is an 8-bit universal shift/storage register with3-state outputs. Its function is similar to the MC74ACT299
MC14015B. Dual 4 Bit Static Shift Register
M0B Dual Bi Saic Shif egiser The M0B dual bi saic shif regiser is coruced wih MOS Phannel and Nhannel enhancemen mode devices in a single monolihic srucure. I coiss of wo idenical, independen sae serialinpu/paralleloupu
MC74AC74, MC74ACT74. Dual D Type Positive Edge Triggered Flip Flop
Dual D Type Positive Edge Triggered Flip Flop The MC74AC74/74ACT74 is a dual D type flip flop with Asynchronous Clear and Set inputs and complementary (Q,Q) outputs. Information at the input is traferred
MC14584B. Hex Schmitt Trigger
MC4584B Hex Schmitt Trigger The MC4584B Hex Schmitt Trigger is constructed with MOS Pchannel and Nchannel enhancement mode devices in a single monolithic structure. These devices find primary use where
MC74VHC1GT125. Noninverting Buffer / CMOS Logic Level Shifter with LSTTL Compatible Inputs
C74CGT Noninvering Buffer / COS ogic evel Shifer wih STT Compaible Inpus The C74CGT is a single gae noninvering buffer fabricaed wih silicon gae COS echnology. I achieves high speed operaion similar o
MC74LCX74. Low-Voltage CMOS Dual D-Type Flip-Flop. With 5 V Tolerant Inputs
Low-oltage CMOS Dual D-Type Flip-Flop With 5 Tolerant Inputs The MC74LCX74 is a high performance, dual D type flip flop with asynchronous clear and set inputs and complementary (O, O) outputs. It operates
MC14099B. 8-Bit Addressable Latches
-Bit Addressable Latches The MC99B is an bit addressable latch. Data is entered in serial form when the appropriate latch is addressed (via address pi A, A, A) and write disable is in the low state. For
SN74LS157MEL. Quad 2 Input Multiplexer LOW POWER SCHOTTKY
Quad 2 Input Multiplexer The LSTTL/ MSI is a high speed Quad 2-Input Multiplexer. Four bits of data from two sources can be selected using the common Select and Enable inputs. The four buffered outputs
MC14015B. Dual 4 Bit Static Shift Register
M405B ual 4Bi Saic Shif egiser The M405B dual 4bi saic shif regiser is consruced wih MOS Phannel and Nhannel enhancemen mode devices in a single monolihic srucure. I consiss of wo idenical, independen
SN74LS147, SN74LS Line to 4 Line and 8 Line to 3 Line Priority Encoders LOW POWER SCHOTTKY
0 Line to Line and 8 Line to 3 Line Priority Encoders The SN7LS7 and the SN7LS8 are Priority Encoders. They provide priority decoding of the inputs to eure that only the highest order data line is encoded.
SN74LS125A, SN74LS126A. Quad 3 State Buffers LOW POWER SCHOTTKY. LS125A LS126A TRUTH TABLES ORDERING INFORMATION
Quad 3 State Buffers V CC E D O E D O 4 3 2 0 9 8 LOW POWER SCHOTTKY 2 3 4 5 6 E D O E D O LS25A GND V CC E D O E D O 4 3 2 0 9 8 4 PLASTIC N SUFFIX CASE 646 LS25A INPUTS 2 3 4 5 6 E D O E LS26A D O GND
MC74HC574A. Octal 3-State Noninverting D Flip-Flop. High Performance Silicon Gate CMOS
M74H574A Octal 3-State Noninverting Flip-Flop High Performance Silicon Gate MOS The M74H574A is identical in pinout to the LS574. The device inputs are compatible with standard MOS outputs; with pull up
74FST Bit, 4 Port Bus Exchange Switch
4 Bit, 4 Port Bus Exchange Switch The ON Semiconductor 74FST3400 is a 4 bit, 4 port bus exchange switch. The device is CMOS TTL compatible when operating between 4.0 and 5.5 Volts. The device exhibits
High Performance Silicon Gate CMOS
High Performance Silicon Gate CMOS The MC74HCT14A may be used as a level converter for interfacing TTL or NMOS outputs to high speed CMOS inputs. The HCT14A is identical in pinout to the LS14. The HCT14A
SN74LS145MEL. 1 of 10 Decoder/Driver Open Collector LOW POWER SCHOTTKY
of 0 Decoder/Driver Open Collector The SN74LS45, -of-0 Decoder/Driver, is designed to accept BCD inputs and provide appropriate outputs to drive 0-digit incandescent displays. All outputs remain off for