MC14503B. Hex Non-Inverting 3-State Buffer

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1 MC4503B Hex Non-Invering 3-Sae Buffer The MC4503B is a hex noninvering buffer wih 3sae oupus, and a high curren source and sink capabiliy. The 3sae oupus make i useful in common bussing applicaio. Two disable conrols are provided. A high level on he Disable A inpu causes he oupus of buffers hrough 4 o go ino a high impedance sae and a high level on he Disable B inpu causes he oupus of buffers 5 and 6 o go ino a high impedance sae. MARKING DIAGRAMS Feaures 3Sae Oupus TTL Compaible Will Drive One TTL Load Over Full Temperaure Range Supply olage Range = 3.0 dc o 8 dc Two Disable Conrols for Added ersailiy Pin for Pin Replacemen for MM80C97 and These Devices are PbFree and are RoHS Complian PDIP6 P SUFFIX CASE SOIC6 D SUFFIX CASE 75B MC4503BCP AWLYYWWG 4503BG AWLYWW MAXIMUM RATINGS olages Referenced o ) (Noe ) Parameer Symbol alue Uni DC Supply olage Range DD 0.5 o +8.0 Inpu or Oupu olage Range (DC or Traien) in, ou 0.5 o DD Inpu Curren (DC or Traien) per Pin I in ±0 ma Oupu Curren (DC or Traien) per Pin I ou ±25 ma Power Dissipaion, per Package (Noe 2) P D 500 mw Ambien Temperaure Range T A 55 o +25 C Sorage Temperaure Range 65 o +50 C Lead Temperaure (8Second Soldering) 260 C Sresses exceeding Maximum Raings may damage he device. Maximum Raings are sress raings only. Funcional operaion above he Recommended Operaing Condiio is no implied. Exended exposure o sresses above he Recommended Operaing Condiio may affec device reliabiliy.. Maximum Raings are hose values beyond which damage o he device may occur. 2. Temperaure Deraing: Plasic P and D/DW Packages: 7.0 mw/ C From 65 C To 25 C This device conai proecion circuiry o guard agai damage due o high saic volages or elecric fields. However, precauio mus be aken o avoid applicaio of any volage higher han maximum raed volages o his highimpedance circui. For proper operaion, in and ou should be corained o he range in or ou ) DD. Unused inpus mus always be ied o an appropriae logic volage level (e.g., eiher or DD ). Unused oupus mus be lef open. SOEIAJ6 F SUFFIX CASE A = Assembly Locaion WL, L = Wafer Lo YY, Y = Year WW, W = Work Week G = PbFree Package MC4503B ALYWG ORDERING INFORMATION See deailed ordering and shipping informaion in he package dimeio secion on page 2 of his daa shee. Semiconducor Componens Indusries, LLC, 20 June, 20 Rev. 8 Publicaion Order Number: MC4503B/D

2 MC4503B PIN ASSIGNMENT DIS A IN DD DIS B OUT 3 4 IN 6 IN OUT 6 OUT IN 5 IN 3 6 OUT 5 OUT IN OUT 4 TRUTH TABLE Appropriae Disable In n Inpu Ou n X High Impedance X = Don Care LOGIC DIAGRAM CIRCUIT DIAGRAM DISABLE B 5 ONE OF TWO/FOUR BUFFERS IN 5 2 OUT 5 DD IN OUT 6 IN IN OUT OUT 2 * IN n OUT n IN 3 IN 4 DISABLE A OUT 3 OUT 4 * DISABLE * TO OTHER BUFFERS DD = PIN 6 = PIN 8 *Diode proecion on all inpus (no shown) ORDERING INFORMATION Device Package Shipping MC4503BCPG MC4503BDG MC4503BDR2G PDIP6 SOIC6 SOIC6 500 / Rail 48 / Rail 2500 / Tape & Reel MC4503BFELG SOEIAJ / Tape & Reel For informaion on ape and reel specificaio, including par orienaion and ape sizes, please refer o our Tape and Reel Packaging Specificaio Brochure, BRD80/D. 2

3 MC4503B ELECTRICAL CHARACTERISTICS olages Referenced o ) 55 C ÎÎ 25 C 25 C ÎÎ Î DD Typ Î Characerisic Symbol dc Min Max Min (Noe 3) Max Min Max ÎÎ Uni Oupu olage 0 Level in = 0 OL dc 0Î 0.05 Î Î 0.05 ÎÎ Î 5Î 0.05 Î Î 0.05 ÎÎ Level in = DD ÎÎ OH 5.0Î Î Î ÎÎ dc Î Î Î ÎÎ Inpu olage 0 Level IL Î dc O = 3.6 or.4 dc) O = 7.2 or 2.8 dc) 0Î 3.0 Î Î 3.0 ÎÎ O =.5 or 3.5 dc) 5Î 4.0 Î Î 4.0 ÎÎ Level IH Î dc O =.4 or 3.6 dc) O = 2.8 or 7.2 dc) 0Î Î Î ÎÎ O = 3.5 or.5 dc) Î Oupu Drive Curren OH I OH Î madc = 2.5 dc) Source OH = 2.5 dc) 5.0Î Î Î ÎÎ OH = 4.6 dc) OH = 9.5 dc) 0Î Î Î ÎÎ OH = 3.5 dc) Î OL = 0.4 dc) Sink I OL 4.5Î Î 2..2Î ÎÎ madc OL = 0.4 dc) OL = 0.5 dc) 0Î Î Î ÎÎ OL =.5 dc) Î Inpu Curren ÎÎ I in 5 ± 0. ÎÎ ± ± 0. ÎÎ ±.0 ÎÎ Adc Inpu Capaciance, in = 0) C in ÎÎ pf Quiescen Curren, (Per Package) I ÎÎ Q ÎÎ Adc Î 5Î 4.0 Î Î 20 ÎÎ Toal Supply Curren (Noe 4, 5) I T 5.0Î I T = (2.5 A/kHz) f + I DD ÎÎ Adc (Dynamic plus Quiescen, 0 I Per Package) 5Î T = (6.0 A/kHz) f + I DD I T = (0 A/kHz) f + I DD ÎÎ (C L = 50 pf on all oupus) (All oupus swiching, Î 50% Duy Cycle) Î 3Sae Oupu Leakage Curren I TL 5 Î ± 0. Î ± ± 0. Î ± 3.0 ÎÎ Adc 3. Daa labelled Typ is no o be used for design purposes bu is inended as an indicaion of he IC s poenial performance. 4. The formulas given are for he ypical characerisics only a 25 C. 5. To calculae oal supply curren a loads oher han 50 pf: I T (C L ) = I T (50 pf) + (C L 50) fk where: I T is in A (per package), C L in pf, = DD ) in vols, f in khz is inpu frequency, and k =

4 MC4503B SWITCHING CHARACTERISTICS (Noe 6) (C L = 50 pf, T A = 25 C) All Types Î DD Î Typ Characerisic Symbol Î CC (Noe 7) Max ÎÎ Uni Oupu Rise Time TLH = (0.5 /pf) C L + 20 ÎÎ TLH TLH = (0.3 /pf) C L Î Î TLH = (0.2 /pf) C L Oupu Fall Time THL = (0.5 /pf) C L + 20 ÎÎ THL 5.0 Î THL = (0.3 /pf) C L THL = (0.2 /pf) C L Î 5 Î 8 35 TurnOff Delay Time, all Oupus ÎÎ PLH Î PLH = (0.3 /pf) C L + 60 PLH = (0.5 /pf) C L Î 5.0 Î PLH = (0. /pf) C L + 20 Î 5 Î TurnOn Delay Time, all Oupus ÎÎ PHL Î PHL = (0.3 /pf) C L PHL = (0.5 /pf) C L + 27 Î 0 Î PHL = (0. /pf) C L Sae Propagaion Delay Time Oupu o High Impedance ÎÎ PHZ Î Î 5 Î Oupu 0 o High Impedance ÎÎ PLZ 5.0 Î Î 5 Î High Impedance o Level ÎÎ PZH Î 5.0 Î Î High Impedance o 0 Level ÎÎ PZL Î Î The formulas given are for he ypical characerisics only a 25 C. 7. Daa labelled Typ is no o be used for design purposes bu is inended as an indicaion of he IC s poenial performance DISABLE PULSE GENERATOR DD6 C L DD 50% 0% PLH PHL OH 50% 0% OL TLH THL PLH PHL Figure. Swiching Time Tes Circui and Waveforms ( TLH, THL, PHL, and PLH ) 4

5 MC4503B PULSE GENERATOR DISABLE DD PULSE GENERATOR DISABLE DD PLZ, PZL CIRCUIT PHZ, PZH CIRCUIT 6 6 k 8 k C L 8 C L DD 50% 0% DISABLE PLZ PZL OH FOR 0% PZH, PZL CIRCUIT OL PHZ PZH FOR PHZ, PLZ CIRCUIT OH % OL Figure 2. 3Sae AC Tes Circui and Waveforms ( PLZ, PHZ, PZH, PZL ) 5

6 MC4503B PACKAGE DIMENSIONS PDIP6 CASE ISSUE T A B NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y4.5M, CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. H G F D 6 PL S C K 0.25 (0.00) M T SEATING T PLANE A M J L M INCHES MILLIMETERS DIM MIN MAX MIN MAX A B C D F G 0.00 BSC 2.54 BSC H BSC.27 BSC J K L M S SOEIAJ6 CASE 9660 ISSUE A e 6 9 Z b D A H E A 0.3 (0.005) M 0.0 (0.004) 8 E IEW P M L E Q L DETAIL P c NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y4.5M, CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS AND ARE MEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.5 (0.006) PER SIDE. 4. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 5. THE LEAD WIDTH DIMENSION (b) DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.08). MILLIMETERS INCHES DIM MIN MAX MIN MAX A A b c D E e.27 BSC BSC H E L L E M Q Z

7 MC4503B PACKAGE DIMENSIONS SOIC6 CASE 75B05 ISSUE K A B P 8 PL 0.25 (0.00) M B S NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y4.5M, CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.5 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.27 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. MILLIMETERS INCHES DIM MIN MAX MIN MAX A B C D F G.27 BSC BSC J K M P R T SEATING PLANE G D 6 PL 0.25 (0.00) M T B S A S K C M R X 45 J F SOLDERING FOOTPRINT 8X X.2 6 6X PITCH 8 9 DIMENSIONS: MILLIMETERS ON Semiconducor and are regisered rademarks of Semiconducor Componens Indusries, LLC (SCILLC). SCILLC reserves he righ o make changes wihou furher noice o any producs herein. SCILLC makes no warrany, represenaion or guaranee regarding he suiabiliy of is producs for any paricular purpose, nor does SCILLC assume any liabiliy arising ou of he applicaion or use of any produc or circui, and specifically disclaims any and all liabiliy, including wihou limiaion special, coequenial or incidenal damages. Typical parameers which may be provided in SCILLC daa shees and/or specificaio can and do vary in differen applicaio and acual performance may vary over ime. All operaing parameers, including Typicals mus be validaed for each cusomer applicaion by cusomer s echnical expers. SCILLC does no convey any licee under is paen righs nor he righs of ohers. SCILLC producs are no designed, inended, or auhorized for use as componens in sysems inended for surgical implan ino he body, or oher applicaio inended o suppor or susain life, or for any oher applicaion in which he failure of he SCILLC produc could creae a siuaion where personal injury or deah may occur. Should Buyer purchase or use SCILLC producs for any such uninended or unauhorized applicaion, Buyer shall indemnify and hold SCILLC and is officers, employees, subsidiaries, affiliaes, and disribuors harmless agai all claims, coss, damages, and expees, and reasonable aorney fees arising ou of, direcly or indirecly, any claim of personal injury or deah associaed wih such uninended or unauhorized use, even if such claim alleges ha SCILLC was negligen regarding he design or manufacure of he par. SCILLC is an Equal Opporuniy/Affirmaive Acion Employer. This lieraure is subjec o all applicable copyrigh laws and is no for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Lieraure Disribuion Cener for ON Semiconducor P.O. Box 563, Denver, Colorado 8027 USA Phone: or Toll Free USA/Canada Fax: or Toll Free USA/Canada orderli@oemi.com N. American Technical Suppor: Toll Free USA/Canada Europe, Middle Eas and Africa Technical Suppor: Phone: Japan Cusomer Focus Cener Phone: ON Semiconducor Websie: Order Lieraure: hp:// For addiional informaion, please conac your local Sales Represenaive MC4503B/D

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