SN74LS132MEL. Quad 2 Input Schmitt Trigger NAND Gate LOW POWER SCHOTTKY

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1 Quad 2 Input Schmitt Trigger NAND Gate The SN74LS32 contains four 2-Input NAND Gates which accept standard TTL input signals and provide standard TTL output levels. They are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. Additionally, they have greater noise margin than conventional NAND Gates. Each circuit contains a 2-input Schmitt trigger followed by a Darlington level shifter and a phase splitter driving a TTL totem pole output. The Schmitt trigger uses positive feedback to effectively speed-up slow input transitions, and provide different input threshold voltages for positive and negative-going transitions. This hysteresis between the positive-going and negative-going input thresholds (typically 800 mv) is determined internally by resistor ratios and is essentially insensitive to temperature and supply voltage variations. As long as one input remains at a more positive voltage than V T+ (MAX), the gate will respond to the transitions of the other input as shown in Figure. LOGIC AND CONNECTION DIAGRAM DIP (TOP VIEW) V CC LOW POWER SCHOTTKY 4 PLASTIC N SUFFIX CASE 646 SOIC D SUFFIX CASE 75A GND 4 GUARANTEED OPERATING RANGES Symbol Parameter Min Typ Max Unit V CC Supply Voltage V T A Operating Ambient Temperature Range C I OH Output Current High 0.4 ma I OL Output Current Low 8.0 ma SOEIAJ M SUFFIX CASE 965 ORDERING INFORMATION Device Package Shipping SN74LS32N 4 Pin DIP 2000 Units/Box SN74LS32D SOIC 4 55 Units/Rail SN74LS32DR2 SOIC /Tape & Reel SN74LS32M SOEIAJ 4 See Note SN74LS32MEL SOEIAJ 4 See Note. For ordering information on the EIAJ version of the SOIC package, please contact your local ON Semiconductor representative. Semiconductor Components Industries, LLC, 2006 June, 2006 Rev. 8 Publication Order Number: SN74LS32/D

2 V O, OUTPUT VOLTAGE (VOLTS) V CC = 5 V T A = 25 C V IN, INPUT VOLTAGE (VOLTS) Figure. V IN versus V OUT Transfer Function DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified) Limits Symbol Parameter Min Typ Max Unit Test Conditions V T+ Positive-Going Threshold Voltage V V CC = 5.0 V V T Negative-Going Threshold Voltage 0.6. V V CC = 5.0 V V T+ V T Hysteresis V V CC = 5.0 V V IK Input Clamp Diode Voltage V V CC = MIN, I IN = 8 ma V OH Output HIGH Voltage V V CC = MIN, I OH = 400 μa, V IN = V IL V OL I T+ I T I IH Output LOW Voltage Input Current at Positive-Going Threshold Input Current at Negative-Going Threshold Input HIGH Current V V CC = MIN, I OL = 4.0 ma, V IN = 2.0 V V V CC = MIN, I OL = 8.0 ma, V IN = 2.0 V 0.4 ma V CC = 5.0 V, V IN = V T+ 0.8 ma V CC = 5.0 V, V IN = V T 20 μa V CC = MAX, V IN = 2.7 V 0. ma V CC = MAX, V IN = 7.0 V I IL Input LOW Current 0.4 ma V CC = MAX, V IN = 0.4 V I OS Output Short Circuit Current (Note 2) ma V CC = MAX, V OUT = 0 V I CC Power Supply Current Total, Output HIGH 5.9 ma V CC = MAX, V IN = 0 V Total, Output LOW ma V CC = MAX, V IN = 4.5 V 2. Not more than one output should be shorted at a time, nor for more than second. AC CHARACTERISTICS (T A = 25 C) Limits Symbol Parameter Min Typ Max Unit Test Conditions t PLH Turn-Off Delay, Input to Output 22 ns V CC = 5.0 V t PHL Turn-On Delay, Input to Output 22 ns C L = 5 pf 2

3 V IN 3 V 0 V.6 V t PHL 0.8 V t PLH V OUT.3 V.3 V Figure 2. AC Waveforms V T, THRESHOLD VOLTAGE (VOLTS) ΔV T, HYSTERESIS (VOLTS) T A = 25 C V T+ V T ΔV T V CC, POWER SUPPLY VOLTAGE (VOLTS) Figure 3. Threshold Voltage and Hysteresis versus Power Supply Voltage V T, THRESHOLD VOLTAGE (VOLTS) ΔV T, HYSTERESIS (VOLTS).9.7 V T V T 0.7 ΔV T T A, AMBIENT TEMPERATURE ( C) Figure 4. Threshold Voltage and Hysteresis versus Temperature 3

4 PACKAGE DIMENSIONS N SUFFIX PLASTIC PACKAGE CASE ISSUE M B NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y4.5M, CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. T SEATING PLANE N A INCHES MILLIMETERS DIM MIN MAX MIN MAX A F L B C D C F G 0.00 BSC 2.54 BSC H J K L K J M 0 0 H G D 4 PL M N (0.005) M 4

5 PACKAGE DIMENSIONS D SUFFIX PLASTIC SOIC PACKAGE CASE 75A 03 ISSUE F T SEATING PLANE G A 4 8 D 4 PL 7 B K P 7 PL C 0.25 (0.00) M T B S A S 0.25 (0.00) M B M R X 45 M J F NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y4.5M, CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.5 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.27 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. MILLIMETERS INCHES DIM MIN MAX MIN MAX A B C D F G.27 BSC BSC J K M P R

6 PACKAGE DIMENSIONS e 4 8 Z D H E b A 0.3 (0.005) M 0.0 (0.004) 7 E A VIEW P M M SUFFIX SOEIAJ PACKAGE CASE ISSUE O L E Q L DETAIL P c NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y4.5M, CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS AND ARE MEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.5 (0.006) PER SIDE. 4. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 5. THE LEAD WIDTH DIMENSION (b) DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.08). MILLIMETERS INCHES DIM MIN MAX MIN MAX A A b c D E e.27 BSC BSC H E L E M Q Z ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 563, Denver, Colorado 8027 USA Phone: or Toll Free USA/Canada Fax: or Toll Free USA/Canada orderlit@onsemi.com N. American Technical Support: Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: Japan Customer Focus Center Phone: ON Semiconductor Website: Order Literature: For additional information, please contact your local Sales Representative SN74LS32/D