MC14511B. BCD To Seven Segment Latch/Decoder/Driver

Transcription

1 BCDToSeven Segment Latch/Decoder/Driver The MC45B BCDtoseven segment latch/decoder/driver is cotructed with complementary MOS (CMOS) enhancement mode devices and NPN bipolar output drivers in a single monolithic structure. The circuit provides the functio of a 4bit storage latch, an 842 BCDtoseven segment decoder, and an output drive capability. Lamp test (LT), blanking (BI), and latch enable (LE) inputs are used to test the display, to turnoff or pulse modulate the brightness of the display, and to store a BCD code, respectively. It can be used with seveegment lightemitting diodes (LED), incandescent, fluorescent, gas discharge, or liquid crystal readouts either directly or indirectly. Applicatio include itrument (e.g., counter, DVM, etc.) display driver, computer/calculator display driver, cockpit display driver, and various clock, watch, and timer uses. Features Low Logic Circuit Power Dissipation HighCurrent Sourcing Outputs (Up to 25 ma) Latch Storage of Code Blanking Input Lamp Test Provision Readout Blanking on all Illegal Input Combinatio Lamp Inteity Modulation Capability Time Share (Multiplexing) Facility Supply Voltage Range = 3.0 V to 8 V Capable of Driving Two Lowpower TTL Loads, One Lowpower Schottky TTL Load, or Two HTL Loads Over the Rated Temperature Range Chip Complexity: 26 FETs or 54 Equivalent Gates Triple Diode Protection on all Inputs PbFree Packages are Available* MAXIMUM RATINGS (Voltages Referenced to ) (Note ) Symbol Parameter Value Unit DC Supply Voltage Range 0.5 to +8.0 V V in Input Voltage Range, All Inputs 0.5 to V I DC Current Drain per Input Pin ma P D Power Dissipation, per Package (Note 2) 500 mw T A Operating Temperature Range 55 to +25 C T stg Storage Temperature Range 65 to +0 C I OHmax Maximum Output Drive Current (Source) per Output 25 ma P OHmax Maximum Continuous Output Power 50 ma (Source) per Output (Note 3). Maximum Ratings are those values beyond which damage to the device may occur. 2. Temperature Derating: Plastic P and D/DW Packages: 7.0 mw/ C From 65 C to 25 C 3. P OHmax = I OH ( V OH ) PDIP6 P SUFFIX CASE 648 SO6 D SUFFIX CASE 75B MARKING DIAGRAMS 6 45B AWLYYWWG SO6 DW SUFFIX CASE 75G SOEIAJ6 F SUFFIX CASE A = Assembly Location WL, L = Wafer Lot YY, Y = Year WW, W = Work Week G = PbFree Package MC45BCP AWLYYWWG ORDERING INFORMATION 45BG AWLYWW MC45B ALYWG See detailed ordering and shipping information in the package dimeio section on page 7 of this data sheet. *For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. Semiconductor Components Industries, LLC, 2006 September, 2006 Rev. 8 Publication Order Number: MC45B/D

2 This device contai protection circuitry to protect the inputs agait damage due to high static voltages or electric fields. However, it is advised that normal precautio be taken to avoid application of any voltage higher than maximum rated voltages to this highimpedance circuit. A destructive high current mode may occur if V in and V out are not cotrained to the range (V in or V out ). Due to the sourcing capability of this circuit, damage can occur to the device if is applied, and the outputs are shorted to and are at a logical (See Maximum Ratings). Unused inputs must always be tied to an appropriate logic voltage level (e.g., either or ). PIN ASSIGNMENT B 6 C 2 f LT BI LE D g a b c e f d g a b c A d e DISPLAY TRUTH TABLE Inputs Outputs LE BI LT D C B A a b c d e f g Display X X 0 X X X X 8 X 0 X X X X Blank Blank Blank Blank Blank Blank Blank X X X X * * X = Don t Care * Depends upon the BCD code previously applied when LE = 0 2

3 ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ELECTRICAL CHARACTERISTICS (Voltages Referenced to ) 55 C 25 C 25 C Characteristic Symbol Min Max Min Typ (Note 4) Max Min Max Unit Output Voltage 0 Level V in = or 0 V OL V in = 0 or Level V OH Input Voltage # 0 Level (V O = 3.8 or 0.5 ) (V O = 8.8 or.0 ) (V O = 3.8 or.5 ) V IL (V O = 0.5 or 3.8 ) (V O =.0 or 8.8 ) (V O =.5 or 3.8 ) Level V IH Output Drive Voltage (I OH = 0 ma) Source (I OH = ma) (I OH = ma) (I OH = ma) (I OH = 20 ma) (I OH = 25 ma) OH (I OH = 0 ma) (I OH = ma) (I OH = ma) (I OH = ma) (I OH = 20 ma) (I OH = 25 ma) (I OH = 0 ma) (I OH = ma) (I OH = ma) (I OH = ma) (I OH = 20 ma) (I OH = 25 ma) Output Drive Current (V OL = 0.4 V) Sink (V OL = 0.5 V) (V OL =.5 V) I OL Input Current I in ± 0. ± ± 0. ±.0 Adc Input Capacitance C in 7.5 pf Quiescent Current (Per Package) V in = 0 or, I out = 0 A Total Supply Current (Notes 5 & 6) (Dynamic plus Quiescent, Per Package) (C L = 50 pf on all outputs, all buffers switching) I DD I T Noise immunity specified for worstcase input combination. Noise Margin for both and 0 level =.0 = 2.0 = 2.5 = 5. The formulas given are for the typical characteristics only at 25 C. 6. To calculate total supply current at loads other than 50 pf: I T (C L ) = I T (50 pf) x 3 (C L 50) f where: I T is in A (per package), C L in pf, in, and f in khz is input frequency I T = (.9 A/kHz) f + I DD I T = (3.8 A/kHz) f + I DD I T = (5.7 A/kHz) f + I DD madc Adc Adc 3

4 ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ SWITCHING CHARACTERISTICS (Note 7) (C L = 50 pf, T A = 25 C) Characteristic Output Rise Time t TLH = (0.40 /pf) C L + 20 t TLH = (0.25 /pf) C L t TLH = (0.20 /pf) C L + Output Fall Time t THL = (.5 /pf) C L + 50 t THL = (0.75 /pf) C L t THL = (0.55 /pf) C L Data Propagation Delay Time t PLH = (0.40 /pf) C L t PLH = (0.25 /pf) C L t PLH = (0.20 /pf) C L + 65 t PHL = (.3 /pf) C L t PHL = (0.60 /pf) C L t PHL = (0.35 /pf) C L Blank Propagation Delay Time t PLH = (0.30 /pf) C L t PLH = (0.25 /pf) C L t PLH = (0. /pf) C L t PHL = (0.85 /pf) C L t PHL = (0.45 /pf) C L t PHL = (0.35 /pf) C L Lamp Test Propagation Delay Time t PLH = (0.45 /pf) C L t PLH = (0.25 /pf) C L t PLH = (0.20 /pf) C L + 80 t PHL = (.3 /pf) C L t PHL = (0.45 /pf) C L t PHL = (0.35 /pf) C L Symbol t TLH t THL t PLH t PHL t PLH t PHL t PLH t PHL Min Typ Max Unit Setup Time t su Hold Time t h Latch Enable Pulse Width t WL The formulas given are for the typical characteristics only. 4

5 Input LE low, and Inputs D, BI and LT high. f in respect to a system clock. All outputs connected to respective C L loads. A, B, AND C ANY OUTPUT % 2f % DUTY CYCLE V OH V OL Figure. Dynamic Power Dissipation Signal Waveforms % INPUT C % t PLH t PHL V OH 90% OUTPUT g % V OL t TLH t THL LE INPUT C OUTPUT g t su % 90% t h V OH V OL (a) Inputs D and LE low, and Inputs A, B, BI and LT high. (b) Input D low, Inputs A, B, BI and LT high. LE 20 90% % 20 t WL (c) Data DCBA strobed into latches. Figure 2. Dynamic Signal Waveforms 5

6 CONNECTIONS TO VARIOUS DISPLAY READOUTS LIGHT EMITTING DIODE (LED) READOUT COMMON CATHODE LED COMMON ANODE LED.7 V.7 V INCANDESCENT READOUT FLUORESCENT READOUT ** DIRECT (LOW BRIGHTNESS) FILAMENT SUPPLY OR APPROPRIATE VOLTAGE BELOW. (CAUTION: Maximum working voltage = 8.0 V) GAS DISCHARGE READOUT APPROPRIATE VOLTAGE LIQUID CRYSTAL (LCD) READOUT EXCITATION (SQUARE WAVE, TO ) /4 OF MC4070B ** A filament prewarm resistor is recommended to reduce filament thermal shock and increase the effective cold resistance of the filament. Direct DC drive of LCD s not recommended for life of LCD readouts. 6

7 BI 4 3 a A 7 2 b c B d 9 e C 2 f 4 g LT 3 D 6 LE 5 = PIN 6 = PIN 8 Figure 3. Logic Diagram ORDERING INFORMATION Device Package Shipping MC45BCP PDIP6 500 / Tape & Ammo Box MC45BCPG PDIP6 (PbFree) 500 / Tape & Ammo Box MC45BD SO6 48 Units / Rail MC45BDG SO6 (PbFree) 48 Units / Rail MC45BDW SO6 47 Units / Rail MC45BDWR2 SO6 WB 00 / Tape & Reel MC45BDWR2G SO6 WB (PbFree) 00 / Tape & Reel MC45BF SOEIAJ6 50 Units / Rail MC45BFG SOEIAJ6 (PbFree) 50 Units / Rail MC45BFEL SOEIAJ / Tape & Reel MC45BFELG SOEIAJ6 (PbFree) 2000 / Tape & Reel For information on tape and reel specificatio, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specificatio Brochure, BRD80/D. 7

8 PACKAGE DIMENSIONS PDIP6 CASE ISSUE T A B NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y4.5M, CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. H G F D 6 PL S C K 0.25 (0.0) M T SEATING T PLANE A M J L M INCHES MILLIMETERS DIM MIN MAX MIN MAX A B C D F G 0.0 BSC 2.54 BSC H 0 BSC.27 BSC J K L M 0 0 S SO6 D SUFFIX PLASTIC SOIC PACKAGE CASE 75B05 ISSUE J T SEATING PLANE G A K B D 6 PL 0.25 (0.0) M T B S A S P 8 PL 0.25 (0.0) M B S C M R X 45 J F NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y4.5M, CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0. (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.27 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. MILLIMETERS INCHES DIM MIN MAX MIN MAX A B C D F G.27 BSC 0 BSC J K M P R

9 PACKAGE DIMENSIONS SO6 WB DW SUFFIX PLASTIC SOIC PACKAGE CASE 75G03 ISSUE C 8X H 0.25 M B M D 6 9 A E h X 45 NOTES:. DIMENSIONS ARE IN MILLIMETERS. 2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y4.5M, DIMENSIONS D AND E DO NOT INLCUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0. PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.3 TOTAL IN EXCESS OF THE B DIMENSION AT MAXIMUM MATERIAL CONDITION. 4X 6X B 0.25 M T A S B S e 8 A A B T SEATING PLANE C L MILLIMETERS DIM MIN MAX A A B C D..45 E e.27 BSC H h L q 0 7 SOEIAJ6 CASE 9660 ISSUE A e 6 9 Z b D A H E A 0.3 (0.005) M 0. (0.004) 8 E VIEW P M L E Q L DETAIL P c NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y4.5M, CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS AND ARE MEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0. (0.006) PER SIDE. 4. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 5. THE LEAD WIDTH DIMENSION (b) DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.08). MILLIMETERS INCHES DIM MIN MAX MIN MAX A A b c D E e.27 BSC 0 BSC H E L L E M 0 0 Q Z

10 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, coequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specificatio can and do vary in different applicatio and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any licee under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applicatio intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless agait all claims, costs, damages, and expees, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 563, Denver, Colorado 8027 USA Phone: or Toll Free USA/Canada Fax: or Toll Free USA/Canada orderlit@oemi.com N. American Technical Support: Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: Japan Customer Focus Center Phone: ON Semiconductor Website: Order Literature: For additional information, please contact your local Sales Representative MC45B/D