MC3346. General Purpose Transistor Array One Differentially Connected Pair and Three Isolated Transistor Arrays

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1 General Purpose Transistor Array One Differentially Connected Pair and Three Isolated Transistor Arrays The MC336 is designed for general purpose, low power applications for consumer and industrial designs. Guaranteed BaseEmitter Voltage Matching Operating Current Range Specified: 0 μa to 0 ma Five General Purpose Transistors in One Package GENERAL PURPOSE TRANSISTOR ARRAY SEMICONDUCTOR TECHNICAL DATA MAXIMUM RATINGS Rating Symbol Value Unit CollectorEmitter Voltage V CEO 5 Vdc CollectorBase Voltage V CBO 20 Vdc EmitterBase Voltage V EB 5.0 Vdc CollectorSubstrate Voltage V CIO 20 Vdc Collector Current Continuous I C 50 madc Total Power T A = 25 C Derate above 25 C P D.2 0 W mw/ C Operating Temperature Range T A 0 to +85 C Storage Temperature Range T stg 65 to +50 C P SUFFIX CASE 66 D SUFFIX CASE 75A (SO) Q5 PIN CONNECTIONS Q Device MC336D MC3356P ORDERING INFORMATION Operating Temperature Range T A = 0 to +85 C Package SO Plastic DIP Q Q2 Q Pin 3 is connected to substrate and must remain at the lowest circuit potential. Semiconductor Components Industries, LLC, 2006 July, 2006 Rev. 2 Publication Order Number: MC336/D

2 ELECTRICAL CHARACTERISTICS (T A = +25 C, unless otherwise noted.) Characteristics Symbol Min Typ Max Unit STATIC CHARACTERISTICS CollectorBase Breakdown Voltage (I C = 0 μadc) CollectorEmitter Breakdown Voltage (I C = madc) CollectorSubstrate Breakdown Voltage (I C = 0 μa) EmitterBase Breakdown Voltage (I E = 0 μadc) CollectorBase Cutoff Current (V CB = 0 Vdc, I E = 0) DC Current Gain (I C = 0 madc, V CE = 3.0 Vdc) (I C = madc, V CE = 3.0 Vdc) (I C = 0 μadc, V CE = 3.0 Vdc) BaseEmitter Voltage (V CE = 3.0 Vdc, I E = madc) (V CE = 3.0 Vdc, I E = 0 madc) Input Offset Current for Matched Pair Q and Q2 Magnitude of Input Offset Voltage Temperature Coefficient of BaseEmitter Voltage Temperature Coefficient CollectorEmitter Cutoff Current (V CE = 0 Vdc, I B = 0) DYNAMIC CHARACTERISTICS Low Frequency Noise Figure (V CE = 3.0 Vdc, I C = 00 μadc, R S = kω, f = khz) Forward Current Transfer Ratio (V CE = 3.0 Vdc, I C = madc, f = khz) Short Circuit Input Impedance Open Circuit Output Impedance Reverse Voltage Transfer Ratio Forward Transfer Admittance (V CE = 3.0 Vdc, I C = madc, f = MHz) Input Admittance (V CE = 3.0 Vdc, I C = madc, f = MHz) Output Admittance (V CE = 3.0 Vdc, I C = madc, f = MHz) CurrentGain Bandwidth Product (V CE = 3.0 Vdc, I C = 3.0 madc) EmitterBase Capacitance (V EB = 3.0 Vdc, I E = 0) CollectorBase Capacitance (V CB = 3.0 Vdc, I C = 0) CollectorSubstrate Capacitance (V CS = 3.0 Vdc, I C = 0) V (BR)CBO Vdc V (BR)CEO 5 Vdc V (BR)CIO Vdc V (BR)EBO Vdc I CBO 0 nadc h FE V BE Vdc I IO I IO μadc mvdc ΔV BE D T.9 mv/ C ΔV IO μv/ C D T I CEO 0.5 μadc NF 3.25 db h FE 0 h ie 3.5 kω h oe 5.6 μmhos h re.8 x0 y fe 3j.5 y ie j0.0 y oe j0.03 f T MHz C eb 0.6 pf C cb 0.58 pf C CI 2.8 pf 2

3 I CBD, COLLECTOR CUTOFF CURRENT (nadc) IB = 0 V CE = 0 V V CE = 5.0 V T A, AMBIENT TEMPERATURE ( C) Figure. Collector Cutoff Current versus Temperature (Each Transistor) I CBD, COLLECTOR CUTOFF CURRENT (nadc) V CB = 5 V V CB = 0 V V CB = 5.0 V T A, AMBIENT TEMPERATURE ( C) Figure 2. Collector Cutoff Current versus Temperature (Each Transistor) I IO, INPUT OFFSET CURRENT ( μ Adc) I C, COLLECTOR CURRENT (madc) Figure 3. Input Offset Characteristics for Q and Q2 V FE, BASE-EMITTER VOLTAGE (V) V BE 0.5 V IO I E, EMITTER CURRENT (madc) Figure. BaseEmitter and Input Offset Voltage Characteristics V IO, INPUT OFFSET VOLTAGE (mvdc) h FE, DC CURRENT GAIN h FE h FE h FE2 or 0.85 h FE2 h FE I E, EMITTER CURRENT (madc) Figure 5. DC Current Gain h FE /h FE2, DC CURRENT GAIN RATIO 3

4 PACKAGE DIMENSIONS P SUFFIX CASE 6606 ISSUE M 8 7 B NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y.5M, CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL.. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. T SEATING PLANE N A INCHES MILLIMETERS DIM MIN MAX MIN MAX A F L B C D C F G 0.00 BSC 2.5 BSC H J K L K J M 0 0 H G D PL M N (0.005) M

5 PACKAGE DIMENSIONS T SEATING PLANE G A 8 D PL 7 B K P 7 PL C 0.25 (0.00) M T B S A S D SUFFIX CASE 75A03 (SO8) ISSUE F 0.25 (0.00) M B M R X 5 M J F NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y.5M, CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION.. MAXIMUM MOLD PROTRUSION 0.5 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.27 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. MILLIMETERS INCHES DIM MIN MAX MIN MAX A B C D F G.27 BSC BSC J K M P R ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 563, Denver, Colorado 8027 USA Phone: or Toll Free USA/Canada Fax: or Toll Free USA/Canada orderlit@onsemi.com N. American Technical Support: Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: Japan Customer Focus Center Phone: ON Semiconductor Website: Order Literature: For additional information, please contact your local Sales Representative MC336/D

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