MC14099B. 8-Bit Addressable Latches

Transcription

1 -Bit Addressable Latches The MC99B is an bit addressable latch. Data is entered in serial form when the appropriate latch is addressed (via address pi A, A, A) and write disable is in the low state. For the MC99B the input is a unidirectional write only port. The data is presented in parallel at the output of the eight latches independently of the state of Write Disable, Write/Read or Chip Enable. A Master Reset capability is available on both parts. Features Serial Data Input Parallel Output Master Reset Supply Voltage Range =. to Capable of Driving Two Lowpower TTL Loads or One LowPower Schottky TTL Load over the Rated Temperature Range MC99B pin for pin compatible with CD99B NLV Prefix for Automotive and Other Applicatio Requiring Unique Site and Control Change Requirements; AECQ Qualified and PPAP Capable This Device is PbFree and is RoHS Compliant MAXIMUM RATINGS (Voltages Referenced to ) Symbol Parameter Value Unit DC Supply Voltage Range. to +. V V in, V out Input or Output Voltage Range (DC or Traient). to +. V I in, I out P D Input or Output Current (DC or Traient) per Pin Power Dissipation, per Package (Note ) ± ma mw T A Ambient Temperature Range to + C T stg Storage Temperature Range to + C T L Lead Temperature (Second Soldering) C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected.. Temperature Derating: D/DW Packages: 7. mw/ C From C To C This device contai protection circuitry to guard agait damage due to high static voltages or electric fields. However, precautio must be taken to avoid applicatio of any voltage higher than maximum rated voltages to this highimpedance circuit. For proper operation, V in and V out should be cotrained to the range (V in or V out ). Unused inputs must always be tied to an appropriate logic voltage level (e.g., either or ). Unused outputs must be left open. RESE T WRITE DISABLE A A WL YY WW G SOIC WD DW SUFFIX CASE G PIN ASSIGNMENT Q7 A A MARKING DIAGRAM 7 99BG AWLYYWW = Assembly Location = Wafer Lot = Year = Work Week = PbFree Indicator ORDERING INFORMATION See detailed ordering and shipping information in the package dimeio section on page of this data sheet. 9 Q Q Q Q Q Q Q Semiconductor Components Industries, LLC, August, Rev. 9 Publication Order Number: MC99B/D

2 MC99B WRITE DISABLE A A A RESET 7 DECODER = = LATCHES 9 Q Q Q Q Q Q Q Q7 ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ELECTRICAL CHARACTERISTICS (Voltages Referenced to ) Characteristic Output Voltage V in = or V in = or Input Voltage (V O =. or. ) (V O = 9. or. ) (V O =. or. ) (V O =. or. ) (V O =. or 9. ) (V O =. or. ) Level Level Level Level Output Drive Current (V OH =. ) Source (V OH =. ) (V OH = 9. ) (V OH =. ) (V OL =. ) Sink (V OL =. ) (V OL =. ) Symbol V OL V OH V IL V IH I OH I OL C C C Min Max Min Typ (Note ) Max Min Max Input Current I in ±. ±. ±. ±. Adc Input Capacitance (V in = ) C in 7. pf Input Capacitance MC99B Data (pin ) (V in = ) Quiescent Current (Per Package) Total Supply Current (Notes & ) (Dynamic plus Quiescent, Per Package) (C L = pf on all outputs, all buffers switching) C in. pf I DD I T... I T = (. A/kHz) f + I DD I T = (. A/kHz) f + I DD I T = (. A/kHz) f + I DD Product parametric performance is indicated in the Electrical Characteristics for the listed test conditio, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditio.. Data labelled Typ is not to be used for design purposes but is intended as an indication of the IC s potential performance.. The formulas given are for the typical characteristics only at C.. To calculate total supply current at loads other than pf: I T (C L ) = I T ( pf) + (C L ) Vfk where: I T is in A (per package), C L in pf, V = ( ) in volts, f in khz is input frequency, and k = Unit madc madc Adc Adc

3 ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ SWITCHING CHARACTERISTICS (Note ) (C L = pf, T A = C) Characteristic Output Rise and Fall Time t TLH, t THL = (. /pf) C L + t TLH, t THL = (. /pf) C L + t TLH, t THL = (. /pf) C L + Propagation Delay Time Data to Output Q Symbol t TLH, t THL t PHL, t PLH Write Disable to Output Q Reset to Output Q CE to Output Q (MC99B only) Propagation Delay Time, MC99B only Chip Enable, Write/Read to Data t PHL, t PLH Address to Data Pulse Widths Reset t w(h) t w(l) Write Disable Set Up Time Data to Write Disable Hold Time Write Disable to Data Set Up Time Address to Write Disable Removal Time Write Disable to Address t su t h t su t rem Min Typ (Note ) Max Unit. The formulas given are for the typical characteristics only at C.. Data labelled Typ is not to be used for design purposes but is intended as an indication of the IC s potential performance. 9

4 FUNCTION DIAGRAM RESET 9 Q WRITE DISABLE EACH LATCH A TO OTHER LATCHES ZERO SELECT Q Q A ADDRESS DECODER OTHER LATCHES Q Q Q A 7 (M.S.B.) Q Q7 Write Disable Reset TRUTH TABLE Addressed Latch Unaddressed Latches Data Q n * Data Reset Q n * Q n * Reset Reset *Q n is previous state of latch. Reset to zero state. CAUTION: To avoid unintentional data changes in the latches, Write Disable must be active (high) during traitio on the address inputs A, A, and A.

5 SWITCHING WAVEFORMS OR WRITE DISABLE % OUTPUT Q t PLH 9% % % t PHL t THL t TLH t w(h) RESET % t PHL OUTPUT Q ADDRESS WRITE DISABLE % t su t w(l) t rem % t su t h %

6 ORDERING INFORMATION MC99BDWG Device Package Shipping SOIC WB (PbFree) 7 Units / Rail MC99BDWRG SOIC WB (PbFree) Units / Tape & Reel NLV99BDWRG* SOIC WB (PbFree) Units / Tape & Reel For information on tape and reel specificatio, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specificatio Brochure, BRD/D. *NLV Prefix for Automotive and Other Applicatio Requiring Unique Site and Control Change Requirements; AECQ Qualified and PPAP Capable.

7 PACKAGE DIMENSIONS SOIC WB CASE G ISSUE D X H. M B M D 9 A E h X NOTES:. DIMENSIONS ARE IN MILLIMETERS.. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y.M, 99.. DIMENSIONS D AND E DO NOT INLCUDE MOLD PROTRUSION.. MAXIMUM MOLD PROTRUSION. PER SIDE.. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE. TOTAL IN EXCESS OF THE B DIMENSION AT MAXIMUM MATERIAL CONDITION. X B. M T A S B S A B MILLIMETERS DIM MIN MAX A.. A.. B..9 C.. D.. E e.7 BSC H.. h.. L..9 q 7 L X e A T SEATING PLANE C SOLDERING FOOTPRINT* X.. X..7 PITCH DIMENSIONS: MILLIMETERS *For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and the are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. SCILLC ow the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC s product/patent coverage may be accessed at SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, coequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specificatio can and do vary in different applicatio and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any licee under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applicatio intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless agait all claims, costs, damages, and expees, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box, Denver, Colorado 7 USA Phone: or Toll Free USA/Canada Fax: 7 or 7 Toll Free USA/Canada orderlit@oemi.com N. American Technical Support: 9 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 79 9 Japan Customer Focus Center Phone: 7 ON Semiconductor Website: Order Literature: For additional information, please contact your local Sales Representative MC99B/D