MC74VHC14. Hex Schmitt Inverter

Transcription

1 MC74HC4 Hex Schmitt Inverter The MC74HC4 is an advanced high speed CMOS Schmitt inverter fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation. Pin configuration and function are the same as the MC74HC04 but the inputs have hysteresis and, with its Schmitt trigger function, the HC4 can be used as a line receiver which will receive slow input signals. The internal circuit is composed of three stages, including a buffer output which provides high noise immunity and stable output. The inputs tolerate voltages up to 7.0, allowing the interface of 5.0 systems to 3.0 systems. Features High Speed: t PD = 5.5 ns (Typ) at CC = 5.0 Low Power Dissipation: I CC = 2.0 A (Max) at T A = 25 C High Noise Immunity: NIH = NIL = 28% CC Power Down Protection Provided on Inputs Balanced Propagation Delays Designed for 2.0 to 5.5 Operating Range Low Noise: OLP = 0.8 (Max) Pin and Function Compatible with Other Standard Logic Families Latchup Performance Exceeds 300 ma ESD Performance: Human Body Model > 2000 ; Machine Model > 200 Chip Complexity: 60 FETs or 5 Equivalent Gates These Devices are Pb Free and are RoHS Compliant CC A6 Y6 A5 Y5 A4 Y SOIC 4 D SUFFIX CASE 75A TSSOP DT SUFFIX CASE 948G A = Assembly Location WL, L = Wafer Lot Y = Year WW, W = Work Week G or = Pb Free Package (Note: Microdot may be in either location) FUNCTION TABLE Inputs Outputs A L H 4 MARKING DIAGRAMS 4 Y H L HC4G AWLYWW HC 4 ALYW ORDERING INFORMATION A Y A2 Y2 A3 Y3 GND See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. Figure. 4 Lead Pinout (Top iew) Semiconductor Components Industries, LLC, 20 May, 20 Rev. 0 Publication Order Number: MC74HC4/D

2 MC74HC4 A 2 Y A2 A3 A4 A5 A Y2 Y3 Y4 Y5 Y6 Y = A This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high impedance circuit. For proper operation, in and out should be constrained to the range GND ( in or out ) CC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or CC ). Unused outputs must be left open. Figure 2. Logic Diagram MAXIMUM RATINGS Symbol Parameter alue Unit CC Positive DC Supply oltage 0.5 to +7.0 IN Digital Input oltage 0.5 to +7.0 OUT DC Output oltage 0.5 to CC +0.5 I IK Input Diode Current 20 ma I OK Output Diode Current 20 ma I OUT DC Output Current, per Pin 25 ma I CC DC Supply Current, CC and GND Pins 75 ma P D Power Dissipation in Still Air SOIC TSSOP T STG Storage Temperature Range 65 to +50 C ESD ESD Withstand oltage Human Body Model (Note ) Machine Model (Note 2) Charged Device Model (Note 3) I LATCHUP Latchup Performance Above CC and Below GND at 25 C (Note 4) 300 ma JA Thermal Resistance, Junction to Ambient SOIC TSSOP Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected.. Tested to EIA/JESD22 A4 A. 2. Tested to EIA/JESD22 A5 A. 3. Tested to JESD22 C0 A. 4. Tested to EIA/JESD78. RECOMMENDED OPERATING CONDITIONS Symbol Characteristics Min Max Unit CC DC Supply oltage IN DC Input oltage OUT DC Output oltage 0 CC T A Operating Temperature Range, All Package Types C t r, t f Input Rise or Fall Time CC = CC = >2000 >200 N/A No limit No limit mw C/W ns/ 2

3 MC74HC4 Î DC ELECTRICAL CHARACTERISTICS SymbolÎ Parameter Î Test Conditions Î T A = 25 C Î 55 C T A 25 C CC Î MinÎ TypÎ Max Min Max Unit T+ Î Positive Threshold Î oltage (Figure 5) Î 3.0Î 4.5 Î 5.5Î Î Î Î Î T Î Negative Threshold Î oltage (Figure 5) Î Î Î Î Î Î Î Î Î Î H Hysteresis oltage Î (Figure 5) Î 4.5Î 0.40 Î Î Î 0.50 Î Î OH Î Minimum High Level Î in = IH or IL Î 2.0Î.9 Î Î Output oltage I OH = 50 A Î 4.5Î 4.4 Î Î in = IH or IL Î Î Î I OH = 4 ma Î 3.0 Î 2.58 Î 2.48 Î I OH = 8 ma Î OL Maximum Low Level Î Output oltage Î in = IH or IL I OL = 50 A Î 3.0Î 0.0Î 0.Î 4.5Î 0.0Î 0.Î in = IH or IL Î Î Î I Î Î OL = 4 ma I OL = 8 ma Î Î I in Î Maximum Input Î in = 5.5 or GND Î 0 to 5.5Î Leakage Current ± 0. ±.0 Î A I CC Î Maximum Quiescent Î in = CC or GND Î 5.5 Î A Supply Current Î AC ELECTRICAL CHARACTERISTICS (Input t r = t f = 3.0 ns) Î T A = 25 C Î 55 C T A 25 C SymbolÎ Parameter Test Conditions Î Min Î Typ Max Min Max Unit t PLH, t PHL Î Maximum Propagation CC = 3.3 ± 0.3 C L = 5 pf Î ns Delay, C L = 50 pf A or B to Y Î CC = 5.0 ± 0.5 C L = 5 pf C L = 50 pf Î Î C in Î Maximum Input Capacitance Î Î Î Î pf C PD Power Dissipation Capacitance (Note 5) 25 C, CC = C PD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: I CC(OPR) = C PD CC f in + I CC / 6 (per buffer). C PD is used to determine the no load dynamic power consumption; P D = C PD CC 2 f in + I CC CC. NOISE CHARACTERISTICS (Input t r = t f = 3.0 ns, C L = 50 pf, CC = 5.0 ) Symbol Characteristic 2 T A = 25 C OLP Quiet Output Maximum Dynamic OL OL Quiet Output Minimum Dynamic OL IHD Minimum High Level Dynamic Input oltage 3.5 ILD Maximum Low Level Dynamic Input oltage.5 Typ Max pf Unit 3

4 MC74HC4 TEST POINT A 50% t PLH t PHL CC GND DEICE UNDER TEST OUTPUT C L * Y 50% CC *Includes all probe and jig capacitance Figure 3. Switching Waveforms Figure 4. Test Circuit, TYPICAL INPUT THRESHOLD OLTAGE (OLTS) T 4 3 ( T+ ) H typ 2 ( T ) CC, POWER SUPPLY OLTAGE (OLTS) H typ = ( T+ typ) ( T typ) Figure 5. Typical Input Threshold, T+, T versus Power Supply oltage H CC H CC in T+ T in T+ T GND GND OH OH out out OL OL (a) A Schmitt Trigger Squares Up Inputs With Slow Rise and Fall Times (b) A Schmitt Trigger Offers Maximum Noise Immunity Figure 6. Typical Schmitt Trigger Applications 4

5 MC74HC4 ORDERING INFORMATION MC74HC4DG Device Package Shipping SOIC 4 (Pb Free) 55 Units / Rail MC74HC4DR2G SOIC 4 (Pb Free) 2500 / Tape & Reel MC74HC4DTG TSSOP 4* 96 Units / Rail MC74HC4DTR2G TSSOP 4* 2500 / Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD80/D. *This package is inherently Pb Free. 5

6 MC74HC4 PACKAGE DIMENSIONS SOIC 4 CASE 75A 03 ISSUE J T SEATING PLANE G A 4 8 D 4 PL 7 B K P 7 PL C 0.25 (0.00) M T B S A S 0.25 (0.00) M B M NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y4.5M, CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.5 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.27 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. MILLIMETERS INCHES R X 45 F DIM MIN MAX MIN MAX A B C D M J F G.27 BSC BSC J K M P R SOLDERING FOOTPRINT 4X X X PITCH DIMENSIONS: MILLIMETERS 6

7 MC74HC4 PACKAGE DIMENSIONS TSSOP 4 CASE 948G 0 ISSUE B 0.5 (0.006) T 0.5 (0.006) T L 0.0 (0.004) T SEATING PLANE U U S 2X L/2 PIN IDENT. S D C 4 G 4X K REF A 0.0 (0.004) M T U S S 8 7 B U H N N J J F DETAIL E DETAIL E 0.25 (0.00) K K M ÇÇÇ ÉÉÉ ÇÇÇ SECTION N N W NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y4.5M, CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.5 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.00) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE W. MILLIMETERS INCHES DIM MIN MAX MIN MAX A B C D F G 0.65 BSC BSC H J J K K L 6.40 BSC BSC M SOLDERING FOOTPRINT PITCH 4X X.26 DIMENSIONS: MILLIMETERS ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 563, Denver, Colorado 8027 USA Phone: or Toll Free USA/Canada Fax: or Toll Free USA/Canada orderlit@onsemi.com N. American Technical Support: Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: Japan Customer Focus Center Phone: ON Semiconductor Website: Order Literature: For additional information, please contact your local Sales Representative MC74HC4/D