MARKING DIAGRAMS ORDERING INFORMATION VHC139 AWLYYWW SOIC 16 D SUFFIX CASE 751B VHC 139 AWLYWW TSSOP 16 DT SUFFIX CASE 948F

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1 The MC74HC139 is an advanced high speed CMOS 2 to 4 decoder/ demultiplexer fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation. When the device is enabled (E = low), it can be used for gating or as a data input for demultiplexing operations. When the enable input is held high, all four outputs are fixed high, independent of other inputs. The internal circuit is composed of three stages, including a buffer output which provides high noise immunity and stable output. The inputs tolerate voltages up to 7, allowing the interface of 5 systems to 3 systems. High Speed: t PD = 5.0ns (Typ) at CC = 5 Low Power Dissipation: I CC = 4µΑ (Max) at T A = 25 C High Noise Immunity: NIH = NIL = 28% CC Power Down Protection Provided on Inputs Balanced Propagation Delays Designed for 2 to 5.5 Operating Range Low Noise: OLP = 0.8 (Max) Pin and Function Compatible with Other Standard Logic Families Latchup Performance Exceeds 300mA ESD Performance: HBM > 2000; Machine Model > 200 Chip Complexity: 100 FETs or 25 Equivalent Gates SOIC 16 D SUFFIX CASE 751B TSSOP 16 DT SUFFIX CASE 948F SOIC EIAJ 16 M SUFFIX CASE 966 MARKING DIAGRAMS 16 9 HC139 AWLYYWW 1 8 A = Assembly Location WL = Wafer Lot Y = Year WW = Work Week HC 139 AWLYWW HC139 ALYW A = Assembly Location WL = Wafer Lot YY = Year WW = Work Week A = Assembly Location L = Wafer Lot Y = Year W = Work Week 8 ORDERING INFORMATION Device Package Shipping MC74HC139D SOIC Units/Rail MC74HC139DR2 SOIC Units/Reel MC74HC139DT TSSOP Units/Rail MC74HC139DTEL MC74HC139DTR2 MC74HC139M MC74HC139MEL TSSOP 16 TSSOP 16 SOIC EIAJ 16 SOIC EIAJ Units/Reel 2000 Units/Reel 48 Units/Rail 2000 Units/Reel Semiconductor Components Industries, LLC, 2001 March, 2001 Rev. 2 1 Publication Order Number: MC74HC139/D

2 PIN ASSIGNMENT LOGIC DIAGRAM FUNCTION TABLE Inputs Outputs E A1 A0 Y0 Y1 Y2 Y3 H X X H H H H L L L L H H H L L H H L H H L H L H H L H L H H H H H L 2

3 EXPANDED LOGIC DIAGRAM (1/2 OF DEICE) IEC LOGIC DIAGRAM Figure 1. Input Equivalent Circuit 3

4 MAXIMUM RATINGS* Symbol Parameter Î alue Unit CC DC Supply oltage Î 0.5 to in DC Input oltage Î 0.5 to out DC Output oltage Î 0.5 to CC I IK Input Diode Current Î 20 ma I OK Output Diode Current Î ± 20 ma I out DC Output Current, per Pin Î ± 25 ma I CC DC Supply Current, CC and GND Pins Î ± 75 ma P D Power Dissipation in Still Air, SOIC Packages Î 500 mw TSSOP Package 450 T stg Storage Temperature Î 65 to C * Absolute maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute maximum rated conditions is not implied. Derating SOIC Packages: 7 mw/c from 65 to 125C TSSOP Package: 6.1 mw/c from 65 to 125C This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high impedance circuit. For proper operation, in and out should be constrained to the range GND ( in or out ) CC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or CC ). Unused outputs must be left open. RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min Max Unit CC DC Supply oltage in DC Input oltage out DC Output oltage 0 CC T A Operating Temperature C t r, t f Input Rise and Fall Time CC = 3.3 ±0.3 0 (Figure 1) CC =5.0 ± ns/ The JA of the package is equal to 1/Derating. Higher junction temperatures may affect the expected lifetime of the device per the table and figure below. DEICE JUNCTION TEMPERATURE ERSUS TIME TO 0.1% BOND FAILURES Junction Temperature C Time, Hours Time, Years 80 1,032, , , , , , , Figure 2. Failure Rate vs. Time Junction Temperature 4

5 Î DC ELECTRICAL CHARACTERISTICS CC T A = 25 C Î T A = 85 C T A = 125 C Symbol Parameter Test Conditions () Min Typ Max Min Max Min Max Unit IH Minimum High Level Input Î oltage IL Maximum Low Level Input Î oltage OH Minimum IN = IH or IL High Level Output I Î oltage OH = 50 µ IN = IH or IL IN = IH or IL I OH = 4 ma I OH = 8 ma Î OL Maximum Low Level Output IN = IH or IL I OL = 50 µa Î oltage IN = IH or IL IN = IH or IL I OL = 4 ma I OL = 8 ma I IN Maximum Input IN = 5.5 or 0 to 5.5 Î Leakage Current GND ± 0.1 ± 1.0 ± 1.0 µa I CC Maximum Quiescent Supply IN = CC or GND µa Current AC ELECTRICAL CHARACTERISTICS (Input t r = t f = 3.0ns) T A = 40 to T A = 55 to T A = 25 C 85 C 125 C Î Î Symbo l Parameter Î Test Conditions Min Typ Max Min Max Min Max Unit t PLH, Maximum Î CC = 3.3 ± 0.3 C L = 15 pf t PHL Propagation Delay, Î C L = 50 pf ns AtoY Î Î CC = 5.0 ± 0.5 C L = 15 pf Î C L = 50 pf Î t PLH, Maximum t PHL Propagation Delay, Î CC = 3.3 ± 0.3 C L = 15 C L = 50 Î ns E to Y Î CC = 5.0 ± 0.5 C L = 15 pf C L = 50 pf C IN Maximum Input Î 4 10 Î 10 pf Capacitance 25 C, CC = 5.0 C PD Power Dissipation Capacitance (1.) 26 pf 1. C PD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: I CC(OPR) = C PD CC f in + I CC /2 (per decoder). C PD is used to determine the no load dynamic power consumption; P D = C PD 2 CC f in + I CC CC. 5

6 SWITCHING WAEFORMS Figure 3. Figure 4. *Includes all probe and jig capacitance Figure 5. Test Circuit 6

7 PACKAGE DIMENSIONS T G A D 16 PL K B C D SUFFIX SOIC CASE 751B 05 ISSUE J P 8 PL M R X 45 J F DT SUFFIX TSSOP CASE 948F 01 ISSUE O T L PIN 1 IDENT. D 2X L/2 C 16X K REF A G B U H N N J J1 F DETAIL E DETAIL E K K1 ÇÇÇ ÉÉ SECTION N N M W 7

8 PACKAGE DIMENSIONS e Z D b E A H E A 1 IEW P M SUFFIX SOIC EIAJ 16 CASE ISSUE O M L E Q 1 L DETAIL P c ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. PUBLICATION ORDERING INFORMATION NORTH AMERICA Literature Fulfillment: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado USA Phone: or Toll Free USA/Canada Fax: or Toll Free USA/Canada ONlit@hibbertco.com Fax Response Line: or Toll Free USA/Canada N. American Technical Support: Toll Free USA/Canada EUROPE: LDC for ON Semiconductor European Support German Phone: (+1) (Mon Fri 2:30pm to 7:00pm CET) ONlit german@hibbertco.com French Phone: (+1) (Mon Fri 2:00pm to 7:00pm CET) ONlit french@hibbertco.com English Phone: (+1) (Mon Fri 12:00pm to 5:00pm GMT) ONlit@hibbertco.com EUROPEAN TOLL FREE ACCESS*: *Available from Germany, France, Italy, UK, Ireland CENTRAL/SOUTH AMERICA: Spanish Phone: (Mon Fri 8:00am to 5:00pm MST) ONlit spanish@hibbertco.com Toll Free from Mexico: Dial for Access then Dial ASIA/PACIFIC: LDC for ON Semiconductor Asia Support Phone: (Tue Fri 9:00am to 1:00pm, Hong Kong Time) Toll Free from Hong Kong & Singapore: ONlit asia@hibbertco.com JAPAN: ON Semiconductor, Japan Customer Focus Center Nishi Gotanda, Shinagawa ku, Tokyo, Japan Phone: r14525@onsemi.com ON Semiconductor Website: For additional information, please contact your local Sales Representative. 8 MC74HC139/D

MARKING DIAGRAMS ORDERING INFORMATION Figure 1. Pin Assignment VHCT139A AWLYYWW SOIC 16 D SUFFIX CASE 751B VHCT139A AWLYWW

MARKING DIAGRAMS ORDERING INFORMATION Figure 1. Pin Assignment VHCT139A AWLYYWW SOIC 16 D SUFFIX CASE 751B VHCT139A AWLYWW The MC74HCT139A is an advanced high speed CMOS 2 to 4 decoder/ demultiplexer fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL devices