MC74AC132, MC74ACT132. Quad 2 Input NAND Schmitt Trigger
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1 MC74AC32, MC74ACT32 Quad 2 Input NAND Schmitt Trigger The MC74AC/74ACT32 contains four 2 input NAND gates which are capable of transforming slowly changing input signals into sharply defined, jitter free output signals. In addition, they have greater noise margin than conventional NAND gates. Each circuit contains a 2 input Schmitt trigger. The Schmitt trigger uses positive feedback to effectively speed up slow input transitions, and provide different input threshold voltages for positive and negative-going transitions. This hysteresis between the positive going and negative going input threshold is determined by resistor ratios and is essentially insensitive to temperature and supply voltage variations. Features Schmitt Trigger Inputs Outputs Source/Sink 24 ma ACT32 Has TTL Compatible Inputs Pb Free Packages are Available PDIP 4 N SUFFIX CASE 646 SOIC 4 D SUFFIX CASE 75A SOEIAJ 4 M SUFFIX CASE ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet GND Figure. Pinout; 4 Lead Packages Conductors (Top iew) FUNCTION TABLE Inputs Output A B Y L L H L H H H L H H H L H = HIGH oltage Level L = LOW oltage Level Semiconductor Components Industries, LLC, 2006 October, 2006 Rev. 7 Publication Order Number: MC74AC32/D
2 MC74AC32, MC74ACT32 RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min Typ Max Supply oltage AC ACT in, out DC Input oltage, Output oltage (Ref. to GND) 0 t r, t f Input Rise and Fall Time (Note ) AC Devices except Schmitt Inputs t r, t f Input Rise and Fall Time (Note 2) ACT Devices except Schmitt T J Junction Temperature (PDIP) 40 C T A Operating Ambient Temperature Range C I OH Output Current High 24 ma I OL Output Current Low 24 ma. in from 30% to 70% ; see individual Data Sheets for devices that differ from the typical input rise and fall times. 2. in from 0.8 to 2.0 ; see individual Data Sheets for devices that differ from the typical input rise and fall times. ns/ DC CHARACTERISTICS Symbol Parameter OH Minimum High Level Output oltage 74AC T A = +25 C Typ 74AC T A = 40 C to +85 C Guaranteed Limits Conditions I OUT = 50 A OL Maximum Low Level Output oltage * IN = IL or IH ma I OH 24 ma ma I OUT = 50 A I IN Maximum Input Leakage Current * IN = IL or IH ma I OL 24 ma ma 5.5 ±0. ±.0 A I =, GND I OLD Minimum Dynamic ma OLD =.65 Max I OHD Output Current ma OHD = 3.85 Min I CC Maximum Quiescent Supply Current A IN = or GND *All outputs loaded; thresholds on input associated with output under test. Maximum test duration 2.0 ms, one output loaded at a time. NOTE: I IN and I 3.0 are guaranteed to be less than or equal to the respective
3 MC74AC32, MC74ACT32 AC CHARACTERISTICS (For Figures and Waveforms See Section 3 of the ON Semiconductor FACT Data Book, DL38/D) Symbol t PLH t PHL Propagation Delay Propagation Delay *oltage Range 3.3 is 3.3 ±0.3. oltage Range 5.0 is 5.0 ±0.5. Parameter * 74AC T A = +25 C C L = 50 pf 74AC T A = 40 C to +85 C C L = 50 pf Min Typ Max Min Max ns ns Fig. No DC CHARACTERISTICS 74ACT 74ACT Symbol Parameter T A = +25 C T A = 40 C to +85 C Conditions Typ Guaranteed Limits OH Minimum High Level Output oltage I OUT = 50 A OL Maximum Low Level Output oltage * IN = IL or IH ma I OH 24 ma I OUT = 50 A I IN Maximum Input Leakage Current * IN = IL or IH ma I OL 24 ma 5.5 ±0. ±.0 A I =, GND I CCT Additional Max. I CC /Input ma I = 2. I OLD Minimum Dynamic ma OLD =.65 Max I OHD Output Current ma OHD = 3.85 Min I CC Maximum Quiescent Supply Current *All outputs loaded; thresholds on input associated with output under test. Maximum test duration 2.0 ms, one output loaded at a time A IN = or GND AC CHARACTERISTICS (For Figures and Waveforms See Section 3 of the ON Semiconductor FACT Data Book, DL38/D) Symbol Parameter * 74ACT T A = +25 C C L = 50 pf 74ACT T A = 40 C to +85 C C L = 50 pf Min Typ Max Min Max t PLH Propagation Delay ns 3 6 t PHL Propagation Delay ns 3 5 *oltage Range 5.0 is 5.0 ±0.5. Fig. No. 3
4 MC74AC32, MC74ACT32 INPUT CHARACTERISTICS (unless otherwise specified) Symbol Parameter 74AC 74ACT Test Conditions Maximum Positive t T Threshold A = Worst Case Minimum Negative t T Threshold A = Worst Case h(max) Maximum Hysteresis T A = Worst Case h(min) Minimum Hysteresis T A = Worst Case CAPACITANCE Symbol Parameter alue Typ Test Conditions C IN Input Capacitance 4.5 pf = 5.0 C PD Power Dissipation Capacitance 30 pf = 5.0 4
5 MC74AC32, MC74ACT32 MARKING DIAGRAMS 4 PDIP 4 MC74AC32N AWLYYWWG 4 SOIC 4 AC32G AWLYWW 4 SOEIAJ 4 74AC32 ALYWG 4 MC74ACT32N AWLYYWWG 4 ACT32G AWLYWW 4 74ACT32 ALYWG A = Assembly Location WL, L = Wafer Lot YY, Y = Year WW, W = Work Week G = Pb Free Package ORDERING INFORMATION Device Package Shipping MC74AC32N MC74AC32NG MC74ACT32N MC74ACT32NG MC74AC32D MC74AC32DG MC74AC32DR2 MC74AC32DR2G MC74ACT32D MC74ACT32DG MC74ACT32DR2 MC74ACT32DR2G MC74AC32MEL MC74AC32MELG MC74ACT32MEL MC74ACT32MELG PDIP 4 PDIP 4 PDIP 4 PDIP 4 SOIC 4 SOIC 4 SOIC 4 SOIC 4 SOIC 4 SOIC 4 SOIC 4 SOIC 4 SOEIAJ 4 SOEIAJ 4 SOEIAJ 4 SOEIAJ 4 25 s/rail 55 s/rail 2500/Tape & Reel 55 s/rail 2500/Tape & Reel 2000/Tape & Reel 5
6 MC74AC32, MC74ACT32 PACKAGE DIMENSIONS PDIP 4 CASE ISSUE P B NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y4.5M, CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. T N SEATING PLANE A INCHES MILLIMETERS DIM MIN MAX MIN MAX A B F L C D C F G 0.00 BSC 2.54 BSC H J K K J L M 0 0 H G D 4 PL M N (0.005) M 6
7 MC74AC32, MC74ACT32 PACKAGE DIMENSIONS SOIC 4 CASE 75A 03 ISSUE H T SEATING PLANE G A 4 8 D 4 PL 7 B K P 7 PL C 0.25 (0.00) M T B S A S 0.25 (0.00) M B M NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y4.5M, CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.5 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.27 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. MILLIMETERS INCHES R X 45 F DIM MIN MAX MIN MAX A B C D M J F G.27 BSC BSC J K M P R SOLDERING FOOTPRINT* 4X X X PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 7
8 MC74AC32, MC74ACT32 PACKAGE DIMENSIONS SOEIAJ 4 CASE ISSUE A L E 4 8 Q E H E M 7 L Z DETAIL P D IEW P e A c b A 0.3 (0.005) M 0.0 (0.004) NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y4.5M, CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS AND ARE MEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.5 (0.006) PER SIDE. 4. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 5. THE LEAD WIDTH DIMENSION (b) DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.08). MILLIMETERS INCHES DIM MIN MAX MIN MAX A A b c D E e.27 BSC BSC H E L E M Q Z ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 563, Denver, Colorado 8027 USA Phone: or Toll Free USA/Canada Fax: or Toll Free USA/Canada orderlit@onsemi.com N. American Technical Support: Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: Japan Customer Focus Center Phone: ON Semiconductor Website: Order Literature: For additional information, please contact your local Sales Representative MC74AC32/D
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