MC74VHC00. Quad 2-Input NAND Gate

Transcription

1 MC4C00 Quad 2-Input NAND Gate The MC4C00 is an advanced high speed CMOS 2 input NAND gate fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TT while maintaining CMOS low power dissipation. The internal circuit is composed of three stages, including a buffer output which provides high noise immunity and stable output. The inputs tolerate voltages up to, allowing the interface of 5 systems to 3 systems. MARKING DIAGRAMS Features igh Speed: t PD = 3. ns (Typ) at CC = 5 ow Power Dissipation: I CC = 2 A (Max) at T A = 25 C igh Noise Immunity: NI = NI = 28% CC Power Down Protection Provided on Inputs Balanced Propagation Delays Designed for 2 to 5.5 Operating Range ow Noise: OP = 0.8 (Max) Pin and Function Compatible with Other Standard ogic Families atchup Performance Exceeds 300 ma ESD Performance: BM > 2000 ; Machine Model > 200 Chip Complexity: 32 FETs or 8 Equivalent Gates These Devices are Pb Free and are RoS Compliant SO 4 D SUFFIX CASE 5A TSSOP 4 DT SUFFIX CASE 948G C00G AWYWW C 00 AYW CC B4 A4 Y4 B3 A3 Y EIAJ SO 4 M SUFFIX CASE 965 4C00 AYWG A B Y A2 B2 Y2 GND Figure. Pinout: 4 ead Packages (Top iew) A = Assembly ocation, W = Wafer ot Y = Year W, WW = Work Week G, = Pb Free Device ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet. FUNCTION TABE Inputs Output A B Y Semiconductor Components Industries, C, 20 May, 20 Rev. 6 Publication Order Number: MC4C00/D

2 MC4C00 A B A2 B2 A3 B3 A4 B Y 6 Y2 Y = AB 8 Y3 Y4 Figure 2. ogic Diagram MAXIMUM RATINGS Symbol Parameter alue Unit CC Positive DC Supply oltage 0.5 to +.0 IN Digital Input oltage 0.5 to +.0 OUT DC Output oltage 0.5 to CC +0.5 I IK Input Diode Current 20 ma I OK Output Diode Current 20 ma I OUT DC Output Current, per Pin 25 ma I CC DC Supply Current, CC and GND Pins 5 ma P D Power Dissipation in Still Air SOIC Package TSSOP T STG Storage Temperature Range 65 to +50 C ESD ESD Withstand oltage uman Body Model (Note ) Machine Model (Note 2) Charged Device Model (Note 3) I ATC UP atch Up Performance Above CC and Below GND at 25 C (Note 4) 300 ma JA Thermal Resistance, Junction to Ambient SOIC Package TSSOP Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected.. Tested to EIA/JESD22 A4 A 2. Tested to EIA/JESD22 A5 A 3. Tested to JESD22 C0 A 4. Tested to EIA/JESD8 RECOMMENDED OPERATING CONDITIONS Symbol Characteristics Min Max Unit CC DC Supply oltage IN DC Input oltage OUT DC Output oltage 0 CC T A Operating Temperature Range, All Package Types C t r, t f Input Rise or Fall Time CC = CC = >2000 >200 N/A mw C/W ns/ 2

3 MC4C00 DC EECTRICA CARACTERISTICS Î T A = 40 to T A = 55 to T CC Î A = 25 C 85 C +25 C Î Symbol Parameter Î Test Conditions Min Typ Max Min Max Min Max Î Unit Î I igh evel Input Î oltage Î Î 3.0 to CC x CC x CC x 0. Î I ow evel Input Î oltage Î to 0.50 CC x 0.50 CC x 0.50 CC x Î O igh evel in = I or I Î Output oltage Î I O = 50 A Î Î Î Î Î in = I or I I O = 4 ma I O = 8 ma Î Î Î O ow evel Î in = I or I Î Output oltage I O = 50 A Î in = I or I I O = 4 ma Î I O = 8 ma I Î in Input eakage Current Î in = 5.5 or GND 0 to Î A Î I CC Quiescent Supply in = CC Î Î or GND Current Î A AC EECTRICA CARACTERISTICS (Input t r = t f = 3.0 ns) T T A = 25 C A = 40 to T 85 C A = 55 to +25 C Symbol Parameter Test Conditions Min Typ Max Min Max Min Max Unit Î t P, Propagation CC = 3.3 ± 0.3 C = 5 pf Î t P Delay, A or B to YÎ C = 50 pf ns CC = 5.0 ± 0.5 C = 5 pf C = 50 pf C Î in Input pf Capacitance C PD Power Dissipation Capacitance (Note 5) 25 C, CC = C PD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: I CC(OPR) = C PD CC f in + I CC / 4 (per gate). C PD is used to determine the no load dynamic power consumption; P D = C PD CC 2 f in + I CC CC. NOISE CARACTERISTICS (Input t r = t f = 3.0 ns, C = 50 pf, CC = 5.0, Measured in SOIC Package) Symbol Characteristic 9 T A = 25 C OP Quiet Output Maximum Dynamic O O Quiet Output Minimum Dynamic O ID Minimum igh evel Dynamic Input oltage 3.5 ID Maximum ow evel Dynamic Input oltage.5 Typ Max pf Unit 3

4 MC4C00 TEST POINT A or B 50% t P t P CC GND DEICE UNDER TEST OUTPUT C * Y 50% CC *Includes all probe and jig capacitance Figure 3. Switching Waveforms Figure 4. Test Circuit INPUT Figure 5. Input Equivalent Circuit ORDERING INFORMATION MC4C00DR2G Device Package Shipping SOIC / Tape & Reel MC4C00DTG MC4C00DTR2G TSSOP 4* TSSOP 4* 96 Units / Rail 2500 / Tape & Reel MC4C00MEG SOEIAJ / Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD80/D. *This package is inherently Pb Free. 4

5 MC4C00 PACKAGE DIMENSIONS SOIC 4 CASE 5A 03 ISSUE J T SEATING PANE G A 4 8 D 4 P B K P P C 0.25 (0.00) M T B S A S 0.25 (0.00) M B M NOTES:. DIMENSIONING AND TOERANCING PER ANSI Y4.5M, CONTROING DIMENSION: MIIMETER. 3. DIMENSIONS A AND B DO NOT INCUDE MOD PROTRUSION. 4. MAXIMUM MOD PROTRUSION 0.5 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCUDE DAMBAR PROTRUSION. AOWABE DAMBAR PROTRUSION SA BE 0.2 (0.005) TOTA IN EXCESS OF TE D DIMENSION AT MAXIMUM MATERIA CONDITION. MIIMETERS INCES R X 45 F DIM MIN MAX MIN MAX A B C D M J F G.2 BSC BSC J K M 0 0 P R SODERING FOOTPRINT 4X 0.58 X.04 4X.52.2 PITC DIMENSIONS: MIIMETERS 5

6 MC4C00 PACKAGE DIMENSIONS TSSOP 4 CASE 948G 0 ISSUE B 0.5 (0.006) T 0.5 (0.006) T 0.0 (0.004) T SEATING PANE U U S 2X /2 PIN IDENT. S D C 4 4X K REF 0.0 (0.004) M T U S S N (0.00) M B U A G N J J F DETAI E K K ÇÇÇ ÉÉÉ ÇÇÇ SECTION N N DETAI E W NOTES:. DIMENSIONING AND TOERANCING PER ANSI Y4.5M, CONTROING DIMENSION: MIIMETER. 3. DIMENSION A DOES NOT INCUDE MOD FAS, PROTRUSIONS OR GATE BURRS. MOD FAS OR GATE BURRS SA NOT EXCEED 0.5 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCUDE INTEREAD FAS OR PROTRUSION. INTEREAD FAS OR PROTRUSION SA NOT EXCEED 0.25 (0.00) PER SIDE. 5. DIMENSION K DOES NOT INCUDE DAMBAR PROTRUSION. AOWABE DAMBAR PROTRUSION SA BE 0.08 (0.003) TOTA IN EXCESS OF TE K DIMENSION AT MAXIMUM MATERIA CONDITION. 6. TERMINA NUMBERS ARE SOWN FOR REFERENCE ONY.. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PANE W. MIIMETERS INCES DIM MIN MAX MIN MAX A B C D F G 0.65 BSC BSC J J K K BSC BSC M SODERING FOOTPRINT PITC 4X X.26 DIMENSIONS: MIIMETERS 6

7 MC4C00 PACKAGE DIMENSIONS SOEIAJ 4 CASE ISSUE B E 4 8 Q E E M Z DETAI P D IEW P e A c b A 0.3 (0.005) M 0.0 (0.004) NOTES:. DIMENSIONING AND TOERANCING PER ANSI Y4.5M, CONTROING DIMENSION: MIIMETER. 3. DIMENSIONS D AND E DO NOT INCUDE MOD FAS OR PROTRUSIONS AND ARE MEASURED AT TE PARTING INE. MOD FAS OR PROTRUSIONS SA NOT EXCEED 0.5 (0.006) PER SIDE. 4. TERMINA NUMBERS ARE SOWN FOR REFERENCE ONY. 5. TE EAD WIDT DIMENSION (b) DOES NOT INCUDE DAMBAR PROTRUSION. AOWABE DAMBAR PROTRUSION SA BE 0.08 (0.003) TOTA IN EXCESS OF TE EAD WIDT DIMENSION AT MAXIMUM MATERIA CONDITION. DAMBAR CANNOT BE OCATED ON TE OWER RADIUS OR TE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND ADJACENT EAD TO BE 0.46 ( 0.08). MIIMETERS INCES DIM MIN MAX MIN MAX A A b c D E e.2 BSC BSC E E M Q Z ON Semiconductor and are registered trademarks of Semiconductor Components Industries, C (SCIC). SCIC reserves the right to make changes without further notice to any products herein. SCIC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCIC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCIC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCIC does not convey any license under its patent rights nor the rights of others. SCIC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCIC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCIC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCIC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCIC was negligent regarding the design or manufacture of the part. SCIC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBICATION ORDERING INFORMATION ITERATURE FUFIMENT: iterature Distribution Center for ON Semiconductor P.O. Box 563, Denver, Colorado 802 USA Phone: or Toll Free USA/Canada Fax: or Toll Free USA/Canada orderlit@onsemi.com N. American Technical Support: Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: Japan Customer Focus Center Phone: ON Semiconductor Website: Order iterature: For additional information, please contact your local Sales Representative MC4C00/D