MC74HC32A. Quad 2-Input OR Gate. High Performance Silicon Gate CMOS
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1 MC74C32 Quad 2-Input OR Gate igh Performance Silicon Gate CMOS The MC74C32 is identical in pinout to the S32. The device inputs are compatible with Standard CMOS outputs; with pullup resistors, they are compatible with STT outputs. Features Output Drive Capability: 0 STT oads Outputs Directly Interface to CMOS, NMOS and TT Operating oltage Range: to ow Input Current: igh Noise Immunity Characteristic of CMOS Devices In Compliance With the JEDEC Standard No. 7 Requirements Chip Complexity: 48 FETs or 2 Equivalent Gates N Prefix for utomotive and Other pplications Requiring Unique Site and Control Change Requirements; EC Q00 Qualified and PPP Capable These Devices are Pb Free, alogen Free/FR Free and are RoS Compliant OGIC DIGRM 3 Y 6 Y2 8 Y3 Y = + 4 SOIC 4 N D SUFFIX CSE 75 MRKING DIGRMS C32G WYWW SOIC 4 N PIN SSIGNMENT TSSOP 4 DT SUFFIX CSE 948G CC 4 4 Y4 3 3 Y Y 2 2 Y2 GND 4 ead (Top iew) 4 C 32 YW TSSOP PIN 4 = CC PIN 7 = GND Y4 = ssembly ocation, W = Wafer ot Y, YY = Year W, WW = Work Week G or = Pb Free Package (Note: Microdot may be in either location) FUNCTION TE Inputs Output Y ORDERING INFORMTION See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. Semiconductor Components Industries, C, 204 ugust, 204 Rev. 2 Publication Order Number: MC74C32/D
2 MC74C32 MXIMUM RTINGS Symbol Parameter alue Unit CC DC Supply oltage (Referenced to GND) 0.5 to +7.0 in DC Input oltage (Referenced to GND) 0.5 to CC out DC Output oltage (Referenced to GND) 0.5 to CC I in DC Input Current, per Pin ±20 m I out DC Output Current, per Pin ±25 m I CC DC Supply Current, CC and GND Pins ±50 m P D Power Dissipation in Still ir, SOIC Package TSSOP Package T stg Storage Temperature 65 to +50 C T ead Temperature, mm from Case for 0 Seconds Plastic DIP, SOIC or TSSOP Package 260 mw C This device contains protection circuitry to guard against damage due to high static voltages or electric fields. owever, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high impedance circuit. For proper operation, in and out should be constrained to the range GND ( in or out ) CC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or CC ). Unused outputs must be left open. Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. Derating: SOIC Package: 7 mw/ C from 65 to 25 C TSSOP Package: 6. mw/ C from 65 to 25 C RECOMMENDED OPERTING CONDITIONS Symbol Parameter Min Max Unit CC DC Supply oltage (Referenced to GND) in, out DC Input oltage, Output oltage (Referenced to GND) 0 CC T Operating Temperature, ll Package Types C t r, t f Input Rise and Fall Time CC = (Figure ) CC = CC = Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability ns 2
3 MC74C32 DC CRCTERISTICS (oltages Referenced to GND) Guaranteed imit CC Symbol Parameter Condition 55 to 25 C 85 C 25 C Unit I Minimum igh evel Input oltage out = or CC I out 20 I Maximum ow evel Input oltage out = or CC I out 20 O O Minimum igh evel Output oltage Maximum ow evel Output oltage in = I or I I out 20 in = I or I in = I or I I out 20 in = I or I I out 2.4m I out 4.0m I out 5.2m I out 2.4m I out 4.0m I out 5.2m I in Maximum Input eakage Current in = CC or GND ± ±.0 ±.0 I CC Maximum Quiescent Supply Current (per Package) in = CC or GND I out = C CRCTERISTICS (C = 50pF, Input t r = t f = 6ns) Guaranteed imit CC Symbol Parameter 55 to 25 C 85 C 25 C Unit t P, t P t T, t T Maximum Propagation Delay, Input or to Output Y (Figures and 2) Maximum Output Transition Time, ny Output (Figures and 2) C in Maximum Input Capacitance pf C, CC = 5.0, EE = 0 ns ns C PD Power Dissipation Capacitance (Per uffer)* * Used to determine the no load dynamic power consumption: P D = C PD CC 2 f + I CC CC. 20 pf 3
4 MC74C32 t r t f INPUT OR 90% 50% 0% CC GND t P t P OUTPUT Y 90% 50% 0% t T t T Figure. Switching Waveforms TEST POINT DEICE UNDER TEST OUTPUT C * *Includes all probe and jig capacitance Figure 2. Test Circuit Y Figure 3. Expanded ogic Diagram (/4 of the Device) 4
5 MC74C32 ORDERING INFORMTION MC74C32DG Device Package Shipping SOIC 4 N 55 Units / Rail MC74C32DR2G MC74C32DTR2G N74C32DG* N74C32DR2G* SOIC 4 N TSSOP 4 SOIC 4 N SOIC 4 N 55 Units / Rail N74C32DTR2G* TSSOP 4 For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications rochure, RD80/D. *N Prefix for utomotive and Other pplications Requiring Unique Site and Control Change Requirements; EC Q00 Qualified and PPP Capable 5
6 MC74C32 PCKGE DIMENSIONS TSSOP 4 CSE 948G ISSUE 5 (0.006) T 5 (0.006) T 0 (0.004) T SETING PNE U U S 2X /2 PIN IDENT. S D C 4 4X K REF 0 (0.004) M T U S S N (0.00) M U 7 G N J J F DETI E K K ÇÇÇ ÉÉÉ SECTION N N DETI E W NOTES:. DIMENSIONING ND TOERNCING PER NSI YM, CONTROING DIMENSION: MIIMETER. 3. DIMENSION DOES NOT INCUDE MOD FS, PROTRUSIONS OR GTE URRS. MOD FS OR GTE URRS S NOT EXCEED 5 (0.006) PER SIDE. 4. DIMENSION DOES NOT INCUDE INTERED FS OR PROTRUSION. INTERED FS OR PROTRUSION S NOT EXCEED 0.25 (0.00) PER SIDE. 5. DIMENSION K DOES NOT INCUDE DMR PROTRUSION. OWE DMR PROTRUSION S E 0.08 (0.003) TOT IN EXCESS OF TE K DIMENSION T MXIMUM MTERI CONDITION. 6. TERMIN NUMERS RE SOWN FOR REFERENCE ONY. 7. DIMENSION ND RE TO E DETERMINED T DTUM PNE W. MIIMETERS INCES DIM MIN MX MIN MX C D F G 0.65 SC SC J J K K SC SC M SODERING FOOTPRINT* PITC 4X X.26 DIMENSIONS: MIIMETERS *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SODERRM/D. 6
7 MC74C32 PCKGE DIMENSIONS SOIC 4 N CSE ISSUE K M M e D 7 3X b E 0.25 M C S S C SETING PNE DETI h X 45 M 3 DETI NOTES:. DIMENSIONING ND TOERNCING PER SME YM, CONTROING DIMENSION: MIIMETERS. 3. DIMENSION b DOES NOT INCUDE DMR PROTRUSION. OWE PROTRUSION S E 3 TOT IN EXCESS OF T MXIMUM MTERI CONDITION. 4. DIMENSIONS D ND E DO NOT INCUDE MOD PROTRUSIONS. 5. MXIMUM MOD PROTRUSION 5 PER SIDE. MIIMETERS INCES DIM MIN MX MIN MX b D E e.27 SC SC h M SODERING FOOTPRINT* X.8.27 PITC 4X 0.58 DIMENSIONS: MIIMETERS *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SODERRM/D. ON Semiconductor and the are registered trademarks of Semiconductor Components Industries, C (SCIC) or its subsidiaries in the United States and/or other countries. SCIC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. listing of SCIC s product/patent coverage may be accessed at Marking.pdf. SCIC reserves the right to make changes without further notice to any products herein. SCIC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCIC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCIC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. ll operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCIC does not convey any license under its patent rights nor the rights of others. SCIC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCIC product could create a situation where personal injury or death may occur. Should uyer purchase or use SCIC products for any such unintended or unauthorized application, uyer shall indemnify and hold SCIC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCIC was negligent regarding the design or manufacture of the part. SCIC is an Equal Opportunity/ffirmative ction Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUICTION ORDERING INFORMTION ITERTURE FUFIMENT: iterature Distribution Center for ON Semiconductor P.O. ox 563, Denver, Colorado 8027 US Phone: or Toll Free US/Canada Fax: or Toll Free US/Canada orderlit@onsemi.com N. merican Technical Support: Toll Free US/Canada Europe, Middle East and frica Technical Support: Phone: Japan Customer Focus Center Phone: ON Semiconductor Website: Order iterature: For additional information, please contact your local Sales Representative MC74C32/D
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of 0 Decoder/Driver Open Collector The SN74LS45, -of-0 Decoder/Driver, is designed to accept BCD inputs and provide appropriate outputs to drive 0-digit incandescent displays. All outputs remain off for
NLSV2T Bit Dual-Supply Non-Inverting Level Translator
2-Bit Dual-Supply Non-Inverting Level Translator The NLSV2T2 is a 2 bit configurable dual supply voltage level translator. The input n and output B n ports are designed to track two different power supply
NLX1G99. Configurable Multifunction Gate
NX1G99 Configurable Multifunction Gate The NX1G99 MiniGate is an advanced high speed CMOS multifunction gate with a 3 state output. With the output enable input () at igh, the output is disabled and is
MC74LV594A. 8-Bit Shift Register with Output Register
8-Bit Shift Register with Output Register The MC74LV594A is an 8 bit shift register designed for 2 V to 6.0 V V CC operation. The device contain an 8 bit serial in, parallel out shift register that feeds
BAT54XV2 Schottky Barrier Diode
June 2015 BAT54XV2 Schottky Barrier Diode Features Low Forward Voltage Drop Flat Lead, Surface Mount Device at 0.60mm Height Extremely Small Outline Plastic Package SOD523F Moisture Level Sensitivity 1
MC74VHC1G03, MC74VHC1GT03. Single 2-Input NOR Gate with Open Drain Output
MC7VHCG3, MC7VHCGT3 Single 2-Input NOR Gate with Open Drain Output The MC7VHCG3 / MC7VHCGT3 is a 2input NOR Gate with an open drain output in tiny footprint packages. The input structures provide protection
NL17SZ126. Non-Inverting 3-State Buffer. The NL17SZ126 is a single non inverting buffer in tiny footprint packages.
Non-Inverting 3-State Buffer The N7SZ6 is a single noninverting buffer in tiny footprint packages. Features Designed for.6 to. Operation.7 ns t PD at = (typ) Inputs/Outputs Overvoltage Tolerant up to.
NGTG50N60FLWG IGBT. 50 A, 600 V V CEsat = 1.65 V
NGTGN6FLWG IGBT This Insulated Gate Bipolar Transistor (IGBT) features a robust and cost effective Trench construction, and provides superior performance in demanding switching applications, offering both
MC74HC139A. Dual 1 of 4 Decoder/ Demultiplexer. High Performance Silicon Gate CMOS
MC74HC39A Dual of 4 Decoder/ Demultiplexer High Performance Silicon Gate CMOS The MC74HC39A is identical in pinout to the LS39. The device inputs are compatible with standard CMOS outputs; with pull up
MC74HC244A Octal 3 State Noninverting Buffer/Line Driver/ Line Receiver
Octal 3 State Noninverting Buffer/Line Driver/ Line Receiver High Performance Silicon Gate CMOS The MC74HC244A is identical in pinout to the LS244. The device inputs are compatible with standard CMOS outputs;
BAS19LT1G, BAS20LT1G, BAS21LT1G, BAS21DW5T1G. High Voltage Switching Diode HIGH VOLTAGE SWITCHING DIODE
BAS9LTG, BAS20LTG, BAS2LTG, BAS2DWTG High Voltage Switching Diode Features These Devices are PbFree, Halogen Free/BFR Free and are RoHS Compliant MAXIMUM RATINGS Continuous Reverse Voltage Rating Symbol
LOW POWER SCHOTTKY. GUARANTEED OPERATING RANGES ORDERING INFORMATION
The SN74S240 and SN74S244 are Octal Buffers and ine Drivers designed to be employed as memory address drivers, clock drivers and bus-oriented transmitters/receivers which provide improved PC board density.
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MMBZ5xxBLT Series, SZMMBZ5xxBLTG Series Zener Voltage Regulators 5 mw SOT Surface Mount This series of Zener diodes is offered in the convenient, surface mount plastic SOT package. These devices are designed
MC74HCT138A. 1 of 8 Decoder/ Demultiplexer with LSTTL Compatible Inputs. High Performance Silicon Gate CMOS
of 8 Decoder/ Demultiplexer with LSTTL Compatible Inputs High Performance Silicon Gate CMOS The MC74HCT38A is identical in pinout to the LS38. The HCT38A may be used as a level converter for interfacing
SN74LS132MEL. Quad 2 Input Schmitt Trigger NAND Gate LOW POWER SCHOTTKY
Quad 2 Input Schmitt Trigger NAND Gate The SN74LS32 contains four 2-Input NAND Gates which accept standard TTL input signals and provide standard TTL output levels. They are capable of transforming slowly
NGTB30N120LWG IGBT. 30 A, 1200 V V CEsat = 1.75 V E off = 1.0 mj
NGTBNLWG IGBT This Insulated Gate Bipolar Transistor (IGBT) features a robust and cost effective Field Stop (FS) Trench construction, and provides superior performance in demanding switching applications.
MC74LCX74. Low-Voltage CMOS Dual D-Type Flip-Flop. With 5 V Tolerant Inputs
Low-oltage CMOS Dual D-Type Flip-Flop With 5 Tolerant Inputs The MC74LCX74 is a high performance, dual D type flip flop with asynchronous clear and set inputs and complementary (O, O) outputs. It operates
NGTB40N60FLWG IGBT. 40 A, 600 V V CEsat = 1.85 V
NGTB4N6FLWG IGBT This Insulated Gate Bipolar Transistor (IGBT) features a robust and cost effective Trench construction, and provides superior performance in demanding switching applications, offering
NE522 High Speed Dual Differential Comparator/Sense Amp
HighSpeed DualDifferential Comparator/Sense Amp Features 5 ns Maximum Guaranteed Propagation Delay 0 A Maximum Input Bias Current TTL-Compatible Strobes and Outputs Large Common-Mode Input oltage Range
BC847BPDXV6T5G. SBC847BPDXV6 NPN/PNP Dual General Purpose Transistor
BC847BPDX6, SBC847BPDX6 NPN/PNP Dual General Purpose Transistor This transistor is designed for general purpose amplifier applications. It is housed in the SOT563 which is designed for low power surface
NLSV22T244. Dual 2-Bit Dual-Supply Non-Inverting Level Translator
Dual 2-Bit Dual-Supply Non-Inverting Level Translator The NLSV22T244 is a dual 2 bit configurable dual supply bus buffer level translator. The input ports A and the output ports B are designed to track
NGTB25N120LWG IGBT. 25 A, 1200 V V CEsat = 1.85 V E off = 0.8 mj
NGTBNLWG IGBT This Insulated Gate Bipolar Transistor (IGBT) features a robust and cost effective Field Stop (FS) Trench construction, and provides superior performance in demanding switching applications.
MBRS140T3G SBRS8140T3G. Surface Mount Schottky Power Rectifier SCHOTTKY BARRIER RECTIFIER 1.0 AMPERE, 40 VOLTS
MBRSTG, SBRS8TG Surface Mount Schottky Power Rectifier Schottky Power Rectifiers employ the use of the Schottky Barrier principle in a large area metal to silicon power diode. State of the art geometry
Schmitt Trigger Inputs Outputs Source/Sink 24 ma ACT132 Has TTL Compatible Inputs. ORDERING INFORMATION
The MC74AC/74ACT132 contains four 2 input NAND gates which are capable of transforming slowly changing input signals into sharply defined, jitter free output signals. In addition, they have greater noise
LOW POWER SCHOTTKY. MODE SELECT TRUTH TABLE ORDERING INFORMATION GUARANTEED OPERATING RANGES OPERATING MODE
The SN74S74A dual edge-triggered flip-flop utilizes Schottky TT circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear and set inputs, and also complementary and outputs.