MC74AC00, MC74ACT00. Quad 2 Input NAND Gate. High Performance Silicon Gate CMOS
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1 Quad 2Input NAND Gate ighperformance SiliconGate CMOS Features Output Drive Capability: 24 ma Operating oltage Range: 2 to 6 AC00; to ACT00 ow Input Current:.0 A igh Noise Immunity Characteristic of CMOS Devices In Compliance With the JEDEC Standard No. 7A Requirements Chip Complexity: 32 FETs PbFree Packages are Available A B A2 B2 A3 B3 A4 B Y 6 Y2 8 Y3 Y4 Y = AB PDIP4 N SUFFIX CASE 646 SOIC4 D SUFFIX CASE 75A TSSOP4 DT SUFFIX CASE 948G 4 4 MARKING DIAGRAMS MC74xxx00N AWYYWWG 4 4 xxx00 AWYWWG xxx 00 AYW PIN 4 = CC PIN 7 = GND Figure. ogic Diagram CC B4 A4 Y4 B3 A3 Y SOEIAJ4 M SUFFIX CASE 965 xxx = AC or ACT A = Assembly ocation W or = Wafer ot YY or Y = Year WW or W = Work Week G = PbFree Package 74xxx00 AYWG A B Y A2 B2 Y2 GND Figure 2. Pinout: 4ead Packages (Top iew) FUNCTION TABE Inputs Output A B Y ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet. Semiconductor Components Industries, C, 2006 Publication Order Number: MC74AC00/D
2 MAXIMUM RATINGS Symbol Parameter alue Unit CC DC Supply oltage 0.5 to 7.0 I DC Input oltage 0.5 I CC 0.5 O DC Output oltage (Note ) 0.5 O CC 0.5 I IK DC Input Diode Current 20 ma I OK DC Output Diode Current 50 ma I O DC Output Sink/Source Current 50 ma I CC DC Supply Current per Output Pin 50 ma I GND DC Ground Current per Output Pin 50 ma T STG Storage Temperature Range 65 to 50 C T ead temperature, mm from Case for 0 Seconds 260 C T J Junction temperature under Bias 50 C JA Thermal resistance PDIP SOIC TSSOP P D Power Dissipation in Still Air at 85 C PDIP SOIC TSSOP MS Moisture Sensitivity evel F R Flammability Rating Oxygen Index: 30% 35% U in ESD ESD Withstand oltage uman Body Model (Note 2) Machine Model (Note 3) Charged Device Model (Note 4) > 2000 > 200 > 000 I atchup atchup Performance Above CC and Below GND at 85 C (Note 5) 00 ma Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.. I O absolute maximum rating must be observed. 2. Tested to EIA/JESD22A4A. 3. Tested to EIA/JESD22A5A. 4. Tested to JESD22C0A. 5. Tested to EIA/JESD78. RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min Typ Max Unit CC Supply oltage MC74AC00 in, out DC Input oltage, Output oltage (Ref. to GND) 0 CC C/W mw t r, t f Input Rise and Fall Time (Note 6) 3.0 MC74AC ns/ t r, t f Input Rise and Fall Time (Note 7) ns/ T J Junction Temperature 50 C T A Operating Ambient Temperature Range C I O Output Current igh 24 ma I O Output Current ow 24 ma 6. in from 30% to 70% CC. 7. in from to. 2
3 DC CARACTERISTICS Symbol Parameter CC () T A = +25 C T A = 40 C to +85 C T A = 55 C to + 25 C Typ Guaranteed imits Unit Conditions I Minimum igh evel Input oltage.5.5 OUT = 0. or CC 0. I Maximum ow evel Input oltage.5.5 OUT = 0. or CC 0. O Minimum igh evel Output oltage I OUT = 50 A * IN = I or I I O 24 ma 24 ma O Maximum ow evel Output oltage I OUT = 50 A I IN Maximum Input eakage Current * IN = I or I I O 24 ma 24 ma A I = CC, GND I CCT Additional Max. I CC /Input ma I = CC 2. I OD Minimum Dynamic ma OD =.65 Max I OD Output Current ma OD = 3.85 Min I CC Maximum Quiescent Supply Current *All outputs loaded; thresholds on input associated with output under test. Maximum test duration ms, one output loaded at a time A IN = CC or GND AC CARACTERISTICS (t r = t f = 3.0 ns; C = 50 pf; see Figures 3 and 4 for Waveforms) Symbol Parameter CC * () T A = +25 C T A = 40 C to +85 C T A = 55 C to +25 C Min Typ Max Min Max Min Max t P Propagation Delay ns t P Propagation Delay ns *oltage Range 5.0 is Unit CAPACITANCE Symbol Parameter alue Typ Test Conditions Unit C IN Input Capacitance CC = 5.0 pf C PD Power Dissipation Capacitance 30 CC = 5.0 pf 4
4 ORDER INFORMATION MC74AC00D MC74AC00DG Device Package Shipping SOIC4 SOIC4 (PbFree) 55 Units / Rail MC74AC00N MC74AC00NG MC74AC00DR2 MC74AC00DR2G MC74AC00DTR2 MC74AC00DTR2G MC74AC00ME MC74AC00MEG N NG D DG PDIP4 PDIP4 (PbFree) SOIC4 SOIC4 (PbFree) TSSOP4* TSSOP4* SOEIAJ4 SOEIAJ4 (PbFree) PDIP4 PDIP4 (PbFree) SOIC4 SOIC4 (PbFree) 25 Units / Rail 2500 / Tape and Reel 2000 / Tape and Reel 25 Units / Rail 55 Units / Rail DR2 DR2G DTR2 DTR2G ME MEG SOIC4 SOIC4 (PbFree) TSSOP4* TSSOP4* SOEIAJ4 SOEIAJ4 (PbFree) 2500 / Tape and Reel 2000 / Tape and Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD80/D. *This package is inherently PbFree. 6
5 PACKAGE DIMENSIONS SOIC4 CASE 75A03 ISSUE T SEATING PANE A 4 8 G 7 B P 7 P 0.25 (0.00) M B M NOTES:. DIMENSIONING AND TOERANCING PER ANSI YM, CONTROING DIMENSION: MIIMETER. 3. DIMENSIONS A AND B DO NOT INCUDE MOD PROTRUSION. 4. MAXIMUM MOD PROTRUSION 0.5 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCUDE DAMBAR PROTRUSION. AOWABE DAMBAR PROTRUSION SA BE 0.27 (0.005) TOTA IN EXCESS OF TE D DIMENSION AT MAXIMUM MATERIA CONDITION. MIIMETERS INCES C R X 45 F DIM MIN MAX MIN MAX A B C D D 4 P K M J F G.27 BSC BSC 0.25 (0.00) M T B S A S J K M P R SODERING FOOTPRINT* 4X X X PITC DIMENSIONS: MIIMETERS *For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SODERRM/D. 7
6 PDIP4 CASE ISSUE P B NOTES:. DIMENSIONING AND TOERANCING PER ANSI YM, CONTROING DIMENSION: INC. 3. DIMENSION TO CENTER OF EADS WEN FORMED PARAE. 4. DIMENSION B DOES NOT INCUDE MOD FAS. 5. ROUNDED CORNERS OPTIONA. N T SEATING PANE A INCES MIIMETERS DIM MIN MAX MIN MAX A B F C D C F G 0.00 BSC 2.54 BSC J K K J M 0 0 G D 4 P M N (0.005) M 8
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4FST32 4 Bit Bus Switch The ON Semiconductor 4FST32 is a quad, high performance switch. The device is CMOS TTL compatible when operating between 4 and. Volts. The device exhibits extremely low R ON and
MC74LVX00. Quad 2-Input NAND Gate. With 5 V Tolerant Inputs
M74X00 Quad 2-Input NND Gate With 5 Tolerant Inputs The M74X00 is an advanced high speed MOS 2 input NND gate. The inputs tolerate voltages up to 7.0, allowing the interface of 5.0 systems to systems.
MC74VHC1G00. Single 2-Input NAND Gate
MC74CG00 Single 2-Input NND Gate The MC74CG00 is an advanced high speed CMOS 2 input NND gate fabricated with silicon gate CMOS technology. The internal circuit is composed of multiple stages, including
MM74HC157 Quad 2-Input Multiplexer
Quad 2-Input Multiplexer General Description The MM74HC157 high speed Quad 2-to-1 Line data selector/multiplexers utilizes advanced silicon-gate CMOS technology. It possesses the high noise immunity and
74FST Bit, 4 Port Bus Exchange Switch
4 Bit, 4 Port Bus Exchange Switch The ON Semiconductor 74FST3400 is a 4 bit, 4 port bus exchange switch. The device is CMOS TTL compatible when operating between 4.0 and 5.5 Volts. The device exhibits
MC74AC109, MC74ACT109. Dual JK Positive Edge Triggered Flip Flop
MC9, MC9 Dual JK Positive EdgeTriggered FlipFlop The MC9/9 coists of two highspeed completely independent traition clocked JK flipflops. The clocking operation is independent of rise and fall times of
MC74HCT138A. 1 of 8 Decoder/ Demultiplexer with LSTTL Compatible Inputs. High Performance Silicon Gate CMOS
of 8 Decoder/ Demultiplexer with LSTTL Compatible Inputs High Performance Silicon Gate CMOS The MC74HCT38A is identical in pinout to the LS38. The HCT38A may be used as a level converter for interfacing
MC74LCX74. Low-Voltage CMOS Dual D-Type Flip-Flop. With 5 V Tolerant Inputs
Low-oltage CMOS Dual D-Type Flip-Flop With 5 Tolerant Inputs The MC74LCX74 is a high performance, dual D type flip flop with asynchronous clear and set inputs and complementary (O, O) outputs. It operates
MC74HC244A Octal 3 State Noninverting Buffer/Line Driver/ Line Receiver
Octal 3 State Noninverting Buffer/Line Driver/ Line Receiver High Performance Silicon Gate CMOS The MC74HC244A is identical in pinout to the LS244. The device inputs are compatible with standard CMOS outputs;
74HC244 Octal 3 State Noninverting Buffer/Line Driver/ Line Receiver
Octal 3 State Noninverting Buffer/Line Driver/ Line Receiver High Performance Silicon Gate CMOS The is identical in pinout to the LS244. The device inputs are compatible with standard CMOS outputs; with
MC10EP131, MC100EP V / 5VНECL Quad D Flip Flop with Set, Reset, and Differential Clock
3.3V / 5VНECL Quad D Flip Flop with Set, Reset, and Differential Clock Description The MC10/100EP131 is a Quad Master slaved D flip flop with common set and separate resets. The device is an expansion
MC14584B. Hex Schmitt Trigger
MC4584B Hex Schmitt Trigger The MC4584B Hex Schmitt Trigger is constructed with MOS Pchannel and Nchannel enhancement mode devices in a single monolithic structure. These devices find primary use where
MC74ACT Input Universal Shift/Storage Register with Synchronous Reset and Common I/O Pins
8 Input Universal Shift/Storage Register with Synchronous Reset and Common I/O Pins The MC74ACT323 is an 8-bit universal shift/storage register with3-state outputs. Its function is similar to the MC74ACT299
MM74HC151 8-Channel Digital Multiplexer
8-Channel Digital Multiplexer General Description The MM74HC151 high speed Digital multiplexer utilizes advanced silicon-gate CMOS technology. Along with the high noise immunity and low power dissipation
MC14049B, MC14050B. Hex Buffer
MC404B, MC4050B Hex Buffer The MC404B Hex Inverter/Buffer and MC4050B Noninverting Hex Buffer are constructed with MOS PChannel and NChannel enhancement mode devices in a single monolithic structure. These
MC74LCX157. Low-Voltage CMOS Quad 2-Input Multiplexer. With 5 V Tolerant Inputs (Non Inverting)
MC74C57 ow-voltage CMO Quad 2-Input Multiplexer With 5 V Tolerant Inputs (Non Inverting) The MC74C57 is a high performance, quad 2 input multiplexer operating from a 2.3 to 3.6 V supply. igh impedance
74HC74. Dual D Flip Flop with Set and Reset. High Performance Silicon Gate CMOS
Dual D Flip Flop with Set and Reset High Performance Silicon Gate CMOS The 74HC74 is identical in pinout to the LS74. The device inputs are compatible with standard CMOS outputs; with pullup resistors,