MC14060B. 14 Bit Binary Counter and Oscillator
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1 4Bit Binary Counter and Oscillator The MC4060B is a 4stage binary ripple counter with an onchip oscillator buffer. The oscillator configuration allows design of either RC or crystal oscillator circuits. Also included on the chip is a reset function which places all outputs into the zero state and disables the oscillator. A negative traition on Clock will advance the counter to the next state. Schmitt trigger action on the input line permits very slow input rise and fall times. Applicatio include time delay circuits, counter controls, and frequency dividing circuits. This device contai protection circuitry to guard agait damage due to high static voltages or electric fields. However, precautio must be taken to avoid applicatio of any voltage higher than maximum rated voltages to this highimpedance circuit. For proper operation, in and out should be cotrained to the range SS ( in or out ) DD. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either SS or DD ). Unused outputs must be left open. Fully Static Operation Diode Protection on All Inputs Supply oltage Range = 3.0 to 8 Capable of Driving Two Lowpower TTL Loads or One Lowpower Schottky TTL Load Over the Rated Temperature Range Buffered Outputs Available from Stages 4 Through 0 and 2 Through 4 Common Reset Line PinforPin Replacement for CD4060B PbFree Packages are Available* MAXIMUM RATINGS (oltages Referenced to SS ) Symbol Parameter alue Unit DD DC Supply oltage Range 0.5 to +8.0 in, out I in, I out P D Input or Output oltage Range (DC or Traient) Input or Output Current (DC or Traient) per Pin Power Dissipation, per Package (Note ) 0.5 to DD +0.5 ±0 ma 500 mw T A Ambient Temperature Range 55 to +25 C T stg Storage Temperature Range 65 to +0 C T L Lead Temperature (8 Second Soldering) 260 C Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditio) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected.. Temperature Derating: Plastic P and D/DW Packages: 7.0 mw/ C from 65 C To 25 C. *For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PDIP P SUFFIX CASE 648 SOIC D SUFFIX CASE 75B TSSOP DT SUFFIX CASE 948F SOEIAJ F SUFFIX CASE 966 A = Assembly Location WL, L = Wafer Lot YY, Y = Year WW, W = Work Week MARKING DIAGRAMS MC4060BCP AWLYYWW 4060B AWLYWW 4 060B ALYW MC4060B ALYW ORDERING INFORMATION See detailed ordering and shipping information in the package dimeio section on page 6 of this data sheet. Semiconductor Components Industries, LLC, 2004 Publication Order Number: MC4060B/D
2 Î ELECTRICAL CHARACTERISTICS (oltages Referenced to SS ) Î 55 C 25 C 25 C Î Symbol Characteristic DD Typ dc Min Max Min (Note 2) Max Min Max Unit OL Output oltage 0 Level Î in = DD or OH in = 0 or DD LevelÎ Î IL Input oltage 0 Level ( O = 4.5 or 0.5 ) Î ( O = 9.0 or.0 ) ( O = 3.5 or.5 ) Î IH ( O = 0.5 or 4.5 ) Level ( O =.0 or 9.0 ) Î ( O =.5 or 3.5 ) IL Input oltage 0 Level dc ( Î O = 4.5 dc) (For Input ( O = 9.0 dc) and Output 0) ( Î O = 3.5 dc) IH ( O = 0.5 dc) Level dc ( Î O =.0 dc) ( O =.5 dc) I OH Output Drive Current ma ( Î OH = 2.5 ) (Except Source ( OH Î = 4.6 ) Pi 9 and 0) Î ( OH = 9.5 ) ( Î OH = 3.5 ) Î I OL ( OL = 0.4 ) Sink ma ( OL = 0.5 ) Î ( OL =.5 ) I in Input Current ± 0. ± ± 0. ±.0 A C in Input Capacitance ( in = 0) 7.5 pf I DD Quiescent Current A (Per Package) I T Total Supply Current (Notes 3, 4) I T = (0.25 A/kHz) f + I DD A Î (Dynamic plus Quiescent, 0 I T = (0.54 A/kHz) f + I DD Per Package) I Î ( = 50 pf on all outputs, T = (0.85 A/kHz) f + I DD Î all buffers switching) Î 2. Data labelled Typ is not to be used for design purposes but is intended as an indication of the IC s potential performance. 3. The formulas given are for the typical characteristics only at 25 C. 4. To calculate total supply current at loads other than 50 pf: I T ( ) = I T (50 pf) + ( 50) fk where: I T is in A (per package), in pf, = ( DD SS ) in volts, f in khz is input frequency, and k =
3 Î SWITCHING CHARACTERISTICS ( = 50 pf, T A = 25 C) DD Typ Symbol Characteristic dc Min (Note 5) Max Î Unit t Î TLH Output Rise Time (Counter Outputs) Î Î t THL Output Fall Time (Counter Outputs) Î Î t PLH Î Propagation Delay Time Î t PHL Clock to Q Î Clock to Q s Î t wh Clock Pulse Width Î f Clock Pulse Frequency MHz 7 2 Î t Î TLH Clock Rise and Fall Time t THL 0 No Limit Î t w Reset Pulse Width Î t PHL Î Propagation Delay Time Reset to On Data labelled Typ is not to be used for design purposes but is intended as an indication of the IC s potential performance DD DD PULSE GENERATOR 500 F I D 0.0 F Q4 OUT Q5 OUT2 Qn R SS PULSE GENERATOR 20 Q4 OUT Q5 OUT2 Qn R SS 0% 20 0% DUTY CYCLE DD SS Q t TLH t PLH 0% t WH t THL t PHL Figure. Power Dissipation Test Circuit and Waveform Figure 2. Switching Time Test Circuit and Waveforms 4
4 ORDERING INFORMATION Device Package Shipping MC4060BCP PDIP 500 Units / Rail MC4060BCPG PDIP (PbFree) 500 Units / Rail MC4060BD SOIC 48 Units / Rail MC4060BDR2 SOIC 2500 / Tape & Reel MC4060BDR2G MC4060BFEL SOIC (PbFree) SOEIAJ (PbFree) 2500 / Tape & Reel 2000 / Tape & Reel MC4060BDTR2 TSSOP (PbFree) 2500 / Tape & Reel For information on tape and reel specificatio, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specificatio Brochure, BRD80/D. 6
5 PACKAGE DIMENSIONS PDIP P SUFFIX CASE ISSUE T A 9 8 B NOTES:. DIMENSIONING AND TOLERAING PER ANSI Y4.5M, CONTROLLING DIMENSION: IH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT ILUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. H G F S C K SEATING T PLANE D PL 0.25 (0.00) M T A M J L M IHES MILLIMETERS DIM MIN MAX MIN MAX A B C D F G 0.00 BSC 2.54 BSC H BSC.27 BSC J K L M S T SEATING PLANE 9 8 G A K B D PL 0.25 (0.00) M T B S A S SOIC D SUFFIX PLASTIC SOIC PACKAGE CASE 75B05 ISSUE J P 8 PL 0.25 (0.00) M B S C M R X 45 J F NOTES:. DIMENSIONING AND TOLERAING PER ANSI Y4.5M, CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT ILUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0. (0.006) PER SIDE. 5. DIMENSION D DOES NOT ILUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.27 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. MILLIMETERS IHES DIM MIN MAX MIN MAX A B C D F G.27 BSC BSC J K M P R
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NTE40160B, NTE40161B NTE40162B, NTE40163B Integrated Circuit CMOS, Synchronous Programmable 4Bit Counters Description: The NTE40160B (Decade w/asynchronous Clear), NTE40161B (Binary w/asynchronous Clear),
MM74HC574 3-STATE Octal D-Type Edge-Triggered Flip-Flop
MM74HC574 3-STATE Octal D-Type Edge-Triggered Flip-Flop General Description The MM74HC574 high speed octal D-type flip-flops utilize advanced silicon-gate P-well CMOS technology. They possess the high
CD4028BC BCD-to-Decimal Decoder
CD4028BC BCD-to-Decimal Decoder General Description The CD4028BC is a BCD-to-decimal or binary-to-octal decoder consisting of 4 inputs, decoding logic gates, and 10 output buffers. A BCD code applied to
Quad 2-Input NAND Gate with Open-Drain Outputs High-Performance Silicon-Gate CMOS
IN74C3A Quad 2-Input NAND ate with Open-Drain Outputs igh-performance Silicon-ate CMOS The IN74C3A is identical in pinout to the LS/ALS3. The device inputs are compatible with standard CMOS outputs; with
MC74LCX74. Low-Voltage CMOS Dual D-Type Flip-Flop. With 5 V Tolerant Inputs
Low-oltage CMOS Dual D-Type Flip-Flop With 5 Tolerant Inputs The MC74LCX74 is a high performance, dual D type flip flop with asynchronous clear and set inputs and complementary (O, O) outputs. It operates
Excellent Integrated System Limited
Excellent Integrated System Limited Stocking Distributor Click to view price, real time Inventory, Delivery & Lifecycle Information: Fairchild Semiconductor CD4050BCN For any questio, you can email us
Dual D Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS
TECHNICAL DATA IN74ACT74 Dual D Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS The IN74ACT74 is identical in pinout to the LS/ALS74, HC/HCT74. The IN74ACT74 may be used as a level converter
74FST Bit, 4 Port Bus Exchange Switch
4 Bit, 4 Port Bus Exchange Switch The ON Semiconductor 74FST3400 is a 4 bit, 4 port bus exchange switch. The device is CMOS TTL compatible when operating between 4.0 and 5.5 Volts. The device exhibits
MM74HC164 8-Bit Serial-in/Parallel-out Shift Register
8-Bit Serial-in/Parallel-out Shift Register General Description Ordering Code: September 1983 Revised February 1999 The MM74HC164 utilizes advanced silicon-gate CMOS technology. It has the high noise immunity
MM74HC175 Quad D-Type Flip-Flop With Clear
Quad D-Type Flip-Flop With Clear General Description The MM74HC175 high speed D-type flip-flop with complementary outputs utilizes advanced silicon-gate CMOS technology to achieve the high noise immunity
MM74HC154 4-to-16 Line Decoder
4-to-16 Line Decoder General Description The MM74HC154 decoder utilizes advanced silicon-gate CMOS technology, and is well suited to memory address decoding or data routing applications. It possesses high
CD4013BC Dual D-Type Flip-Flop
Dual D-Type Flip-Flop General Description The CD4013B dual D-type flip-flop is a monolithic complementary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement mode transistors. Each
CD40106BC Hex Schmitt Trigger
CD40106BC Hex Schmitt Trigger General Description The CD40106BC Hex Schmitt Trigger is a monolithic complementary MOS (CMOS) integrated circuit constructed with N and P-channel enhancement transistors.
CD4528BC Dual Monostable Multivibrator
Dual Monostable Multivibrator General Description The CD4528BC is a dual monostable multivibrator. Each device is retriggerable and resettable. Triggering can occur from either the rising or falling edge
MM74HC244 Octal 3-STATE Buffer
MM74HC244 Octal 3-STATE Buffer General Description The MM74HC244 is a non-inverting buffer and has two active low enables (1G and 2G); each enable independently controls 4 buffers. This device does not
CD4021BC 8-Stage Static Shift Register
8-Stage Static Shift Register General Description The CD4021BC is an 8-stage parallel input/serial output shift register. A parallel/serial control input enables individual JAM inputs to each of 8 stages.
SN74LS151MEL. 8 Input Multiplexer LOW POWER SCHOTTKY
8 Input Multiplexer The TTL/MSI SN74LS5 is a high speed 8-input Digital Multiplexer. It provides, in one package, the ability to select one bit of data from up to eight sources. The LS5 can be used as
MM74HC175 Quad D-Type Flip-Flop With Clear
Quad D-Type Flip-Flop With Clear General Description The MM74HC175 high speed D-type flip-flop with complementary outputs utilizes advanced silicon-gate CMOS technology to achieve the high noise immunity
MM74HC161 MM74HC163 Synchronous Binary Counter with Asynchronous Clear Synchronous Binary Counter with Synchronous Clear
September 1983 Revised February 1999 MM74HC161 MM74HC163 Synchronous Binary Counter with Asynchronous Clear Synchronous Binary Counter with Synchronous Clear General Description The MM74HC161 and MM74HC163
MM74HC151 8-Channel Digital Multiplexer
8-Channel Digital Multiplexer General Description The MM74HC151 high speed Digital multiplexer utilizes advanced silicon-gate CMOS technology. Along with the high noise immunity and low power dissipation