Dual JK Flip-Flop IW4027B TECHNICAL DATA PIN ASSIGNMENT LOGIC DIAGRAM FUNCTION TABLE. Rev. 00
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1 TECHNICAL DATA IW027B Dual JK Flip-Flop The IW027B is a Dual JK Flip-Flop which is edge-triggered and features independent Set, Reset, and Clock inputs. Data is accepted when the Clock is LOW and traferred to the output on the positive-going edge of the Clock. The active HIGH asynchronous Reset and Set are independent and override the J, K, or Clock inputs. The outputs are buffered for best system performance. Operating oltage Range: 3.0 to 1 Maximum input current of 1 μa at 1 over full package-temperature range; 0 na at 1 and 25 C Noise margin (over full package temperature range): 1. supply 2. supply 2.5 supply ORDERING INFORMATION IW027BN Plastic IW027BD SOIC T A = -55 to 125 C for all packages LOGIC DIAGRAM PIN ASSIGNMENT FUNCTION TABLE Inputs Outputs PIN 16 = PIN = GND Set Reset Clock J K Q n+1 Q n+1 L H X X X L H H L X X X H L H H X X X H H L L L L No change L L H L H L L L L H L H L L H H Qn Qn X = don t care Qn+1 = State After Clock Positive Traition
2 IW027B MAXIMUM RATINGS * Symbol Parameter alue Unit DC Supply oltage (Referenced to GND) - to +2 IN DC Input oltage (Referenced to GND) - to + I IN DC Input Current, per Pin ± ma P D Power Dissipation in Still Air, Plastic DIP, SOIC 0** mw Package P tot Power Dissipation per Output Traistor 0 mw Tstg Storage Temperature -65 to +0 C T L Lead Temperature, 1 mm from Case for Seconds (Plastic DIP or SOIC Package) 260 C * Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditio. **Derating: - Plastic DIP from -55 to +0 C - SOIC Package from -55 to +65 C - Plastic DIP: - mw/ C from +0 to +125 C - SOIC Package: : - 7 mw/ C from +65 to +125 C RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min Max Unit DC Supply oltage (Referenced to GND) IN DC Input oltage (Referenced to GND) 0 T A Operating Temperature, All Package Types C This device contai protection circuitry to guard agait damage due to high static voltages or electric fields. However, precautio must be taken to avoid applicatio of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation IN should be cotrained to the range GND IN. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or ). Unused outputs must be left open.
3 IW027B DC ELECTRICAL CHARACTERISTICS (oltages Referenced to GND) Guaranteed Limit Symbol Parameter Test Conditio -55 C 25 C 125 C IH Minimum High-Level Input oltage IL Maximum Low - Level Input oltage OH OL I IN I CC I OL I OH Minimum High-Level Output oltage Maximum Low-Level Output oltage Maximum Input Leakage Current Maximum Quiescent Supply Current (per Package) Minimum Output Low (Sink) Current Minimum Output High (Source) Current OUT = or - OUT =1. or - 1. OUT = or - OUT = or - OUT =1. or - 1. OUT = or - IN =GND or IL =, IH =, I O =-1µA IL =3.0, IH =7.0, I O =-1µA IL =.0, IH =11, I O =-1µA IN =GND or IL =, IH =, I O =1µA IL =3.0, IH =7.0, I O =1µA IL =.0, IH =11, I O =1µA Unit IN = GND or 1 ±0.1 ±0.1 ± μa IN = GND or 20 IN = GND or OL =0. OL = OL = IN = GND or OH =.6 OH =2.5 OH =9.5 OH = μa ma ma
4 IW027B AC ELECTRICAL CHARACTERISTICS (C L =pf, R L = kω, Input t r =t f =20 ) Guaranteed Limit Symbol Parameter -55 C 25 C 125 C Unit f max Maximum Clock Frequency t PLH, t PHL Maximum Propagation Delay, Clock to Q or Q t PLH t PHL Maximum Propagation Delay, Set to Q or Reset to Q Maximum Propagation Delay, Set to Q or Reset to Q t TLH, t THL Maximum Output Traition Time, Any Output C IN Maximum Input Capacitance pf MHz TIMING REQUIREMENTS (C L =pf, R L = kω, Input t r =t f =20 ) Guaranteed Limit Symbol Parameter -55 C 25 C 125 C Unit t w Minimum Pulse Width, Clock t w Minimum Pulse Width, Set or Reset t su Minimum Data Setup Time t r, t f Maximum Input Rise or Fall Time, Clock μs
5 IW027B K(J) t SU CLOCK 0.1 t LH t HL 0.1 t W Q(Q) OHCC OL t REM t PHL (t PLH ) SET (RESET) Âûõîä nq(nq) SET (RESET) RESET (SET) t W2 Q(Q) 0.1 t THL (t TLH ) U OL DD OHCC t PHL (t PLH ) Figure 1. Switching Waveforms
6 IW027B N SUFFIX PLASTIC (MS - 001BB) A 16 1 NOTES: G F 0.25 (0.0) M T 9 D N B C -T- K SEATING PLANE M L H J Dimeio, mm Symbol MIN MAX A B C 5.33 D F G 2.5 H 7.62 J 0 K L M imeio A, B do not include mold flash or protrusio. Maximum mold flash or protrusio 0.25 mm (0.0) per side. N 0.3 D SUFFIX SOIC (MS - 012AC) 16 A 9 Dimeio, mm Symbol. MIN MAX H B P A 9..0 B C G D C R x 5 F T- SEATING G 1.27 D PLANE K J F M H (0.0) M T C M J 0 K NOTES: M Dimeio A and B do not include mold flash or protrusion. 2.Maximum mold flash or protrusion 0. mm (0.006) per side for A, for P B mm (0.0) per side. R
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