NTF6P02T3. Power MOSFET -6.0 Amps, -20 Volts. P-Channel SOT AMPERES -20 VOLTS R DS(on) = 44 m (Typ.)

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1 NTFPT Power MOSFET. Amps, Volts PChannel SOT Features Low R DS(on) Logic Level Gate Drive Diode Exhibits High Speed, Soft Recovery Avalanche Energy Specified PbFree Package is Available Typical Applications Power Management in Portables and BatteryPowered Products, i.e.: Cellular and Cordless Telephones and PCMCIA Cards. AMPERES VOLTS R DS(on) = m (Typ.) G S MAXIMUM RATINGS ( unless otherwise noted) Rating Symbol Value Unit DraintoSource Voltage V DSS Vdc GatetoSource Voltage V GS ±8. Vdc Drain Current (Note ) T A = 5 C T A = 7 C Single Pulse (t p = s) I D I D I DM 8. 5 Adc Apk Total Power T A = 5 C P D 8. W Operating and Storage Temperature Range T J, T stg 55 to +5 Single Pulse DraintoSource Avalanche Energy Starting (V DD = Vdc, V GS = 5. Vdc, I L(pk) = A, L =. mh, R G = 5 ) Thermal Resistance Junction to Lead (Note ) Junction to Ambient (Note ) Junction to Ambient (Note ) Maximum Lead Temperature for Soldering Purposes, /8 from case for seconds C E AS 5 mj R JL R JA R JA 5 7. C/W T L C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.. Steady State.. When surface mounted to an FR board using pad size, (Cu. Area.7 sq in), Steady State.. When surface mounted to an FR board using minimum recommended pad size, (Cu. Area. sq in), Steady State. SOT CASE 8E STYLE MARKING DIAGRAM & PIN ASSIGNMENT Gate Drain AWW P Drain A = Assembly Location WW = Work Week P = Specific Device Code = PbFree Package (Note: Microdot may be in either location) ORDERING INFORMATION Source Device Package Shipping NTFPT SOT /Tape & Reel NTFPTG SOT (PbFree) /Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8/D. D PChannel MOSFET Semiconductor Components Industries, LLC, 7 July, 7 Rev. Publication Order Number: NTFPT/D

2 NTFPT ELECTRICAL CHARACTERISTICS ( unless otherwise noted) Characteristic Symbol Min Typ Max Unit OFF CHARACTERISTICS DraintoSource Breakdown Voltage (Note ) (V GS = Vdc, I D = 5 Adc) Temperature Coefficient (Positive) Zero Gate Voltage Drain Current (V DS = Vdc, V GS = Vdc) (V DS = Vdc, V GS = Vdc, ) V (BR)DSS I DSS 5. Vdc mv/ C Adc GateBody Leakage Current (V GS = ± 8. Vdc, V DS = Vdc) I GSS ± nadc ON CHARACTERISTICS (Note ) Gate Threshold Voltage (Note ) (V DS = V GS, I D = 5 Adc) Threshold Temperature Coefficient (Negative) V GS(th)..7.. Vdc mv/ C Static DraintoSource OnResistance (Note ) (V GS =.5 Vdc, I D =. Adc) (V GS =.5 Vdc, I D =. Adc) (V GS =.5 Vdc, I D =. Adc) Forward Transconductance (Note ) (V DS = Vdc, I D =. Adc) R DS(on) m g fs Mhos DYNAMIC CHARACTERISTICS Input Capacitance (V DS = Vdc, V GS = V, C iss 9 pf Output Capacitance f =. MHz) C oss 5 5 Transfer Capacitance C rss 9 5 Input Capacitance (V DS = Vdc, V GS = V, C iss 9 pf Output Capacitance f =. MHz) C oss Transfer Capacitance C rss SWITCHING CHARACTERISTICS (Note 5) TurnOn Delay Time (V DD = 5. Vdc, I D =. Adc, t d(on) 7. ns Rise Time V GS =.5 Vdc, R G =. ) t r 5 5 TurnOff Delay Time t d(off) 75 5 Fall Time t f 5 85 TurnOn Delay Time (V DD = Vdc, I D =. Adc, t d(on) 8. ns Rise Time V GS =.5 Vdc, R G =.5 ) t r TurnOff Delay Time t d(off) Fall Time t f Gate Charge SOURCEDRAIN DIODE CHARACTERISTICS (V DS = Vdc, I D =. Adc, V GS =.5 Vdc) (Note ) Forward OnVoltage (I S =. Adc, V GS = Vdc) (Note ) (I S =. Adc, V GS = Vdc) (I S =. Adc, V GS = Vdc, ) Reverse Recovery Time (I S =. Adc, V GS = Vdc, di S /dt = A/ s) (Note ) Q T 5 nc Q gs.7 Q gd. V SD Vdc t rr ns t a 7 t b 5 Reverse Recovery Stored Charge Q RR. C. Pulse Test: Pulse Width s, Duty Cycle.%. 5. Switching characteristics are independent of operating junction temperatures.

3 NTFPT TYPICAL ELECTRICAL CHARACTERISTICS I D, DRAIN CURRENT (AMPS) V 7. V 5. V 9. V. V. V. V. V.8 V. V. V V GS =. V I D, DRAIN CURRENT (AMPS) 8 V DS V T J = 55 C T J = C V DS, DRAINTOSOURCE VOLTAGE (VOLTS) V GS, GATETOSOURCE VOLTAGE (VOLTS) Figure. OnRegion Characteristics Figure. Transfer Characteristics R DS(on), DRAINTOSOURCE RESISTANCE ( ) V GS, GATETOSOURCE VOLTAGE (VOLTS) Figure. OnResistance versus GatetoSource Voltage I D =. A R DS(on), DRAINTOSOURCE RESISTANCE ( ) V GS =.5 V V GS =.5 V 8 I D, DRAIN CURRENT (AMPS) Figure. OnResistance versus Drain Current and Gate Voltage R DS(on), DRAINTOSOURCE RESISTANCE (NORMALIZED) I D =. A V GS =.5 V T J, JUNCTION TEMPERATURE ( C) Figure 5. OnResistance Variation with Temperature 5, I DSS, LEAKAGE (na) V GS = V T J = 5 C T J = C 8 8 V DS, DRAINTOSOURCE VOLTAGE (VOLTS) Figure. DraintoSource Leakage Current versus Voltage

4 NTFPT TYPICAL ELECTRICAL CHARACTERISTICS C, CAPACITANCE (pf) 8 C iss C rss V DS = V V GS = V C iss C oss C rss 5 V GS V DS 5 5 GATETOSOURCE OR DRAINTOSOURCE VOLTAGE (VOLTS) Figure 7. Capacitance Variation V GS, GATETOSOURCE VOLTAGE (V) 5 V DS Q gs Q gd Q T I D =. A 8 Q g, TOTAL GATE CHARGE (nc) V GS Figure 8. GatetoSource and DraintoSource Voltage versus Total Charge 8 V DS, DRAINTOSOURCE VOLTAGE (V) t, TIME (ns) V DD = V I D =. A V GS =.5 V t d(off)...9. R G, GATE RESISTANCE ( ) V SD, SOURCETODRAIN VOLTAGE (VOLTS) Figure 9. Resistive Switching Time Variation versus Gate Resistance t f t r t d(on) I S, SOURCE CURRENT (AMPS) 7 5 V GS = V Figure. Diode Forward Voltage versus Current

5 NTFPT TYPICAL ELECTRICAL CHARACTERISTICS R THJA(t), EFFECTIVE TRANSIENT THERMAL RESPONSE. D = CHIP JUNCTION SINGLE PULSE..E.E.E.E+.E+ t, TIME (s) NORMALIZED TO R JA AT STEADY STATE ( PAD).75.5 F.7.85 F.7.7 F F.E F AMBIENT.E+ Figure. FET Thermal Response 5

6 NTFPT PACKAGE DIMENSIONS SOT (TO) CASE 8E ISSUE L D b NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y.5M, 98.. CONTROLLING DIMENSION: INCH..8 () H E e A e b E A L C MILLIMETERS INCHES DIM MIN NOM MAX MIN NOM MAX A A b b c D E e e L H E STYLE : PIN. GATE. DRAIN. SOURCE. DRAIN SOLDERING FOOTPRINT* SCALE : mm inches *For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5, Denver, Colorado 87 USA Phone: 7575 or 88 Toll Free USA/Canada Fax: 757 or 887 Toll Free USA/Canada orderlit@onsemi.com N. American Technical Support: Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 79 9 Japan Customer Focus Center Phone: ON Semiconductor Website: Order Literature: For additional information, please contact your local Sales Representative NTFPT/D

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