MC14543B. BCD-to-Seven Segment Latch/Decoder/Driver for Liquid Crystals

Transcription

1 M4543B BD-to-Seven Segment Latch/Decoder/Driver for Liquid rystals The M4543B BDtoseven segment latch/decoder/driver is designed for use with liquid crystal readouts, and is cotructed with complementary MOS (MOS) enhancement mode devices. The circuit provides the functio of a 4bit storage latch and an 842 BDtoseven segment decoder and driver. The device has the capability to invert the logic levels of the output combination. The phase (), blanking (BI), and latch disable (LD) inputs are used to reverse the truth table phase, blank the display, and store a BD code, respectively. For liquid crystal (L) readouts, a square wave is applied to the input of the circuit and the electrically common backplane of the display. The outputs of the circuit are connected directly to the segments of the L readout. For other types of readouts, such as lightemitting diode (LED), incandescent, gas discharge, and fluorescent readouts, connection diagrams are given on this data sheet. Applicatio include itrument (e.g., counter, DVM etc.) display driver, computer/calculator display driver, cockpit display driver, and various clock, watch, and timer uses. Features Latch Storage of ode Blanking Input Readout Blanking on All Illegal Input ombinatio Direct LED (ommon Anode or athode) Driving apability Supply Voltage Range = 3. V to 8 V apable of Driving 2 Lowpower TTL Loads, Lowpower Schottky TTL Load or 2 HTL Loads Over the Rated Temperature Range PinforPin Replacement for D456A (with Pin 7 Tied to ). hip omplexity: 27 FETs or 52 Equivalent Gates These Devices are PbFree and are RoHS ompliant MAXIMUM RATINGS (Voltages Referenced to ) Parameter Symbol Value Unit D Supply Voltage Range.5 to +8. V Input Voltage Range, All Inputs V in.5 to +.5 V D Input urrent per Pin I in ± ma Power Dissipation per Package (Note ) P D 5 mw Operating Temperature Range T A 55 to +25 Storage Temperature Range T stg 65 to + Maximum ontinuous Output Drive urrent (Source or Sink) Maximum ontinuous Output Power (Source or Sink) (Note 2) I OHmax I OLmax (per Output) P OHmax 7 P OLmax (per Output) ma mw Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating onditio is not implied. Extended exposure to stresses above the Recommended Operating onditio may affect device reliability.. Temperature Derating: Plastic P and D/DW Packages: 7. mw/ From 65 To P OHmax = I OH (V OH ) and P OLmax = I OL (V OL ) PDIP6 P SUFFIX ASE SOI6 D SUFFIX ASE 75B SOEIAJ6 F SUFFIX ASE 966 A = Assembly Location WL, L = Wafer Lot YY, Y = Year WW, W = Work Week G = PbFree Package MARKING DIAGRAMS 4543BG AWLYWW ORDERING INFORMATION See detailed ordering and shipping information in the package dimeio section on page 2 of this data sheet. This device contai protection circuitry to guard agait damage due to high static voltages or electric fields. However, precautio must be taken to avoid applicatio of any voltage higher than maximum rated voltages to this highimpedance circuit. For proper operation, V in and V out should be cotrained to the range (V in or V out ). Unused inputs must always be tied to an appropriate logic voltage level (e.g., either or ). Unused outputs must be left open. 6 6 M4543BP AWLYYWWG M4543B ALYWG Semiconductor omponents Industries, LL, 2 June, 2 Rev. 7 Publication Order Number: M4543B/D

2 M4543B PIN ASSIGNMENT LD 2 6 f B 3 4 g D 4 3 e A 5 2 d PH 6 c BI 7 b 8 9 a TRUTH TABLE Inputs Outputs LD BI * D B A a b c d e f g Display X X X X X Blank Blank Blank Blank Blank Blank Blank X X X X ** ** Inverse of Output Display ombinatio as above Above X = Don t care = Above ombinatio * = For liquid crystal readouts, apply a square wave to For common cathode LED readouts, select = For common anode LED readouts, select = ** = Depends upon the BD code previously applied when LD = ORDERING INFORMATION M4543BPG Device Package Shipping PDIP6 (PbFree) 5 Units / Rail M4543BDG M4543BDR2G SOI6 (PbFree) SOI6 (PbFree) 48 Units / Rail 25 / Tape & Reel M4543BFG SOEIAJ6 (PbFree) 5 Units / Rail For information on tape and reel specificatio, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specificatio Brochure, BRD8/D. 2

3 M4543B ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ELETRIAL HARATERISTIS (Voltages Referenced to ) haracteristic Output Voltage Level V in = or Symbol Vdc V OL Min Max Min Typ (Note 3) Max Min Max Unit Vdc V Level V in = or OH Vdc Input Voltage Level (V O = 4.5 or.5 Vdc) (V O = 9. or. Vdc) (V O = 3.5 or.5 Vdc) V IL Vdc Level (V O =.5 or 4.5 Vdc) (V O =. or 9. Vdc) (V O =.5 or 3.5 Vdc) V IH Vdc Output Drive urrent (V OH = 2.5 Vdc) Source (V OH = 4.6 Vdc) (V OH =.5 Vdc) (V OH = 9.5 Vdc) (V OH = 3.5 Vdc) I OH madc (V OL =.4 Vdc) Sink (V OL =.5 Vdc) (V OL = 9.5 Vdc) (V OL =.5 Vdc) I OL Input urrent I in ±. ±. ±. ±. Adc Input apacitance in 7.5 pf Quiescent urrent (Per Package) V in = or, I out = A Total Supply urrent (Note 4, 5) (Dynamic plus Quiescent, Per Package) ( L = 5 pf on all outputs, all buffers switching) I DD I T I T = (.6 A/kHz) f + I DD I T = (3. A/kHz) f + I DD I T = (4.7 A/kHz) f + I DD 3. Noise immunity specified for worstcase input combination. Noise Margin for both and level =. V = V = 2. V = V = 2.5 V = V 4. To calculate total supply current at loads other than 5 pf: I T ( L ) = I T (5 pf) x 3 ( L 5) f where: I T is in A (per package), L in pf, in V, and f in khz is input frequency. 5. The formulas given are for the typical characteristics only at madc Adc Adc 3

4 M4543B ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ SWITHING HARATERISTIS (Note 6) ( L = 5 pf, T A = 25 ) Output Rise Time t TLH = (3. /pf) L + 3 t TLH = (.5 /pf) L + t TLH = (. /pf) L + Output Fall Time t THL = (.5 /pf) L + 25 t THL = (.75 /pf) L t THL = (.55 /pf) L TurnOff Delay Time t PLH = (.7 /pf) L + 52 t PLH = (.66 /pf) L + 27 t PLH = (.5 /pf) L + 6 TurnOn Delay Time t PHL = (.7 /pf) L + 42 t PHL = (.66 /pf) L + 72 t PHL = (.5 /pf) L + 3 haracteristic Symbol Min Typ Max Unit t TLH t THL t PLH t PHL Setup Time t su Hold Time t h Latch Disable Pulse Width (Strobing Data) t WH The formulas given are for the typical characteristics only. LOGI DIAGRAM = PIN 6 = PIN 8 BI 7 A 5 9 a b B 3 c 2 d 2 3 e f D 4 4 g LD PHASE 6 4

5 M4543B IOH, SOURE URRENT (madc) = Vdc P OHmax = 7 mwdc = Vdc - 8 = Vdc = Vdc (V OH - ), SOURE DEVIE VOLTAGE (Vdc) Figure. Typical Output Source haracteristics I OL, SINK URRENT (madc) 24 = Vdc 8 2 = Vdc 6. = Vdc P OLmax = 7 mwdc = Vdc (V OL - ), SINK DEVIE VOLTAGE (Vdc) Figure 2. Typical Output Sink haracteristics (a) Inputs D,, and BI low, and Inputs A, B, and LD high. g 2 2 9% 5% % t PHL t PLH 9% 5% % t THL t TLH V OH V OL Inputs BI and low, and Inputs D and LD high. f in respect to a system clock. All outputs connected to respective L loads. 2 2 A, B, AND 9% % 5% 2f 5% DUTY YLE ANY Figure 3. Dynamic Power Dissipation Signal Waveforms V OH V OL (b) Inputs D,, and BI low, and Inputs A and B high. 2 LD 9% 5% % t su t h 5% 5% V OH g V OL (c) Data DBA strobed into latches LD 5% t WH Figure 4. Dynamic Signal Waveforms 5

6 M4543B ONNETIONS TO VARIOUS DISPLAY READOUTS LIQUID RYSTAL (L) READOUT INANDESENT READOUT M4543B ONE OF SEVEN SEGMENTS OMMON BAKPLANE APPROPRIATE VOLTAGE SQUARE WAVE ( TO ) M4543B M4543B LIGHT EMITTING DIODE (LED) READOUT OMMON ATHODE LED OMMON ANODE LED M4543B NOTE: Bipolar traistors may be added for gain (for V or I out ma). GAS DISHARGE READOUT M4543B APPROPRIATE VOLTAGE ONNETIONS TO SEGMENTS e f d a g b c = PIN 6 = PIN 8 DISPLAY

7 M4543B PAKAGE DIMENSIONS PDIP6 ASE 6488 ISSUE T A B NOTES:. DIMENSIONING AND TOLERANING PER ANSI Y4.5M, ONTROLLING DIMENSION: INH. 3. DIMENSION L TO ENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INLUDE MOLD FLASH. 5. ROUNDED ORNERS OPTIONAL. H G F D 6 PL S K.25 (.) M T SEATING T PLANE A M J L M INHES MILLIMETERS DIM MIN MAX MIN MAX A B D F G. BS 2.54 BS H BS.27 BS J K L M S SOEIAJ6 ASE 966 ISSUE A e 6 9 Z b D A H E A.3 (.5) M. (.4) 8 E VIEW P M L E Q L DETAIL P c NOTES:. DIMENSIONING AND TOLERANING PER ANSI Y4.5M, ONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS D AND E DO NOT INLUDE MOLD FLASH OR PROTRUSIONS AND ARE MEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXEED. (.6) PER SIDE. 4. TERMINAL NUMBERS ARE SHOWN FOR REFERENE ONLY. 5. THE LEAD WIDTH DIMENSION (b) DOES NOT INLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE.8 (.3) TOTAL IN EXESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL ONDITION. DAMBAR ANNOT BE LOATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPAE BETWEEN PROTRUSIONS AND ADJAENT LEAD TO BE.46 (.8). MILLIMETERS INHES DIM MIN MAX MIN MAX A A b c D E e.27 BS BS H E L L E M Q Z

8 M4543B PAKAGE DIMENSIONS SOI6 ASE 75B5 ISSUE K A B P 8 PL.25 (.) M B S NOTES:. DIMENSIONING AND TOLERANING PER ANSI Y4.5M, ONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION. (.6) PER SIDE. 5. DIMENSION D DOES NOT INLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE.27 (.5) TOTAL IN EXESS OF THE D DIMENSION AT MAXIMUM MATERIAL ONDITION. MILLIMETERS INHES DIM MIN MAX MIN MAX A B D F G.27 BS BS J K M 7 7 P R T SEATING PLANE G D 6 PL.25 (.) M T B S A S K M R X 45 J F SOLDERING FOOTPRINT 8X 6.4 6X.2 6 6X PITH 8 9 DIMENSIONS: MILLIMETERS ON Semiconductor and are registered trademarks of Semiconductor omponents Industries, LL (SILL). SILL reserves the right to make changes without further notice to any products herein. SILL makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SILL assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, coequential or incidental damages. Typical parameters which may be provided in SILL data sheets and/or specificatio can and do vary in different applicatio and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SILL does not convey any licee under its patent rights nor the rights of others. SILL products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applicatio intended to support or sustain life, or for any other application in which the failure of the SILL product could create a situation where personal injury or death may occur. Should Buyer purchase or use SILL products for any such unintended or unauthorized application, Buyer shall indemnify and hold SILL and its officers, employees, subsidiaries, affiliates, and distributors harmless agait all claims, costs, damages, and expees, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SILL was negligent regarding the design or manufacture of the part. SILL is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLIATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution enter for ON Semiconductor P.O. Box 563, Denver, olorado 827 USA one: or Toll Free USA/anada Fax: or Toll Free USA/anada orderlit@oemi.com N. American Technical Support: Toll Free USA/anada Europe, Middle East and Africa Technical Support: one: Japan ustomer Focus enter one: ON Semiconductor Website: Order Literature: For additional information, please contact your local Sales Representative M4543B/D