SEMICONDUCTOR TECHNICAL DATA

Transcription

1 SEMIONDUTOR TEHNIAL DATA The M4532B is cotructed with complementary MOS (MOS) enhancement mode devices. The primary function of a priority encoder is to provide a binary address for the active input with the highest priority. Eight data inputs (D thru ) and an enable input () are provided. Five outputs are available, three are address outputs (Q thru ), one group select () and one enable output (). Diode Protection on All Inputs Supply Voltage Range = 3. Vdc to 8 Vdc apable of Driving Two Low power TTL Loads or One Low Power Schottky TTL Load over the Rated Temperature Range ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ MAXIMUM RATIN* (Voltages Referenced to VSS) Symbol Parameter Value Unit D Supply Voltage.5 to + 8. V Vin, Vout Input or Output Voltage (D or Traient).5 to +.5 V Iin, Iout Input or Output urrent (D or Traient), per Pin ± ma PD Power Dissipation, per Package 5 mw Tstg Storage Temperature 65 to + TL Lead Temperature (8 Second Soldering) 26 * Maximum Ratings are those values beyond which damage to the device may occur. Temperature Derating: Plastic P and D/DW Packages: 7. mw/ From 65 To 25 eramic L Packages: 2 mw/ From To 25 Input TRUTH TABLE Output D D Q Q X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X = Don t are L SUFFIX ERAMI ASE 62 ORDERING INFORMATION M4XXXBP M4XXXB M4XXXBD Plastic eramic SOI TA = 55 to 25 for all packages. PIN ASSIGNMENT Q VSS P SUFFIX PLASTI ASE 648 D SUFFIX SOI ASE 75B D D Q This device contai protection circuitry to guard agait damage due to high static voltages or electric fields. However, precautio must be taken to avoid applicatio of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, Vin and Vout should be cotrained to the range VSS (Vin or Vout). Unused inputs must always be tied to an appropriate logic voltage level (e.g., either VSS or ). Unused outputs must be left open. REV 3 /94 Motorola, Inc. 995 M4532B

2 ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ELETRIAL HARATERISTIS (Voltages Referenced to VSS) haracteristic Output Voltage Vin = or Vin = or Level Level Input Voltage Level (VO = 4.5 or.5 Vdc) (VO = 9. or. Vdc) (VO = 3.5 or.5 Vdc) Symbol VOL 5. VOH 5. VIL Vdc Min Max Min Typ # Max Min Max Unit Vdc Vdc Vdc (VO =.5 or 4.5 Vdc) (VO =. or 9. Vdc) (VO =.5 or 3.5 Vdc) Level VIH Vdc Output Drive urrent (VOH = 2.5 Vdc) (VOH = 4.6 Vdc) (VOH = 9.5 Vdc) (VOH = 3.5 Vdc) (VOL =.4 Vdc) (VOL =.5 Vdc) (VOL =.5 Vdc) Source Sink IOH IOL Input urrent Iin ±. ±. ±. ±. µadc Input apacitance (Vin = ) Quiescent urrent (Per Package) Total Supply urrent** (Dynamic plus Quiescent, Per Package) ( = 5 pf on all outputs, all buffers switching) in pf IDD 5. IT IT = (.74 µa/khz) f + IDD IT = (3.65 µa/khz) f + IDD IT = (5.73 µa/khz) f + IDD #Data labelled Typ is not to be used for design purposes but is intended as an indication of the I s potential performance. **The formulas given are for the typical characteristics only at 25. To calculate total supply current at loads other than 5 pf: IT() = IT(5 pf) + ( 5) Vfk where: IT is in µa (per package), in pf, V = ( VSS) in volts, f in khz is input frequency, and k = madc madc µadc µadc M4532B 2

3 ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ SWITHING HARATERISTIS* ( = 5 pf, TA = 25 ) Output Rise and Fall Time ttlh, = (.5 /pf) + 25 ttlh, = (.75 /pf) ttlh, = (.55 /pf) Propagation Delay Time to, = (.7 /pf) + 2, = (.66 /pf) + 77, = (.5 /pf) + 55 Propagation Delay Time to, = (.7 /pf) + 9, = (.66 /pf) 57, = (.5 /pf) + 4 Propagation Delay Time to Qn, = (.7 /pf) + 95, = (.66 /pf) + 7, = (.5 /pf) + 75 Propagation Delay Time Dn to Qn, = (.7 /pf) + 265, = (.66 /pf) + 37, = (.5 /pf) + 85 Propagation Delay Time Dn to, = (.7 /pf) + 95, = (.66 /pf) + 7, = (.5 /pf) + 75 haracteristic Symbol Min Typ # Max Unit ttlh, 5., 5., 5., 5., 5., 5. * The formulas given are for the typical characteristics only at 25. #Data labelled Typ is not to be used for design purposes but is intended as an indication of the I s potential performance Vout SWITH MATRIX D D Q Q V = V = Output VDS = Vout VDS = Vout Sink urrent Source urrent Under Test D thru D thru X Q X Q X X X ID EXTERNAL POWER SUPPLY 5 µf PULSE GENERATOR (fo) D D ID Q Q VSS. µf Figure. Typical Sink and Source urrent haracteristics Figure 2. Typical Power Dissipation Test ircuit M4532B 3

4 PROGRAMMABLE PULSE GENERATOR D D Q Q VSS NOTE: Input rise and fall times are 2 D PIN NO. D Q Q ttlh 9% % ttlh ttlh ttlh ttlh 9% % 9% % 9% % 9% % Figure 3. A Test ircuit and Waveforms M4532B 4

5 LOGI DIAGRAM (Positive Logic) LOGI EQUATIONS D = D D Q = (D ) Q = ( ) = ( ) = (D + D ) D 9 Q Q M4532B 5

6 D D D D9 D8 D D D D D D Q Q Q Q = WITH Din = 3/4 M47B Q3 Q Q Figure 4. Two M4532B s ascaded for 4 Bit Output VSS DIGITAL TO ANALOG ONVERSION The digital eight bit word to be converted is applied to the inputs of the M452 with the most significant bit at X7 and the least significant bit at X. A clock input of up to 2.5 MHz (at = V) is applied to the M452B. A compromise between Ibias for the M7 and R between N and P channel outputs gives a value of R of 33 k ohms. In order to filter out the switching frequencies, R should be about. ms ( if R = 33 k ohms,.3 µf). The analog 3. db bandwidth would then be dc to. khz. ANALOG TO DIGITAL ONVERSION An analog signal is applied to the analog input of the M7. A digital eight bit word known to represent a digitized level less than the analog input is applied to the M452 as in the D to A conversion. The word is incremented at rates sufficient to allow steady state to be reached between incrementatio (i.e. 3. ms). The output of the M7 will change when the digital input represents the first digitized level above the analog input. This word is the digital representation of the analog word. OK INPUT E R E R /2 M452B /2 M452B Q Q3 Q4 Q Q3 Q4 D D STOP WORD INREMENTATION Q Q X7 X6 X5 X4 X3 X2 X X A B M452 Z M7 DIGITAL INPUT/OUTPUT 8 BIT WORD TO BE ONVERTED R ANALOG OUTPUT ANALOG INPUT Figure 5. Digital to Analog and Analog to Digital onverter M4532B 6

7 OUTLINE DIMENSIONS L SUFFIX ERAMI DIP PAKAGE ASE 62 ISSUE V T SEATING PLANE F A E D 6 PL G.25 (.) M T N B A S K L J M 6 PL.25 (.) M T B S NOTES:. DIMENSIONING AND TOLERANING PER ANSI Y4.5M, ONTROLLING DIMENSION: INH. 3. DIMENSION L TO ENTER OF LEAD WHEN FORMED PARALLEL. 4. DIMENSION F MAY NARROW TO.76 (.3) WHERE THE LEAD ENTERS THE ERAMI BODY. INHES MILLIMETERS DIM MIN MAX MIN MAX A B D E.5 BS.27 BS F G. BS 2.54 BS H K L.3 BS 7.62 BS M N P SUFFIX PLASTI DIP PAKAGE ASE ISSUE R 6 H A 8 G F D 9 6 PL B S K T.25 (.) M T A SEATING PLANE M J L M NOTES:. DIMENSIONING AND TOLERANING PER ANSI Y4.5M, ONTROLLING DIMENSION: INH. 3. DIMENSION L TO ENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INUDE MOLD FLASH. 5. ROUNDED ORNERS OPTIONAL. INHES MILLIMETERS DIM MIN MAX MIN MAX A B D F G. BS 2.54 BS H.5 BS.27 BS J K L M S M4532B 7

8 OUTLINE DIMENSIONS D SUFFIX PLASTI SOI PAKAGE ASE 75B 5 ISSUE J T SEATING PLANE G D A 6 PL K B.25 (.) M S A S T B P 8 PL.25 (.) M B S M R X 45 J F NOTES:. DIMENSIONING AND TOLERANING PER ANSI Y4.5M, ONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION. (.6) PER SIDE. 5. DIMENSION D DOES NOT INUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE.27 (.5) TOTAL IN EXESS OF THE D DIMENSION AT MAXIMUM MATERIAL ONDITION. MILLIMETERS INHES DIM MIN MAX MIN MAX A B D F G.27 BS.5 BS J K M 7 7 P R Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation coequential or incidental damages. Typical parameters which may be provided in Motorola data sheets and/or specificatio can and do vary in different applicatio and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. Motorola does not convey any licee under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applicatio intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless agait all claims, costs, damages, and expees, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. How to reach us: USA/EUROPE/Locatio Not Listed: Motorola Literature Distribution; JAPAN: Nippon Motorola Ltd.; Tatsumi SPD JLD, 6F Seibu Butsuryu enter, P.O. Box 292; Phoenix, Arizona or Tatsumi Koto Ku, Tokyo 35, Japan MFAX: RMFAX@ .sps.mot.com TOUHTONE ASIA/PAIFI: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, INTERNET: NET.com 5 Ting Kok Road, Tai Po, N.T., Hong Kong M4532B 8 MOTOROLA MOS LOGI M4532B/D DATA