High Performance Silicon Gate CMOS

Transcription

1 SEIONDUTOR TEHNIAL DATA High Performance Silicon Gate OS The 5/7H32A is identical in pinout to the LS32. The device inputs are compatible with standard OS outputs; with pullup resistors, they are compatible with LSTTL outputs. The H32A can be used to enhance noise immunity or to square up slowly changing waveforms. Output Drive apability: 0 LSTTL Loads Outputs Directly Interface to OS, NOS, and TTL Operating oltage Range: 2.0 to 6.0 Low Input urrent:.0 µa High Noise Immunity haracteristic of OS Devices In ompliance with the Requirements Defined by EDE Standard No. 7A hip omplexity: 72 ETs or 8 Equivalent Gates LOGI DIAGRA 5HXXXA 7HXXXAN 7HXXXAD SUIX ERAI PAAGE ASE N SUIX PLASTI PAAGE ASE D SUIX SOI PAAGE ASE 75A 03 ORDERING INORATION eramic Plastic SOI A B 2 3 Y PIN ASSIGNENT A B 2 3 B A2 6 Y2 Y A2 B A Y B3 B2 A3 5 9 Y = AB Y A3 Y3 B3 A B Y3 Y UNTION TABLE Inputs Output A B Y L L H L H H H L H H H L PIN = PIN 7 = 0/95 otorola, Inc. 995 RE 6

2 5/7H32A AXIU RATINGS* Symbol Parameter alue Unit ÎÎ D Supply oltage (Referenced to ) 0.5 to inîî D Input oltage (Referenced to ).5 to +.5 outîî D Output oltage (Referenced to ) 0.5 to Iin ÎÎ D Input urrent, per Pin ± 20 ma Iout ÎÎ D Output urrent, per Pin ± 25 ma IÎÎ D Supply urrent, and Pins ± 50 ma PD ÎÎ Power Dissipation in Still Air, Plastic or eramic DIP 750 SOI Package ÎÎ mw 500 TstgÎÎ Storage Temperature 65 to + 50 LÎÎ ÎÎ T Lead Temperature, mm from ase for 0 Seconds (Plastic DIP or SOI Package) 260 (eramic DIP) 300 * aximum Ratings are those values beyond which damage to the device may occur. unctional operation should be restricted to the Recommended Operating onditions. Derating Plastic DIP: 0 mw/ from 65 to 25 eramic DIP: 0 mw/ from 00 to 25 SOI Package: 7 mw/ from 65 to 25 or high frequency or heavy load considerations, see hapter 2 of the otorola High Speed OS Data Book (DL29/D). REOENDED OPERATING ONDITIONS Î Symbol ÎÎ Parameter in ax Unit Î ÎÎ D Supply oltage (Referenced to ) Î in, out ÎÎ D Input oltage, Output oltage 0 (Referenced to ) Î TA Operating Temperature, All Package Types Î tr, tf Input Rise and all Time (igure ) no ns limit* * When in 0.5, I >> quiescent current. D ELETRIAL HARATERISTIS (oltages Referenced to ) ÎÎ Guaranteed Limit Î 0 to 55 to Î Symbol Parameter Test onditions Î 25 Î Unit Î Î T+ max aximum Positive Going out = 0. Input Threshold oltage (igure 3) Iout Î.5 Î Î Î Î Î T+ min inimum Positive Going out = 0. ÎÎ Input Threshold oltage Iout Î 0.95 Î 0.95 Î Î (igure 3) Î Î Î Î T max aximum Negative Going out = 0. Input Threshold oltage Iout Î Î.5 Î 2.0 Î 2.05 Î 2.05 Î (igure 3) Î T min inimum Negative Going out = 0. Input Threshold oltage Iout Î Î.5 Î 0.9 Î 0.9 Î 0.9 Î (igure 3) Hmax aximum Hysteresis oltage out = 0. or 0. ÎÎ Note 2 (igure 3) Iout Î.2 Î Î Î Î Î Hmin inimum Hysteresis oltage out = 0. or 0. ÎÎ Note 2 (igure 3) Iout Î 0.2 Î 0.2 Î Î This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high impedance circuit. or proper operation, in and out should be constrained to the range (in or out). Unused inputs must always be tied to an appropriate logic voltage level (e.g., either or ). Unused outputs must be left open. NOTE:. Hmin > (T+ min) (T max); Hmax = (T+ max) + (T min). NOTE: Information on typical parametric values can be found in hapter 2 of the otorola High Speed OS Data Book (DL29/D) OTOROLA 2 High Speed OS Logic Data DL29 Rev 6

3 5/7H32A D ELETRIAL HARATERISTIS (oltages Referenced to ) Î Guaranteed Limit Î 55 to Î Symbol Parameter Test onditions Î 25 Unit Î OH inimum High Level Output int min or T+ max Î ÎÎ oltage Iout Î.9 Î Î Î ÎÎ in T min or T+ max Iout Î.0 ma Iout Î 3.7 ÎÎ Î Î 5.2 ma OL aximum Low Level Output in T+ max Î oltage Iout 2.0 Î Î 0. Î 0. Î 0. Î in T+ max Iout.0.5 Iout 5.2 ma Î Iin aximum Input Leakage urrent in = or 6.0 ± 0.Î ±.0 ± Î µa I aximum Quiescent Supply in = or µa urrent (per Package) Iout = 0 µa A ELETRIAL HARATERISTIS (L = 50 p, Input tr = tf = 6.0 ns) ÎÎ Guaranteed Limit 55 to Symbol Parameter 25 Î 85 Î 25 Unit ÎÎ tplh, aximum Propagation Delay, Input A or B to Output Y 2.0 ÎÎ Î tphl ÎÎ (igures and 2) Î Î 25 Î 3 Î 38 ns Î ttlh, ÎÎ aximum Output Transition Time, Any Output Î 2.0 tthl (igures and 2) Î Î 22 9 ns ÎÎ aximum Input apacitance Î 0 Î 0 Î 0 p in NOTE: or propagation delays with loads other than 50 p, and information on typical parametric values, see hapter 2 of the otorola High Speed OS Data Book (DL29/D). 25, = 5.0 PD Power Dissipation apacitance (Per Gate)* 2 p * Used to determine the no load dynamic power consumption: PD = PD 2 f + I. or load considerations, see hapter 2 of the otorola High Speed OS Data Book (DL29/D). INPUT A OR B Y 90% 50% 0% tr tphl 90% 50% 0% tf tplh DEIE UNDER TEST OUTPUT TEST POINT L* tthl ttlh * Includes all probe and jig capacitance igure. Switching Waveforms igure 2. Test ircuit High Speed OS Logic Data DL29 Rev 6 3 OTOROLA

4 5/7H32A T, TYPIAL INPUT THRESHOLD OLTAGE (OLTS) 3 Htyp , POWER SUPPLY OLTAGE (OLTS) Htyp = (T + typ) (T typ) igure 3. Typical Input Threshold, T+, T ersus Power Supply oltage in out (a) A SHITT TRIGGER SQUARES UP INPUTS (a) WITH SLOW RISE AND ALL TIES (b) A SHITT TRIGGER OERS AXIU NOISE (b) IUNITY H H in T + T in T + T OH OH out out OL OL igure. Typical Schmitt Trigger Applications OTOROLA High Speed OS Logic Data DL29 Rev 6

5 5/7H32A -B- -T- SEATING PLANE 8 7 -A- OUTLINE DIENSIONS SUIX ERAI DIP PAAGE ASE ISSUE Y G N D PL PL 0.25 (0.00) T A S 0.25 (0.00) T B L S NOTES:. DIENSIONING AND TOLERANING PER ANSI Y.5, ONTROLLING DIENSION: INH. 3. DIENSION L TO ENTER O LEAD WHEN ORED PARALLEL.. DIESNION AY NARROW TO 0.76 (0.030) WHERE THE LEAD ENTERS THE ERAI BODY. DI A B D G L N INHES IN AX BS BS ILLIETERS IN AX BS BS A H G D N B SEATING PLANE N SUIX PLASTI DIP PAAGE ASE ISSUE L L NOTES:. LEADS WITHIN 0.3 (0.005) RADIUS O TRUE POSITION AT SEATING PLANE AT AXIU ATERIAL ONDITION. 2. DIENSION L TO ENTER O LEADS WHEN ORED PARALLEL. 3. DIENSION B DOES NOT INLUDE OLD LASH.. ROUNDED ORNERS OPTIONAL. INHES ILLIETERS DI IN AX IN AX A B D G 0.00 BS 2.5 BS H L BS 7.62 BS N SEATING PLANE A 7 G 8 B P 7 PL D PL 0.25 (0.00) T B S A S D SUIX PLASTI SOI PAAGE ASE 75A 03 ISSUE 0.25 (0.00) B R X 5 NOTES:. DIENSIONING AND TOLERANING PER ANSI Y.5, ONTROLLING DIENSION: ILLIETER. 3. DIENSIONS A AND B DO NOT INLUDE OLD PROTRUSION.. AXIU OLD PROTRUSION 0.5 (0.006) PER SIDE. 5. DIENSION D DOES NOT INLUDE DABAR PROTRUSION. ALLOWABLE DABAR PROTRUSION SHALL BE 0.27 (0.005) TOTAL IN EXESS O THE D DIENSION AT AXIU ATERIAL ONDITION. DI A B D G P R ILLIETERS IN AX BS BS INHES IN AX High Speed OS Logic Data DL29 Rev 6 5 OTOROLA

6 5/7H32A otorola reserves the right to make changes without further notice to any products herein. otorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does otorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. Typical parameters can and do vary in different applications. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. otorola does not convey any license under its patent rights nor the rights of others. otorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the otorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use otorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold otorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that otorola was negligent regarding the design or manufacture of the part. otorola and are registered trademarks of otorola, Inc. otorola, Inc. is an Equal Opportunity/Affirmative Action Employer. How to reach us: USA/EUROPE: otorola Literature Distribution; APAN: Nippon otorola Ltd.; Tatsumi SPD LD, Toshikatsu Otsuki, P.O. Box 2092; Phoenix, Arizona Seibu Butsuryu enter, 3 2 Tatsumi oto u, Tokyo 35, apan AX: RAX0@ .sps.mot.com TOUHTONE (602) HONG ONG: otorola Semiconductors H.. Ltd.; 8B Tai Ping Industrial Park, INTERNET: NET.com 5 Ting ok Road, Tai Po, N.T., Hong ong OTOROLA ODELINE 6 5/7H32A/D High Speed OS Logic Data DL29 Rev 6