PIN ASSIGNMENT LOGI DIAGRAM LOK a RESET a a 2 a LOK b RESET b b LOK, 3 BINARY OUNTER 3, 4, 0 5, 9 6, a 4 a b 3 b RESET

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1 Dual 4 Sage Binary Ripple ouner High Performance Silicon Gae MOS The M74H393A is idenical in pinou o he LS393. The device inpus are compaible wih sandard MOS oupus; wih pullup resisors, hey are compaible wih LSTTL oupus. This device consiss of wo independen 4 bi binary ripple couners wih parallel oupus from each couner sage. A 256 couner can be obained by cascading he wo binary couners. Inernal flip flops are riggered by high o low ransiions of he clock inpu. Rese for he couners is asynchronous and acive high. Sae changes of he oupus do no occur simulaneously because of inernal ripple delays. Therefore, decoded oupu signals are subjec o decoding spikes and should no be used as clocks or as srobes excep when gaed wih he lock of he H393A. Feaures Oupu Drive apabiliy: 0 LSTTL Loads Oupus Direcly Inerface o MOS, NMOS, and TTL Operaing olage Range: 2.0 o 6.0 Low Inpu urren: A High Noise Immuniy haracerisic of MOS Devices 4 SOI 4 D SUFFIX ASE 75A MARKING DIAGRAMS 4 In ompliance wih he JEDE Sandard No. 7A Requiremens TSSOP 4 H 4 DT SUFFIX 393A hip omplexiy: 236 FETs or 59 Equivalen Gaes ASE 948G ALYW Pb Free Packages are Available PDIP 4 N SUFFIX ASE 646 M74H393AN AWLYYWWG H393AG AWLYWW 4 4 SOEIAJ 4 F SUFFIX ASE H393A ALYWG A = Assembly Locaion L, WL = Wafer Lo Y, YY = Year W, WW = Work Week G or = Pb Free Package (Noe: Microdo may be in eiher locaion) ORDERING INFORMATION See deailed ordering and shipping informaion in he package dimensions secion on page 2 of his daa shee. m/on/ Semiconducor omponens Indusries, LL, 2006 Publicaion Order Number: Ocober, 2006 Rev. 4 M74H393A/D

2 PIN ASSIGNMENT LOGI DIAGRAM LOK a RESET a a 2 a LOK b RESET b b LOK, 3 BINARY OUNTER 3, 4, 0 5, 9 6, a 4 a b 3 b RESET 2, 2 GND b PIN 4 = PIN 7 = GND FUNTION TABLE Inpus lock Rese Oupus X H L H L No hange L L No hange L No hange L Advance o Nex Sae ORDERING INFORMATION Device Package Shipping M74H393AN PDIP 4 M74H393ANG PDIP 4 25 Unis / Rail (Pb Free) M74H393AD M74H393ADG SOI 4 SOI 4 (Pb Free) 55 Unis / Rail M74H393ADR2 M74H393ADR2G M74H393ADTR2 M74H393ADTR2G M74H393AFEL M74H393AFELG SOI 4 SOI 4 (Pb Free) TSSOP 4* TSSOP 4* SOEIAJ 4 SOEIAJ 4 (Pb Free) 2500 / Tape & Reel 2000 / Tape & Reel For informaion on ape and reel specificaions, including par orienaion and ape sizes, please refer o our Tape and Reel Packaging Specificaions Brochure, BRD80/D. *This package is inherenly Pb Free. m/on/ 2

3 MAXIMUM RATINGS SymbolÎÎ Parameer Î alue Uni ÎÎ D Supply olage (Referenced o GND) Î 0.5 o in ÎÎ D Inpu olage (Referenced o GND) Î 0.5 o ou ÎÎ D Oupu olage (Referenced o GND) Î 0.5 o I in ÎÎ D Inpu urren, per Pin Î ± 20 ma I ou ÎÎ D Oupu urren, per Pin Î ± 25 ma I ÎÎ D Supply urren, and GND Pins Î ± 50 ma P D ÎÎ Power Dissipaion in Sill Air, Plasic DIP Î 750 mw SOI Package 500 TSSOP Package 450 T sg ÎÎ Sorage Temperaure 65 o + 50 T L Lead Temperaure, mm from ase for 0 Seconds Î Plasic DIP, SOI or TSSOP Package Î 260 Sresses exceeding Maximum Raings may damage he device. Maximum Raings are sress raings only. Funcional operaion above he Recommended Operaing ondiions is no implied. Exended exposure o sresses above he Recommended Operaing ondiions may affec device reliabiliy. Deraing Plasic DIP: 0 mw/ from 65 o 25 SOI Package: 7 mw/ from 65 o 25 TSSOP Package: 6. mw/ from 65 o 25 For high frequency or heavy load consideraions, see haper 2 of he ON Semiconducor High Speed MOS Daa Book (DL29/D). REOMMENDED OPERATING ONDITIONS ÎÎ Symbol Parameer Min Max Uni D Supply olage (Referenced o GND) 2.0 ÎÎ 6.0 in, ou D Inpu olage, Oupu olage (Referenced o ÎÎ GND) 0 T A ÎÎ Operaing Temperaure, All Package Types r, f ÎÎ Inpu Rise and Fall Time = ns Î = (Figure ) Î = = This device conains proecion circuiry o guard agains damage due o high saic volages or elecric fields. However, precauions mus be aken o avoid applicaions of any volage higher han maximum raed volages o his high impedance circui. For proper operaion, in and ou should be consrained o he range GND ( in or ou ). Unused inpus mus always be ied o an appropriae logic volage level (e.g., eiher GND or ). Unused oupus mus be lef open. D ELETRIAL HARATERISTIS (olages Referenced o GND) Guaraneed Limi Î 55 o ÎÎ Symbol Parameer Tes ondiions Uni Î IH Minimum High Level Inpu Î olage Î ou = 0. or I ou 20 A Î IL Î Î Maximum Low Level Inpu ou = 0. or olage Î I ou 20 A Î OH Î Î Minimum High Level Oupu in = IH or IL olage Î I ou 20 A Î in = IH or IL I ou 2.4 ma I ou 4.0 ma I ou 5.2 ma m/on/ 3

4 D ELETRIAL HARATERISTIS (olages Referenced o GND) Guaraneed Limi 55 o Symbol Parameer Tes ondiions Î Uni OL Î Maximum Low Level Oupu Î in = IH or IL olage I ou 20 A in = IH or IL I ou 2.4 ma I ou 4.0 ma I ou 5.2 ma I in Î Î Maximum Inpu Leakage urren in = ÎÎ ÎÎ or GND 6.0 ± 0. ±.0 ±.0 A I Î Î Maximum uiescen Supply in = Î or GND urren (per Package) Î I ou = 0 A Î A NOTE: Informaion on ypical parameric values can be found in haper 2 of he ON Semiconducor High Speed MOS Daa Book (DL29/D). A ELETRIAL HARATERISTIS ( L = 50 pf, Inpu r = f = 6 ns) Guaraneed Limi 55 o SymbolÎ Parameer 25 ÎÎ Uni f max Î Maximum lock Frequency (50% Duy ycle) MHz (Figures and 3) Î PLH, Maximum Propagaion Delay, lock o ns PHL ÎÎ (Figures and 3) Î PLH, Maximum Propagaion Delay, lock o ns PHL Î (Figures and 3) Î PLH, Maximum Propagaion Delay, lock o ns PHL Î (Figures and 3) PLH ÎÎ, Maximum Propagaion Delay, lock o ns PHL Î (Figures and 3) Î PHL Î Maximum Propagaion Delay, Rese o any ns (Figures 2 and 3) TLH, Î Maximum Oupu Transiion Time, Any Oupu ns THL Î (Figures and 3) Maximum Inpu apaciance pf in NOTES:. For propagaion delays wih loads oher han 50 pf, see haper 2 of he ON Semiconducor High Speed MOS Daa Book (DL29/D). 2. Informaion on ypical parameric values can be found in haper 2 of he ON Semiconducor High Speed MOS Daa Book (DL29/D). PD Power Dissipaion apaciance (Per ouner)* 25, = 5.0 * Used o deermine he no load dynamic power consumpion: P D = PD 2 f + I. For load consideraions, see haper 2 of he ON Semiconducor High Speed MOS Daa Book (DL29/D). m/on/ 4 35 pf

5 TIMING REUIREMENTS (Inpu r = f = 6 ns) Guaraneed Limi 55 o Symbol Parameer Î Uni rec Minimum Recovery Time, Rese Inacive o lock ns ÎÎ (Figure 2) Î w Minimum Pulse Widh, lock ns Î (Figure ) Î w Minimum Pulse Widh, Rese ns Î (Figure 2) Î r, f Maximum Inpu Rise and Fall Times ns Î (Figure ) NOTE: Informaion on ypical parameric values can be found in haper 2 of he ON Semiconducor High Speed MOS Daa Book (DL29/D) PIN DESRIPTIONS INPUTS lock (Pins, 3) lock inpu. The inernal flip flops are oggled and he couner sae advances on high o low ransiions of he clock inpu. OUTPUTS, 2, 3, 4 (Pins 3, 4, 5, 6, 8, 9, 0, ) Parallel binary oupus 4 is he mos significan bi. ONTROL INPUTS Rese (Pins 2, 2) Acive high, asynchronous rese. A separae rese is provided for each couner. A high a he Rese inpu prevens couning and forces all four oupus low. m/on/ 5

6 SWITHING WAEFORMS LOK 90% f r 50% 0% GND RESET w 50% GND w PHL 90% 50% 0% /f max PLH TLH PHL THL LOK 50% rec 50% GND Figure. Figure 2. TEST POINT EXPANDED LOGI DIAGRAM DEIE UNDER TEST OUTPUT L * LOK, 3 D 3, 4, 0 D 2 *Includes all probe and jig capaciance Figure 3. Tes ircui D 5, 9 3 D 6, 8 4 RESET 2, 2 m/on/ 6

7 TIMING DIAGRAM LOK RESET oun OUNT SEUENE Oupus L L L L L L L H 2 L L H L 3 L L H H 4 L H L L 5 L H L H 6 L H H L 7 L H H H 8 H L L L 9 H L L H 0 H L H L H L H H 2 H H L L 3 H H L H 4 H H H L 5 H H H H m/on/ 7

8 PAKAGE DIMENSIONS PDIP 4 ASE ISSUE P B NOTES:. DIMENSIONING AND TOLERANING PER ANSI Y4.5M, ONTROLLING DIMENSION: INH. 3. DIMENSION L TO ENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INLUDE MOLD FLASH. 5. ROUNDED ORNERS OPTIONAL. N T SEATING PLANE A INHES MILLIMETERS DIM MIN MAX MIN MAX A B F L D F G 0.00 BS 2.54 BS H J K K J L M 0 0 H G D 4 PL M N (0.005) M m/on/ 8

9 PAKAGE DIMENSIONS SOI 4 ASE 75A 03 ISSUE H T SEATING PLANE A 4 8 G 7 B P 7 PL 0.25 (0.00) M B M NOTES:. DIMENSIONING AND TOLERANING PER ANSI Y4.5M, ONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.5 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.27 (0.005) TOTAL IN EXESS OF THE D DIMENSION AT MAXIMUM MATERIAL ONDITION. MILLIMETERS INHES R X 45 F DIM MIN MAX MIN MAX A B D D 4 PL K M J F G.27 BS BS 0.25 (0.00) M T B S A S J K M P R SOLDERING FOOTPRINT* 7X X.52 4X PITH DIMENSIONS: MILLIMETERS *For addiional informaion on our Pb Free sraegy and soldering deails, please download he ON Semiconducor Soldering and Mouning Techniques Reference Manual, SOLDERRM/D. m/on/ 9

10 PAKAGE DIMENSIONS TSSOP 4 ASE 948G 0 ISSUE B 4X K REF NOTES:. DIMENSIONING AND TOLERANING PER 0.0 (0.004) M T U S S ANSI Y4.5M, (0.006) T U S 2. ONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. 2X L/2 4 8 MOLD FLASH OR GATE BURRS SHALL NOT N 0.25 (0.00) EXEED 0.5 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INLUDE INTERLEAD FLASH OR PROTRUSION. M INTERLEAD FLASH OR PROTRUSION SHALL NOT EXEED 0.25 (0.00) PER SIDE. B 5. DIMENSION K DOES NOT INLUDE L U N DAMBAR PROTRUSION. ALLOWABLE PIN DAMBAR PROTRUSION SHALL BE 0.08 IDENT. F (0.003) TOTAL IN EXESS OF THE K DIMENSION AT MAXIMUM MATERIAL 7 DETAIL E ONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENE ONLY. 7. DIMENSION A AND B ARE TO BE 0.5 (0.006) T U S DETERMINED AT DATUM PLANE W. A K MILLIMETERS INHES K DIM MIN MAX MIN MAX ÇÇÇ A J J B ÇÇÇ ÉÉÉ D SETION N N F G 0.65 BS BS H J J W K K (0.004) L 6.40 BS BS M T SEATING G H PLANE D DETAIL E SOLDERING FOOTPRINT* PITH 4X X.26 DIMENSIONS: MILLIMETERS *For addiional informaion on our Pb Free sraegy and soldering deails, please download he ON Semiconducor Soldering and Mouning Techniques Reference Manual, SOLDERRM/D. m/on/ 0

11 PAKAGE DIMENSIONS SOEIAJ 4 ASE ISSUE A e 4 8 Z D H E b A 0.3 (0.005) M 0.0 (0.004) 7 E A IEW P M L E L DETAIL P c NOTES: М. DIMENSIONING AND TOLERANING PER ANSI Y4.5M, 982. М 2. ONTROLLING DIMENSION: MILLIMETER. М 3. DIMENSIONS D AND E DO NOT INLUDE MOLD FLASH OR PROTRUSIONS AND ARE MEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXEED 0.5 (0.006) PER SIDE. М 4. TERMINAL NUMBERS ARE SHOWN FOR REFERENE ONLY. М 5. THE LEAD WIDTH DIMENSION (b) DOES NOT INLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL ONDITION. DAMBAR ANNOT BE LOATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPAE BETWEEN PROTRUSIONS AND ADJAENT LEAD TO BE 0.46 ( 0.08). MILLIMETERS INHES DIM MIN MAX MIN MAX A A b c D E e.27 BS BS H E L E M Z ON Semiconducor and are regisered rademarks of Semiconducor omponens Indusries, LL (SILL). SILL reserves he righ o make changes wihou furher noice o any producs herein. SILL makes no warrany, represenaion or guaranee regarding he suiabiliy of is producs for any paricular purpose, nor does SILL assume any liabiliy arising ou of he applicaion or use of any produc or circui, and specifically disclaims any and all liabiliy, including wihou limiaion special, consequenial or incidenal damages. Typical parameers which may be provided in SILL daa shees and/or specificaions can and do vary in differen applicaions and acual performance may vary over ime. All operaing parameers, including Typicals mus be validaed for each cusomer applicaion by cusomer s echnical expers. SILL does no convey any license under is paen righs nor he righs of ohers. SILL producs are no designed, inended, or auhorized for use as componens in sysems inended for surgical implan ino he body, or oher applicaions inended o suppor or susain life, or for any oher applicaion in which he failure of he SILL produc could creae a siuaion where personal injury or deah may occur. Should Buyer purchase or use SILL producs for any such uninended or unauhorized applicaion, Buyer shall indemnify and hold SILL and is officers, employees, subsidiaries, affiliaes, and disribuors harmless agains all claims, coss, damages, and expenses, and reasonable aorney fees arising ou of, direcly or indirecly, any claim of personal injury or deah associaed wih such uninended or unauhorized use, even if such claim alleges ha SILL was negligen regarding he design or manufacure of he par. SILL is an Equal Opporuniy/Affirmaive Acion Employer. This lieraure is subjec o all applicable copyrigh laws and is no for resale in any manner. PUBLIATION ORDERING INFORMATION LITERATURE FULFILLMENT: Lieraure Disribuion ener for ON Semiconducor P.O. Box 563, Denver, olorado 8027 USA Phone: or Toll Free USA/anada Fax: or Toll Free USA/anada orderli@onsemi.com N. American Technical Suppor: Toll Free USA/anada Europe, Middle Eas and Africa Technical Suppor: Phone: Japan usomer Focus ener Phone: ON Semiconducor Websie: Order Lieraure: hp:// m/on/ M74H393A/D For addiional informaion, please conac your local Sales Represenaive

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