MC14099B. 8 Bit Addressable Latches

MC14175BDR2G. Quad Type D Flip Flop

MC475B Quad Type D FlipFlop The MC475B quad ype D flipflop is coruced wih MOS Pchannel and Nchannel enhancemen mode devices in a single monolihic srucure. Each of he four flipflops is posiiveedge riggered

MC74HC138A. 1 of 8 Decoder/ Demultiplexer. High Performance Silicon Gate CMOS

of 8 Decoder/ Demuliplexer High Performance Silicon Gae CMOS The is idenical in pinou o he LS8. The device inpus are compaible wih sandard CMOS oupus; wih pullup resisors, hey are compaible wih LSTTL oupus.

MC74HC573A. Octal 3-State Noninverting Transparent Latch. High Performance Silicon Gate CMOS

Ocal 3-Sae Noninvering Traparen Lach High Performance Silicon Gae COS The C74HC573 is idenical in pinou o he LS573. The devices are compaible wih sandard COS oupus; wih pullup resisors, hey are compaible

MC14040B. 12-Bit Binary Counter

M4040B 2Bi Binary ouner The M4040B 2sage binary couner is coruced wih MOS Phannel and Nhannel enhancemen mode devices in a single monolihic srucure. This par is designed wih an inpu wave shaping circui

MC74HC244A Octal 3 State Noninverting Buffer/Line Driver/ Line Receiver

Ocal Sae Noninvering uffer/line Driver/ Line Receiver High Performance Silicon Gae COS The C74HC244 is idenical in pinou o he LS244. The device inpus are compaible wih sandard COS oupus; wih pullup resisors,

MC74HC595A. 8-Bit Serial-Input/Serial or Parallel-Output Shift Register with Latched 3-State Outputs. High Performance Silicon Gate CMOS

8-Bi Serial-Inpu/Serial or Parallel-Oupu Shif Regiser wih Lached 3-Sae Oupus High Performance Silicon Gae COS The C74HC55A consiss of an 8 bi shif regiser and an 8 bi D ype lach wih hree sae parallel oupus.

MC14015B. Dual 4 Bit Static Shift Register

M0B Dual Bi Saic Shif egiser The M0B dual bi saic shif regiser is coruced wih MOS Phannel and Nhannel enhancemen mode devices in a single monolihic srucure. I coiss of wo idenical, independen sae serialinpu/paralleloupu

MC14060B. 14 Bit Binary Counter and Oscillator

4Bit Binary Counter and Oscillator The MC4060B is a 4stage binary ripple counter with an onchip oscillator buffer. The oscillator configuration allows design of either RC or crystal oscillator circuits.

MC14043B, MC14044B CMOS MSI. Quad R S Latches

MC44B, MC444B CMOS MSI Quad RS Laches The MC44B and MC444B quad RS laches are coruced wih MOS PChannel and NChannel enhancemen mode devices in a single monolihic srucure. Each lach has an independen Q

MC14175BFELG. Quad Type D Flip Flop

MC475B Quad Type D FlipFlop The MC475B quad ype D flipflop is coruced wih MOS Pchannel and Nchannel enhancemen mode devices in a single monolihic srucure. Each of he four flipflops is posiiveedge riggered

MC14503B. Hex Non-Inverting 3-State Buffer

MC4503B Hex Non-Invering 3-Sae Buffer The MC4503B is a hex noninvering buffer wih 3sae oupus, and a high curren source and sink capabiliy. The 3sae oupus make i useful in common bussing applicaio. Two

Quad 2-Input OR Gate High-Performance Silicon-Gate CMOS

TECNICAL DATA Quad 2-Inpu OR ae igh-performance Silicon-ae CMOS The is idenical in pinou o he LS/ALS32. The device inpus are compaible wih sandard CMOS oupus; wih pullup resisors, hey are compaible wih

MC14008B. 4 Bit Full Adder

4 Bi Full Adder The MC4008B 4 bi full adder is consruced wih MOS P Channel and N Channel enhancemen mode devices in a single monolihic srucure. This device consiss of four full adders wih fas inernal look

MC14174B/D. Hex Type D Flip-Flop

MC474B Hex Type D Flip-Flop The MC474B hex ype D flipflop is coruced wih MOS Pchannel and Nchannel enhancemen mode devices in a single monolihic srucure. Daa on he D inpus which mees he seup ime requiremens

MC14029B. Binary/Decade Up/Down Counter

MC4029B Binary/Decade Up/Down Couner The MC4029B Binary/Decade up/down couner is coruced wih MOS P channel and N channel enhancemen mode devices in a single monolihic srucure. The couner coiss of ype D

MC74HC165A. 8 Bit Serial or Parallel Input/ Serial Output Shift Register. High Performance Silicon Gate CMOS

MC74CA 8 Bi Serial or Parallel Inpu/ Serial Oupu Shif Regiser igh Performance Silicon Gae CMOS The MC74CA is idenical in pinou o he S. The device inpus are compaible wih sandard CMOS oupus; wih pullup

Analog Multiplexer Demultiplexer High-Performance Silicon-Gate CMOS

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MC14043B, MC14044B CMOS MSI. Quad R S Latches

MC44B, MC444B CMOS MSI Quad RS Laches The MC44B and MC444B quad RS laches are coruced wih MOS PChannel and NChannel enhancemen mode devices in a single monolihic srucure. Each lach has an independen Q

MC14008B. 4-Bit Full Adder

4-Bi Full Adder The MC4008B 4 bi full adder is consruced wih MOS P Channel and N Channel enhancemen mode devices in a single monolihic srucure. This device consiss of four full adders wih fas inernal look

MC14555B, MC14556B. Dual Binary to 1 of 4 Decoder/Demultiplexer

MC, MC6 Dual inary to of Decoder/Demultiplexer The MC and MC6 are cotructed with complementary MOS (CMOS) enhancement mode devices. ach Decoder/Demultiplexer has two select inputs ( and ), an active low

MC14042B. MARKING DIAGRAMS. MAXIMUM RATINGS (Voltages Referenced to V SS ) (Note 2.) ORDERING INFORMATION PDIP 16 P SUFFIX CASE 648

The MC14042B Quad Traparen Lach is coruced wih MOS P channel and N channel enhancemen mode devices in a single monolihic srucure. Each lach has a separae daa inpu, bu all four laches share a common clock.

MC74HC573A. Octal 3-State Noninverting Transparent Latch. High Performance Silicon Gate CMOS

Ocal 3-Sae Noninvering Transparen Lach High Performance Silicon Gae CMOS The MC74HC573 is idenical in pinou o he LS573. The devices are compaible wih sandard CMOS oupus; wih pullup resisors, hey are compaible

MC14557B. 1-to-64 Bit Variable Length Shift Register

MC -to- it Variable Length Shift Register The MC is a static clocked serial shift register whose length may be programmed to be any number of bits between and. The number of bits selected is equal to the

MC14174B/D. Hex Type D Flip Flop

7B Hex Type D FlipFlop The 7B hex ype D flipflop is coruced wih OS Pchannel and Nchannel enhancemen mode devices in a single monolihic srucure. Daa on he D inpus which mees he seup ime requireme is raferred

MC14027B. Dual J K Flip Flop

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MC14027B. MARKING DIAGRAMS. MAXIMUM RATINGS (Voltages Referenced to V SS ) (Note 2.) ORDERING INFORMATION PDIP 16 P SUFFIX CASE 648

The MC14027B dual J K flip flop has independen J, K, Clock (C), Se (S) and Rese (R) inpus for each flip flop. These devices may be used in conrol, regiser, or oggle funcions. Diode Proecion on All Inpus

MC14099B. 8-Bit Addressable Latches

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MC14020B. 14 Bit Binary Counter

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HV513 8-Channel Serial to Parallel Converter with High Voltage Push-Pull Outputs, POL, Hi-Z, and Short Circuit Detect

H513 8-Channel Serial o Parallel Converer wih High olage Push-Pull s, POL, Hi-Z, and Shor Circui Deec Feaures HCMOS echnology Operaing oupu volage of 250 Low power level shifing from 5 o 250 Shif regiser

MC14504B. Hex Level Shifter for TTL to CMOS or CMOS to CMOS

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MC74HC573A. Octal 3 State Noninverting Transparent Latch. High Performance Silicon Gate CMOS

Ocal 3 Sae Noninvering Transparen Lach High Performance Silicon Gae CMOS The MC74HC573A is idenical in pinou o he LS573. The devices are compaible wih sandard CMOS oupus; wih pullup resisors, hey are compaible

MC74HC74A. Dual D Flip-Flop with Set and Reset. High Performance Silicon Gate CMOS

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MC14049B, MC14050B. Hex Buffer

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MC14514B, MC14515B. 4 Bit Transparent Latch / 4 to 16 Line Decoder

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MC74HC74A. Dual D Flip Flop with Set and Reset. High Performance Silicon Gate CMOS

Dual D Flip Flop wih Se and Rese High Performance Silicon Gae CMOS The MC4HC4A is idenical in pinou o he LS4. The device inpus are compaible wih sandard CMOS oupus; wih pullup resisors, hey are compaible

MC14584B. Hex Schmitt Trigger

MC4584B Hex Schmitt Trigger The MC4584B Hex Schmitt Trigger is constructed with MOS Pchannel and Nchannel enhancement mode devices in a single monolithic structure. These devices find primary use where

MC454B, MC45B BLOCK DIAGRAM DECODE TRUTH TABLE (Strobe = )* DATA DATA 2 DATA 3 DATA 4 INHIBIT = PIN = PIN 2 TRANSPARENT LATCH 9 S S2 S3 8

MC454B, MC45B 4Bit Traparent Latch / 4to6 Line Decoder The MC454B and MC45B are two output optio of a 4 to 6 line decoder with latched inputs. The MC454B (output active high option) presents a logical

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MC74VHC1GT125. Noninverting Buffer / CMOS Logic Level Shifter with LSTTL Compatible Inputs

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MC14049B, MC14050B. Hex Buffer

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MC14521B. 24 Stage Frequency Divider

24Stage Frequency Divider The coists of a chain of 24 flipflops with an input circuit that allows three modes of operation. The input will function as a crystal oscillator, an C oscillator, or as an input

MC74AC244, MC74ACT244. Octal Buffer/Line Driver with 3 State Outputs

Octal uffer/line Driver with 3State Outputs The C74C244/244 is an octal buffer and line driver designed to be employed as a memory address driver, clock driver and bus oriented transmitter/receiver which

MC14007UBF. MARKING DIAGRAMS. MAXIMUM RATINGS (Voltages Referenced to V SS ) (Note 2.) ORDERING INFORMATION

The MC007UB muli purpose device consiss of hree N channel and hree P channel enhancemen mode devices packaged o provide access o each device. These versaile pars are useful in inverer circuis, pulse shapers,

74HC74. Dual D Flip Flop with Set and Reset. High Performance Silicon Gate CMOS

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MC14541B. Programmable Timer

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Disribued by: www.jameco.com -800-83-44 The conen and copyrighs of he aached maerial are he propery of is owner. Preferred Device Schoky Barrier Diodes These Schoky barrier diodes are designed for high

MC74HCT373A/D. Octal 3-State Noninverting Transparent Latch with LSTTL-Compatible Inputs. High Performance Silicon Gate CMOS

Ocal -Sae Noninvering Traparen Lach wih LSTTL-Compaible Inpus High Performance Silicon Gae CMOS The MC7HCT7A may be used as a level converer for inerfacing TTL or NMOS oupus o High Speed CMOS inpus. The

74HC86. Quad 2 Input Exclusive OR Gate. High Performance Silicon Gate CMOS

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MC10H125. Quad MECL to TTL Translator

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PI74STX1G126. SOTiny Gate STX Buffer with 3-State Output. Features. Descriptio n. Block Diagram. Pin Configuration

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MC14070B, MC14077B CMOS SSI. Quad Exclusive OR and NOR Gates

C070B, C077B COS SSI Quad Exclusive OR and NOR Gates The C070B quad exclusive OR gate and the C077B quad exclusive NOR gate are constructed with OS Pchannel and Nchannel enhancement mode devices in a single

MC74HC273A. Octal D Flip Flop with Common Clock and Reset. High Performance Silicon Gate CMOS

M74H273A Ocal D Flip Flop wih ommon lock and Rese High Performance Silicon Gae MOS The M74H273A is idenical in pinou o he LS273. The device inpus are compaible wih sandard MOS oupus; wih pullup resisors,

MC14541B. Programmable Timer

Programmable Timer The programmable timer consists of a 6stage binary counter, an integrated oscillator for use with an external capacitor and two resistors, an automatic poweron reset circuit, and output

MC14175B. MARKING DIAGRAMS. MAXIMUM RATINGS (Voltages Referenced to V SS ) (Note 2.) ORDERING INFORMATION PDIP 16 P SUFFIX CASE 648

The MC14175B quad type D flip flop is cotructed with MOS P channel and N channel enhancement mode devices in a single monolithic structure. Each of the four flip flops is positive edge triggered by a common

NL17SZ16. Single Input Buffer

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D44VH10 (NPN), D45VH10 (PNP) Complementary Silicon Power Transistors 15 A COMPLEMENTARY SILICON POWER TRANSISTORS 80 V, 83 W

DH (NPN), D5H (PNP) Complemenary Silicon Power Transisors These complemenary silicon power ransisors are designed for highspeed swiching applicaions, such as swiching regulaors and high frequency inverers.

NTE4035B Integrated Circuit CMOS, 4 Bit Parallel In/Parallel Out Shift Register

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MC14017B. Decade Counter

M407B ecade ouner The M407B is a five sage Johon decade couner wih buil in code converer. High speed operaion and spike free oupus are obained by use of a Johon decade couner design. The en decoded oupus

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MC74AC74, MC74ACT74. Dual D Type Positive Edge Triggered Flip Flop

Dual D Type Positive Edge Triggered Flip Flop The MC74/T74 is a dual D type flip flop with Asynchronous Clear and Set inputs and complementary (Q,Q) outputs. Information at the input is traferred to the

MC74HCT138A. 1 of 8 Decoder/ Demultiplexer with LSTTL Compatible Inputs. High Performance Silicon Gate CMOS

of 8 Decoder/ Demultiplexer with LSTTL Compatible Inputs High Performance Silicon Gate CMOS The MC74HCT38A is identical in pinout to the LS38. The HCT38A may be used as a level converter for interfacing

SOTiny TM LVDS High-Speed Differential Line Receiver. Features. Description. Applications. Pinout. Logic Diagram. Function Table

67890678906789067890678906789067890678906789067890678906789067890 SOTiny TM LVDS High-Speed Differenial Line Receiver Feaures Mees or Exceeds he Requiremens of NSI TI/EI-6-99 Sandard Signaling raes up

MC74LVX50. Hex Buffer

Hex Buffer The MC74LX50 is an advanced high speed CMOS buffer fabricated with silicon gate CMOS technology. The internal circuit is composed of three stages, including a buffered output which provides

MC14069UB. Hex Inverter

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MC74VHC244. Octal Bus Buffer

Ocal Bus Buffer The MC74HC244 is an advanced high speed CMOS ocal bus buffer fabricaed wih silicon gae CMOS echnology. The MC74HC244 is a noninvering 3 sae buffer, and has wo acive low oupu enables. This

MC14001B, MC14011B, MC14023B, MC14025B, MC14071B, MC14073B, MC14081B, MC14082B

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MC14511B. MARKING DIAGRAMS 16. MAXIMUM RATINGS (Voltages Referenced to V SS ) (Note 2) ORDERING INFORMATION

The MC14511B BCD to seven segment latch/decoder/driver is cotructed with complementary MOS (CMOS) enhancement mode devices and NPN bipolar output drivers in a single monolithic structure. The circuit provides

MC14518B. MARKING DIAGRAMS 16. MAXIMUM RATINGS (Voltages Referenced to V SS ) (Note 2.) ORDERING INFORMATION

The MC14518B dual BCD counter and the MC14520B dual binary counter are cotructed with MOS P channel and N channel enhancement mode devices in a single monolithic structure. Each coists of two identical,

MC74HC132A. Quad 2 Input NAND Gate with Schmitt Trigger Inputs. High Performance Silicon Gate CMOS

Quad 2 Input NAND Gate with Schmitt Trigger Inputs High Performance Silicon Gate CMOS The is identical in pinout to the LS32. The device inputs are compatible with standard CMOS outputs; with pull up resistors,

NL17SZ17. Single Non-Inverting Buffer with Schmitt Trigger

NL7SZ7 Single Non-Inverting Buffer with Schmitt Trigger The NL7SZ7 is a single Non inverting Schmitt Trigger Buffer in two tiny footprint packages. The device performs much as LCX multi gate products in

MC14553B. 3 Digit BCD Counter

M Digit D ounter The M digit D counter coists of negative edge triggered D counters that are cascaded synchronously. quad latch at the output of each counter permits storage of any given count. The information

MC14511B. BCD-To-Seven Segment Latch/Decoder/Driver

MC45B BCD-To-Seven Segment Latch/Decoder/Driver The MC45B BCDtoseven segment latch/decoder/driver is cotructed with complementary MOS (CMOS) enhancement mode devices and NPN bipolar output drivers in a

MC74HC138A. 1-of-8 Decoder/ Demultiplexer. High Performance Silicon Gate CMOS

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MC74HC139A. Dual 1 of 4 Decoder/ Demultiplexer. High Performance Silicon Gate CMOS

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MC14532B. MARKING DIAGRAMS. MAXIMUM RATINGS (Voltages Referenced to V SS ) (Note 2.) ORDERING INFORMATION PDIP 16 P SUFFIX CASE 648

The MC4532B is constructed with complementary MOS (CMOS) enhancement mode devices. The primary function of a priority encoder is to provide a binary address for the active input with the highest priority.

MC10ELT22, MC100ELT V Dual TTL to Differential PECL Translator

5.0 V Dual TTL to Differential PECL Translator The MC0ELT/00ELT22 is a dual TTL to differential PECL translator. Because PECL (Positive ECL) levels are used only +5 V and ground are required. The small

MC74HC08A. Quad 2 Input AND Gate High Performance Silicon Gate CMOS

Quad 2 Input AND Gate igh Performance Silicon Gate CMOS The MC74C08A is identical in pinout to the S08. The device inputs are compatible with Standard CMOS outputs; with pullup resistors, they are compatible

PIN ASSIGNMENT LOGI DIAGRAM LOK a RESET a a 2 a LOK b RESET b b LOK, 3 BINARY OUNTER 3, 4, 0 5, 9 6, a 4 a b 3 b RESET

Dual 4 Sage Binary Ripple ouner High Performance Silicon Gae MOS The M74H393A is idenical in pinou o he LS393. The device inpus are compaible wih sandard MOS oupus; wih pullup resisors, hey are compaible

PI5A3157. SOTINY TM Low Voltage SPDT Analog Switch 2:1 Mux/Demux Bus Switch. Features. Descriptio n. Applications. Connection Diagram Pin Description

PI53157 OINY M Low Volage PD nalog wich 2:1 Mux/Demux Bus wich Feaures CMO echnology for Bus and nalog pplicaions Low ON Resisance: 8-ohms a 3.0V Wide Range: 1.65V o 5.5V Rail-o-Rail ignal Range Conrol

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MC74AC132, MC74ACT132. Quad 2 Input NAND Schmitt Trigger

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CD4024BC 7-Stage Ripple Carry Binary Counter

CD4024BC 7-Stage Ripple Carry Binary Counter General Description The CD4024BC is a 7-stage ripple-carry binary counter. Buffered outputs are externally available from stages 1 through 7. The counter is

CD40174BC CD40175BC Hex D-Type Flip-Flop Quad D-Type Flip-Flop

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MC14555B, MC14556B. Dual Binary to 1-of-4 Decoder/Demultiplexer

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MC74HC393A. Dual 4-Stage Binary Ripple Counter. High Performance Silicon Gate CMOS

Dual 4-Sage Binary Ripple ouner High Performance Silicon Gae MOS The M74H393A is idenical in pinou o he LS393. The device inpus are compaible wih sandard MOS oupus; wih pullup resisors, hey are compaible

SN74LS153D 74LS153 LOW POWER SCHOTTKY

74LS153 The LSTTL/MSI SN74LS153 is a very high speed Dual 4-Input Multiplexer with common select inputs and individual enable inputs for each section. It can select two bits of data from four sources.

MC74HC244A Octal 3 State Noninverting Buffer/Line Driver/ Line Receiver

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MC14553B. 3 Digit BCD Counter

Digit BD ounter The MB digit BD counter coists of negative edge triggered BD counters that are cascaded synchronously. quad latch at the output of each counter permits storage of any given count. The information

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NE522 High Speed Dual Differential Comparator/Sense Amp

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NTE4514B & NTE4515B Integrated Circuit CMOS, 4 Bit Latch/4 to 16 Line Decoder

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SOTiny Gate STX. Input. Descriptio n. Features. Block Diagram. Pin Configuration. Recommended Operating Conditions (1) Pin Description.

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