MC14043B, MC14044B CMOS MSI. Quad R S Latches
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1 MC44B, MC444B CMOS MSI Quad RS Laches The MC44B and MC444B quad RS laches are coruced wih MOS PChannel and NChannel enhancemen mode devices in a single monolihic srucure. Each lach has an independen Q oupu and se and rese inpus. The Q oupus are gaed hrough hreesae buffers having a common enable inpu. The oupus are enabled wih a logical or high on he enable inpu; a logical or low disconnecs he lach from he Q oupus, resuling in an open circui a he Q oupus. Feaures Double Diode Inpu Proecion ThreeSae Oupus wih Common Enable Oupus Capable of Driving Two Lowpower TTL Loads or One LowPower Schoky TTL Load Over he Raed Temperaure Range Supply Volage Range =. o 8 NLV Prefix for Auomoive and Oher Applicaio Requiring Unique Sie and Conrol Change Requiremens; AECQ Qualified and PPAP Capable These Devices are PbFree and are RoHS Complian MAXIMUM RATINGS (Volages Referenced o ) Symbol Parameer Value Uni DC Supply Volage Range. o +8. V V in, V ou Inpu or Oupu Volage Range (DC or Traien). o +. V I in, I ou P D Inpu or Oupu Curren (DC or Traien) per Pin Power Dissipaion, per Package (Noe ) ± ma mw T A Ambien Temperaure Range o + C T sg Sorage Temperaure Range o + C T L Lead Temperaure (8Second Soldering) C Sresses exceeding hose lised in he Maximum Raings able may damage he device. If any of hese limis are exceeded, device funcionaliy should no be assumed, damage may occur and reliabiliy may be affeced.. Temperaure Deraing: D/DW Packages:. mw/ C From C To C This device conai proecion circuiry o guard agai damage due o high saic volages or elecric fields. However, precauio mus be aken o avoid applicaio of any volage higher han maximum raed volages o his highimpedance circui. For proper operaion, V in and V ou should be corained o he range (V in or V ou ). Unused inpus mus always be ied o an appropriae logic volage level (e.g., eiher or ). Unused oupus mus be lef open. SOIC D SUFFIX CASE B xx A WL, L YY, Y WW, W G MARKING DIAGRAMS 4xxBG AWLYWW SOIC MC44B ALYWG SOEIAJ SOEIAJ F SUFFIX CASE = Specific Device Code = Assembly Locaion = Wafer Lo = Year = Work Week = PbFree Indicaor ORDERING INFORMATION See deailed ordering and shipping informaion in he package dimeio secion on page of his daa shee. Semiconducor Componens Indusries, LLC, 4 Augus, 4 Rev. Publicaion Order Number: MC44B/D
2 MC44B, MC444B PIN ASSIGNMENT MC44B MC444B Q Q Q R NC S R 4 S S 4 R S 4 NC R 4 Q E E S R R S 8 Q 8 Q NC = NO CONNECTION MC44B MC444B S 4 Q R 4 Q R S S Q R Q R = PIN = PIN 8 NC = PIN S = PIN = PIN 8 NC = PIN 4 S Q TRUTH TABLE S R E Q 4 R Q TRUTH TABLE S R E Q R ENABLE X X X = Don Care High Impedance No Change S ENABLE X X X = Don Care High Impedance No Change
3 MC44B, MC444B ELECTRICAL CHARACTERISTICS (Volages Referenced o ) Characerisic Oupu Volage V in = or V in = or Inpu Volage (V O = 4. or. ) (V O =. or. ) (V O =. or. ) (V O =. or 4. ) (V O =. or. ) (V O =. or. ) Level Level Level Level Oupu Drive Curren (V OH =. ) Source (V OH = 4. ) (V OH =. ) (V OH =. ) (V OL =.4 ) Sink (V OL =. ) (V OL =. ) Symbol V OL. V OH. V IL. V IH. I OH.. I OL. C C C Min Max Min Typ (Noe ) Max Min Max Inpu Curren I in ±. ±. ±. ±. Adc Inpu Capaciance (V in = ) Quiescen Curren (Per Package) Toal Supply Curren (Noes & 4) (Dynamic plus Quiescen, Per Package) (C L = pf on all oupus all buffers swiching) ThreeSae Oupu Leakage Curren C in.. pf I DD. I T I T = (.8 A/kHz) f + I DD I T = (. A/kHz) f + I DD I T = (. A/kHz) f + I DD Uni madc madc Adc Adc I TL ±. ±. ±. ±. Adc Produc parameric performance is indicaed in he Elecrical Characerisics for he lised es condiio, unless oherwise noed. Produc performance may no be indicaed by he Elecrical Characerisics if operaed under differen condiio.. Daa labelled Typ is no o be used for design purposes bu is inended as an indicaion of he IC s poenial performance.. The formulas given are for he ypical characerisics only a C. 4. To calculae oal supply curren a loads oher han pf: I T (C L ) = I T ( pf) + (C L ) Vfk where: I T is in A (per package), C L in pf, V = ( ) in vols, f in khz is inpu frequency, and k =.4.
4 MC44B, MC444B SWITCHING CHARACTERISTICS (Noe ) (C L = pf, T A = C) Typ ÎÎ Characerisic Symbol Min (Noe ) Max Uni Oupu Rise Time TLH = (. /pf) C L +. Î TLH. TLH = (. /pf) C L + TLH = (.4 /pf) C L Oupu Fall Time Î THL ÎÎ THL = (. /pf) C L +.. THL = (. /pf) C L + THL = (.4 /pf) C L Propagaion Delay Time Î PLH ÎÎ PLH = (. /pf) C L +. PLH = (. /pf) C L + PLH = (. /pf) C L + 4 PHL = (. /pf) C L + Î PHL. PHL = (. /pf) C L + PHL = (. /pf) C L + 4 Se, Se Pulse Widh Î W. 8 4 Rese, Rese Pulse Widh Î W. 8 ÎÎ 4 ThreeSae Enable/Disable Delay Î PLZ,. PHZ, 8 PZL, ÎÎ. The formulas given are for he ypical characerisics only a C.. Daa labelled Typ is no o be used for design purposes bu is inended as an indicaion of he IC s poenial performance. PZH AC WAVEFORMS MC44B MC444B % SET % RESET % % % % SET RESET % % % % % % Q % THL TLH % % V OH V OL Q % TLH % % THL V OH V OL PHL PLH PLH PHL 4
5 MC44B, MC444B THREESTATE ENABLE/DISABLE DELAYS Se, Rese, Enable, and Swich Condiio for Sae Tess MC44B MC444B Tes Enable S Q S R S R PZH Open Closed A PZL Closed Open B PHZ Open Closed A PLZ Closed Open B TO OUTPUT UNDER TEST C L pf k S ENABLE % PZH % Q A % PHZ V OL PZL PLZ V OH Q B % ORDERING INFORMATION MC44BDG NLV44BDG* MC44BDG NLV44BDG* MC44BFELG Device Package Shipping SOIC (PbFree) SOIC (PbFree) SOIC (PbFree) SOIC (PbFree) SOEIAJ (PbFree) 48 Unis / Rail 48 Unis / Rail Unis / Tape & Reel Unis / Tape & Reel Unis / Tape & Reel MC444BDG NLV444BDG* MC444BDG NLV444BDG* SOIC (PbFree) SOIC (PbFree) SOIC (PbFree) SOIC (PbFree) 48 Unis / Rail 48 Unis / Rail Unis / Tape & Reel Unis / Tape & Reel For informaion on ape and reel specificaio, including par orienaion and ape sizes, please refer o our Tape and Reel Packaging Specificaio Brochure, BRD8/D. *NLV Prefix for Auomoive and Oher Applicaio Requiring Unique Sie and Conrol Change Requiremens; AECQ Qualified and PPAP Capable.
6 MC44B, MC444B PACKAGE DIMENSIONS SOIC D SUFFIX CASE B ISSUE K A 8 B P 8 PL. (.) M B S NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y4.M, 8.. CONTROLLING DIMENSION: MILLIMETER.. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION. (.) PER SIDE.. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE. (.) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. T SEATING PLANE G D PL K C M R X 4 J F MILLIMETERS INCHES DIM MIN MAX MIN MAX A B C D F G. BSC. BSC J...8. K...4. M P R..... (.) M T B S A S SOLDERING FOOTPRINT* 8X.4 X. X.8. PITCH 8 DIMENSIONS: MILLIMETERS *For addiional informaion on our PbFree sraegy and soldering deails, please download he ON Semiconducor Soldering and Mouning Techniques Reference Manual, SOLDERRM/D.
7 MC44B, MC444B PACKAGE DIMENSIONS SOEIAJ F SUFFIX CASE ISSUE A e Z b D A H E A. (.) M. (.4) 8 E VIEW P M L E Q L DETAIL P c NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y4.M, 8.. CONTROLLING DIMENSION: MILLIMETER.. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS AND ARE MEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED. (.) PER SIDE. 4. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY.. THE LEAD WIDTH DIMENSION (b) DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE.8 (.) TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE.4 (.8). MILLIMETERS INCHES DIM MIN MAX MIN MAX A A....8 b...4. c.... D....4 E..4.. e. BSC. BSC H E L..8.. L E...4. M Q...8. Z ON Semiconducor and he are regisered rademarks of Semiconducor Componens Indusries, LLC (SCILLC) or is subsidiaries in he Unied Saes and/or oher counries. SCILLC ow he righs o a number of paens, rademarks, copyrighs, rade secres, and oher inellecual propery. A lising of SCILLC s produc/paen coverage may be accessed a SCILLC reserves he righ o make changes wihou furher noice o any producs herein. SCILLC makes no warrany, represenaion or guaranee regarding he suiabiliy of is producs for any paricular purpose, nor does SCILLC assume any liabiliy arising ou of he applicaion or use of any produc or circui, and specifically disclaims any and all liabiliy, including wihou limiaion special, coequenial or incidenal damages. Typical parameers which may be provided in SCILLC daa shees and/or specificaio can and do vary in differen applicaio and acual performance may vary over ime. All operaing parameers, including Typicals mus be validaed for each cusomer applicaion by cusomer s echnical expers. SCILLC does no convey any licee under is paen righs nor he righs of ohers. SCILLC producs are no designed, inended, or auhorized for use as componens in sysems inended for surgical implan ino he body, or oher applicaio inended o suppor or susain life, or for any oher applicaion in which he failure of he SCILLC produc could creae a siuaion where personal injury or deah may occur. Should Buyer purchase or use SCILLC producs for any such uninended or unauhorized applicaion, Buyer shall indemnify and hold SCILLC and is officers, employees, subsidiaries, affiliaes, and disribuors harmless agai all claims, coss, damages, and expees, and reasonable aorney fees arising ou of, direcly or indirecly, any claim of personal injury or deah associaed wih such uninended or unauhorized use, even if such claim alleges ha SCILLC was negligen regarding he design or manufacure of he par. SCILLC is an Equal Opporuniy/Affirmaive Acion Employer. This lieraure is subjec o all applicable copyrigh laws and is no for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Lieraure Disribuion Cener for ON Semiconducor P.O. Box, Denver, Colorado 8 USA Phone: or 8448 Toll Free USA/Canada Fax: or 8448 Toll Free USA/Canada orderli@oemi.com N. American Technical Suppor: 888 Toll Free USA/Canada Europe, Middle Eas and Africa Technical Suppor: Phone: 4 Japan Cusomer Focus Cener Phone: 88 ON Semiconducor Websie: Order Lieraure: hp:// For addiional informaion, please conac your local Sales Represenaive MC44B/D
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