MC74HC573A. Octal 3-State Noninverting Transparent Latch. High Performance Silicon Gate CMOS
|
|
|
- Briana Griffin
- 5 years ago
- Views:
Transcription
1 Ocal 3-Sae Noninvering Traparen Lach High Performance Silicon Gae COS The C74HC573 is idenical in pinou o he LS573. The devices are compaible wih sandard COS oupus; wih pullup resisors, hey are compaible wih LSTTL oupus. These laches appear raparen o daa (i.e., he oupus change asynchronously) when Lach Enable is high. When Lach Enable goes low, daa meeing he seup and hold ime becomes lached. The HC573 is idenical in funcion o he HC373 bu has he daa inpus on he opposie side of he package from he oupus o faciliae PC board layou. Feaures Oupu Drive Capabiliy: 5 LSTTL Loads Oupus Direcly Inerface o COS, NOS and TTL Operaing olage Range: 2.0 o 6.0 Low Inpu Curren:.0 In Compliance wih he JEDEC Sandard No. 7.0 Requireme Chip Complexiy: 28 FETs or 54.5 Equivalen Gaes Pb Free Packages are vailable* PDIP N SUFFIX CSE 738 SOIC DW SUFFIX CSE 75D RKING DIGRS C74HC573N WLYYWWG 74HC573 WLYYWWG TSSOP DT SUFFIX CSE 948E HC 573 LYW SOEIJ F SUFFIX CSE HC573 WLYWWG = ssembly Locaion WL, L = Wafer Lo YY, Y = Year WW, W = Work Week G = Pb Free Package = Pb Free Package (Noe: icrodo may be in eiher locaion) ORDERING INFORTION See deailed ordering and shipping informaion in he package dimeio secion on page 2 of his daa shee. *For addiional informaion on our Pb Free sraegy and soldering deails, please download he ON Semiconducor Soldering and ouning Techniques Reference anual, SOLDERR/D. Semiconducor Compone Indusries, LLC, 09 Publicaion Order Number: C74HC573/D
2 PIN SSIGNENT OUTPUT ENLE D0 2 D 3 D2 4 D3 5 D4 6 D5 7 D CC Q0 Q Q2 Q3 Q4 Q5 Q6 Design Crieria alue Unis Inernal Gae Coun* 54.5 ea. Inernal Gae Progaion Delay.5 Inernal Gae Power Dissipaion W Speed Power Produc pj *Equivalen o a wo inpu NND gae. D7 GND Q7 LTCH ENLE LOGIC DIGR FUNCTION TLE Inpus Oupu Oupu Lach Enable Enable D Q L H H H L H L L L L X No Change H X X Z X = Don Care Z = High Impedance DT INPUTS D0 D D2 D3 D4 D5 D6 D7 LTCH ENLE OUTPUT ENLE 2 9 Q0 3 8 Q 4 7 Q2 5 6 Q3 6 5 Q4 7 4 Q5 8 3 Q6 9 2 Q7 PIN = CC PIN 0 = GND NONINERTING OUTPUTS ORDERING INFORTION Device Package Shipping C74HC573N PDIP 8 Unis / Rail C74HC573NG SOIC 8 Unis / Rail C74HC573DW SOIC WIDE 38 Unis / Rail C74HC573DWG SOIC WIDE 38 Unis / Rail C74HC573DWR2 SOIC WIDE 000 Tape & Reel C74HC573DWR2G SOIC WIDE 000 Tape & Reel C74HC573DT TSSOP * 75 Unis / Rail C74HC573DTG TSSOP * 75 Unis / Rail C74HC573DTR2 TSSOP * 2 Tape & Reel C74HC573DTR2G TSSOP * 2 Tape & Reel C74HC573FEL SOEIJ 00 Tape & Reel C74HC573FELG SOEIJ 00 Tape & Reel For informaion on ape and reel specificaio, including par orienaion and ape sizes, please refer o our Tape and Reel Packaging Specificaio rochure, RD80/D. *This package is inherenly Pb Free. 2
3 Î XIU RTINGS Parameer Î alue Î Uni CC DC Supply olage (Referenced o GND) Î 0.5 o Î in DC Inpu olage (Referenced o GND) 0.5 o CC Î Î ou DC Oupu olage (Referenced o GND) 0.5 o CC I in DC Inpu Curren, per Pin ± m I ou DC Oupu Curren, per Pin Î ± 35 Î m I CC DC Supply Curren, CC and GND Pi Î ± 75 Î m P D Power Dissipaion in Sill ir, Plasic DIP Î 750 Î mw SOIC Package Î TSSOP Package Î 450 Î T sg Sorage Temperaure Î 65 o + 50Î C T L Lead Temperaure, mm from Case for 0 Seconds Î C Î (Plasic DIP, TSSOP or SOIC Package) 260 Sresses exceeding aximum Raings may damage he device. aximum Raings are sress raings only. Funcional operaion above he Recommended Operaing Condiio is no implied. Exended exposure o sresses above he Recommended Operaing Condiio may affec device reliabiliy. Deraing Plasic DIP: 0 mw/ C from 65 o 25 C SOIC Package: 7 mw/ C from 65 o 25 C TSSOP Package: 6. mw/ C from 65 o 25 C For high frequency or heavy load coideraio, see Chaper 2 of he ON Semiconducor High Speed COS Daa ook (DL29/D). RECOENDED OPERTING CONDITIONS Parameer Î in Î ax Î Uni CC DC Supply olage (Referenced o GND) Î 2.0 Î 6.0 Î in, ou DC Inpu olage, Oupu olage (Referenced o GND) Î 0 Î CC Î T Operaing Temperaure, ll Package Types Î 55 Î + 25 Î C r, f Inpu Rise and Fall Time CC = (Figure ) CC Î Î Î = CC = Î DC ELECTRICL CHRCTERISTICS (olages Referenced o GND) This device conai proecion circuiry o guard agai damage due o high saic volages or elecric fields. However, precauio mus be aken o avoid applicaio of any volage higher han maximum raed volages o his high impedance circui. For proper operaion, in and ou should be corained o he range GND ( in or ou ) CC. Unused inpus mus always be ied o an appropriae logic volage level (e.g., eiher GND or CC ). Unused oupus mus be lef open. Guaraneed Limi Î CC 55 o Parameer Tes Condiio 25 C 85 C 25 C Uni IH inimum High Level Inpu olage Î ou = 0. or CC 0. Î I Î ou Î Î IL aximum Low Level Inpu olage Î ou = 0. or CC I ou Î 3.0 Î OH inimum High Level Oupu Î in = IH or IL Î olage Î I ou Î Î in = IH or IL I ou 2.4m Î I ou 6.0 m I ou Î m OL aximum Low Level Oupu Î ou = 0. or CC 0. Î olage Î I ou Î Î in = IH or IL I ou 2.4m Î I ou 6.0 m I ou Î m I in aximum Inpu Leakage Curren Î in = CC or GND 6.0 ± 0. ±.0 ±.0 I OZ aximum Three Sae Leakage Î Oupu in High Impedance SaeÎ Curren Î in = IL or IH ou = CC or GND Î Î I CC aximum Quiescen Supply Î in = CC or GND Î Curren (per Package) II ou I = 0 NOTE: Informaion on ypical parameric values can be found in Chaper 2 of he ON Semiconducor High Speed COS Daa ook (DL29/D). 3
4 C ELECTRICL CHRCTERISTICS (C L = 50 pf, Inpu r = f = 6.0 ) CC Î Guaraneed Limi Parameer 55 o 25 C 85 C 25 C Uni Î PLH, aximum Propagaion Delay, Inpu D o Q PHL Î (Figures and 5) Î 3.0Î Î PLH, aximum Propagaion Delay, Lach Enable o Q PHL Î (Figures 2 and 5) Î 3.0Î Î PLZ, Î aximum Propagaion Delay, Oupu Enable o Q Î 2.0Î PHZ (Figures 3 and 6) Î PZL, Î aximum Propagaion Delay, Oupu Enable o Q Î 2.0Î PZH (Figures 3 and 6) Î 4.5Î Î TLH, aximum Oupu Traiion Time, ny Oupu THL (Figures and 5) Î Î C in aximum Inpu Capaciance pf Î C ou aximum 3 Sae Oupu Capaciance (Oupu in High Impedance Sae) NOTE: For propagaion delays wih loads oher han 50 pf, and informaion on ypical parameric values, see Chaper 2 of he ON Semiconducor High Speed COS Daa ook (DL29/D). C PD Power Dissipaion Capaciance (Per Enabled Oupu)* 23 pf * Used o deermine he no load dynamic power coumpion: P D = C PD 2 CC f + I CC CC. For load coideraio, see Chaper 2 of he ON Semiconducor High Speed COS Daa ook (DL29/D) C, CC = Î TIING REQUIREENTS (C L = 50 pf, Inpu r = f = 6.0 ) Guaraneed Limi CC Î 55 o 25 C Î 85 C Î 25 C Parameer Figure in ax in ax in ax Î Uni su inimum Seup Time, Inpu D o Lach Enable Î 0 Î Î 3 Î Î Î h inimum Hold Time, Lach Enable o Inpu D Î 3.0 Î Î Î Î Î 4.5 Î Î Î Î Î 6.0 Î w inimum Pulse Widh, Lach Enable Î 3.0 Î 60 Î Î 80 Î Î Î 5 Î Î 9 Î Î Î r, f aximum Inpu Rise and Fall Times Î 3.0 Î Î 800 Î Î 800 Î Î Î 6.0 pf 4
5 PCKGE DIENSIONS PDIP N SUFFIX CSE ISSUE E T SETING PLNE G E F 0 D PL N K C 0.25 (0.00) T L J PL 0.25 (0.00) T NOTES:. DIENSIONING ND TOLERNCING PER NSI Y4.5, CONTROLLING DIENSION: INCH. 3. DIENSION L TO CENTER OF LED WHEN FORED PRLLEL. 4. DIENSION DOES NOT INCLUDE OLD FLSH. INCHES ILLIETERS DI IN X IN X C D E SC.27 SC F G 0.00 SC 2.54 SC J K L SC 7.62 SC N SOIC DW SUFFIX CSE 75D 05 ISSUE G H 0X 0.25 D E h X 45 NOTES:. DIENSIONS RE IN ILLIETERS. 2. INTERPRET DIENSIONS ND TOLERNCES PER SE Y4.5, DIENSIONS D ND E DO NOT INCLUDE OLD PROTRUSION. 4. XIU OLD PROTRUSION 0.5 PER SIDE. 5. DIENSION DOES NOT INCLUDE DR PROTRUSION. LLOWLE PROTRUSION SHLL E 0.3 TOTL IN EXCESS OF DIENSION T XIU TERIL CONDITION. X 0.25 T S 8X e 0 S T SETING PLNE C L ILLIETERS DI IN X C D E e.27 SC H h L
MC74HC244A Octal 3 State Noninverting Buffer/Line Driver/ Line Receiver
Ocal Sae Noninvering uffer/line Driver/ Line Receiver High Performance Silicon Gae COS The C74HC244 is idenical in pinou o he LS244. The device inpus are compaible wih sandard COS oupus; wih pullup resisors,
MC74HC595A. 8-Bit Serial-Input/Serial or Parallel-Output Shift Register with Latched 3-State Outputs. High Performance Silicon Gate CMOS
8-Bi Serial-Inpu/Serial or Parallel-Oupu Shif Regiser wih Lached 3-Sae Oupus High Performance Silicon Gae COS The C74HC55A consiss of an 8 bi shif regiser and an 8 bi D ype lach wih hree sae parallel oupus.
MC74HC138A. 1 of 8 Decoder/ Demultiplexer. High Performance Silicon Gate CMOS
of 8 Decoder/ Demuliplexer High Performance Silicon Gae CMOS The is idenical in pinou o he LS8. The device inpus are compaible wih sandard CMOS oupus; wih pullup resisors, hey are compaible wih LSTTL oupus.
MC14099B. 8 Bit Addressable Latches
MC0B Bi ddressable Laches The MC0B is an bi addressable lach. Daa is enered in serial form when he appropriae lach is addressed (via address pi 0,, ) and wrie disable is in he low sae. For he MC0B he inpu
Quad 2-Input OR Gate High-Performance Silicon-Gate CMOS
TECNICAL DATA Quad 2-Inpu OR ae igh-performance Silicon-ae CMOS The is idenical in pinou o he LS/ALS32. The device inpus are compaible wih sandard CMOS oupus; wih pullup resisors, hey are compaible wih
MC14175BDR2G. Quad Type D Flip Flop
MC475B Quad Type D FlipFlop The MC475B quad ype D flipflop is coruced wih MOS Pchannel and Nchannel enhancemen mode devices in a single monolihic srucure. Each of he four flipflops is posiiveedge riggered
MC74HC165A. 8 Bit Serial or Parallel Input/ Serial Output Shift Register. High Performance Silicon Gate CMOS
MC74CA 8 Bi Serial or Parallel Inpu/ Serial Oupu Shif Regiser igh Performance Silicon Gae CMOS The MC74CA is idenical in pinou o he S. The device inpus are compaible wih sandard CMOS oupus; wih pullup
MC74AC244, MC74ACT244. Octal Buffer/Line Driver with 3 State Outputs
Octal uffer/line Driver with 3State Outputs The C74C244/244 is an octal buffer and line driver designed to be employed as a memory address driver, clock driver and bus oriented transmitter/receiver which
MC74HC573A. Octal 3-State Noninverting Transparent Latch. High Performance Silicon Gate CMOS
Ocal 3-Sae Noninvering Transparen Lach High Performance Silicon Gae CMOS The MC74HC573 is idenical in pinou o he LS573. The devices are compaible wih sandard CMOS oupus; wih pullup resisors, hey are compaible
Analog Multiplexer Demultiplexer High-Performance Silicon-Gate CMOS
TECHNICAL DATA IW0B Analog Muliplexer Demuliplexer HighPerformance SiliconGae CMOS The IW0B analog muliplexer/demuliplexer is digially conrolled analog swiches having low ON impedance and very low OFF
MC74HC573A. Octal 3 State Noninverting Transparent Latch. High Performance Silicon Gate CMOS
Ocal 3 Sae Noninvering Transparen Lach High Performance Silicon Gae CMOS The MC74HC573A is idenical in pinou o he LS573. The devices are compaible wih sandard CMOS oupus; wih pullup resisors, hey are compaible
MC14040B. 12-Bit Binary Counter
M4040B 2Bi Binary ouner The M4040B 2sage binary couner is coruced wih MOS Phannel and Nhannel enhancemen mode devices in a single monolihic srucure. This par is designed wih an inpu wave shaping circui
MC74HCT573A. Octal 3 State Noninverting Transparent Latch with LSTTL Compatible Inputs. High Performance Silicon Gate CMOS
Octal 3 State Noninverting Traparent Latch with LSTTL Compatible Inputs High Performance Silicon Gate COS The C74HCT573 is identical in pinout to the LS573. This device may be used as a level converter
MC74VHC1GT125. Noninverting Buffer / CMOS Logic Level Shifter with LSTTL Compatible Inputs
C74CGT Noninvering Buffer / COS ogic evel Shifer wih STT Compaible Inpus The C74CGT is a single gae noninvering buffer fabricaed wih silicon gae COS echnology. I achieves high speed operaion similar o
MC14503B. Hex Non-Inverting 3-State Buffer
MC4503B Hex Non-Invering 3-Sae Buffer The MC4503B is a hex noninvering buffer wih 3sae oupus, and a high curren source and sink capabiliy. The 3sae oupus make i useful in common bussing applicaio. Two
MC74HCT373A/D. Octal 3-State Noninverting Transparent Latch with LSTTL-Compatible Inputs. High Performance Silicon Gate CMOS
Ocal -Sae Noninvering Traparen Lach wih LSTTL-Compaible Inpus High Performance Silicon Gae CMOS The MC7HCT7A may be used as a level converer for inerfacing TTL or NMOS oupus o High Speed CMOS inpus. The
MC14015B. Dual 4 Bit Static Shift Register
M0B Dual Bi Saic Shif egiser The M0B dual bi saic shif regiser is coruced wih MOS Phannel and Nhannel enhancemen mode devices in a single monolihic srucure. I coiss of wo idenical, independen sae serialinpu/paralleloupu
HV513 8-Channel Serial to Parallel Converter with High Voltage Push-Pull Outputs, POL, Hi-Z, and Short Circuit Detect
H513 8-Channel Serial o Parallel Converer wih High olage Push-Pull s, POL, Hi-Z, and Shor Circui Deec Feaures HCMOS echnology Operaing oupu volage of 250 Low power level shifing from 5 o 250 Shif regiser
MC74HC74A. Dual D Flip-Flop with Set and Reset. High Performance Silicon Gate CMOS
Dual D Flip-Flop wih Se and Rese High Performance Silicon Gae CMOS The MC4HC4A is idenical in pinou o he LS4. The device inpus are compaible wih sandard CMOS oupus; wih pullup resisors, hey are compaible
74HC86. Quad 2 Input Exclusive OR Gate. High Performance Silicon Gate CMOS
Quad 2 Input Exclusive OR Gate MARKING DIAGRAMS High Performance Silicon Gate CMOS The is identical in pinout to the LS86. The device inputs are compatible with standard CMOS outputs; with pullup resistors,
MC74HC74A. Dual D Flip Flop with Set and Reset. High Performance Silicon Gate CMOS
Dual D Flip Flop wih Se and Rese High Performance Silicon Gae CMOS The MC4HC4A is idenical in pinou o he LS4. The device inpus are compaible wih sandard CMOS oupus; wih pullup resisors, hey are compaible
74HC74. Dual D Flip Flop with Set and Reset. High Performance Silicon Gate CMOS
Dual D Flip Flop with Set and Reset High Performance Silicon Gate CMOS The 4HC4 is identical in pinout to the LS4. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they
MC14043B, MC14044B CMOS MSI. Quad R S Latches
MC44B, MC444B CMOS MSI Quad RS Laches The MC44B and MC444B quad RS laches are coruced wih MOS PChannel and NChannel enhancemen mode devices in a single monolihic srucure. Each lach has an independen Q
MC14175BFELG. Quad Type D Flip Flop
MC475B Quad Type D FlipFlop The MC475B quad ype D flipflop is coruced wih MOS Pchannel and Nchannel enhancemen mode devices in a single monolihic srucure. Each of he four flipflops is posiiveedge riggered
MC14174B/D. Hex Type D Flip Flop
7B Hex Type D FlipFlop The 7B hex ype D flipflop is coruced wih OS Pchannel and Nchannel enhancemen mode devices in a single monolihic srucure. Daa on he D inpus which mees he seup ime requireme is raferred
MC14504B. Hex Level Shifter for TTL to CMOS or CMOS to CMOS
CB Hex Level Shifter for TTL to COS or COS to COS The CB is a hex noninverting level shifter using COS technology. The level shifter will shift a TTL signal to COS logic levels for any COS supply voltage
MC14174B/D. Hex Type D Flip-Flop
MC474B Hex Type D Flip-Flop The MC474B hex ype D flipflop is coruced wih MOS Pchannel and Nchannel enhancemen mode devices in a single monolihic srucure. Daa on he D inpus which mees he seup ime requiremens
MC14029B. Binary/Decade Up/Down Counter
MC4029B Binary/Decade Up/Down Couner The MC4029B Binary/Decade up/down couner is coruced wih MOS P channel and N channel enhancemen mode devices in a single monolihic srucure. The couner coiss of ype D
PI74STX1G126. SOTiny Gate STX Buffer with 3-State Output. Features. Descriptio n. Block Diagram. Pin Configuration
PI74STXG6 4567890456789045678904567890456789045678904567890456789045678904567890456789045678904567890 4567890456789045678904567890456789045678904567890456789045678904567890456789045678904567890 SOTiny
SOTiny TM LVDS High-Speed Differential Line Receiver. Features. Description. Applications. Pinout. Logic Diagram. Function Table
67890678906789067890678906789067890678906789067890678906789067890 SOTiny TM LVDS High-Speed Differenial Line Receiver Feaures Mees or Exceeds he Requiremens of NSI TI/EI-6-99 Sandard Signaling raes up
MC14043B, MC14044B CMOS MSI. Quad R S Latches
MC44B, MC444B CMOS MSI Quad RS Laches The MC44B and MC444B quad RS laches are coruced wih MOS PChannel and NChannel enhancemen mode devices in a single monolihic srucure. Each lach has an independen Q
MC14008B. 4 Bit Full Adder
4 Bi Full Adder The MC4008B 4 bi full adder is consruced wih MOS P Channel and N Channel enhancemen mode devices in a single monolihic srucure. This device consiss of four full adders wih fas inernal look
MC14042B. MARKING DIAGRAMS. MAXIMUM RATINGS (Voltages Referenced to V SS ) (Note 2.) ORDERING INFORMATION PDIP 16 P SUFFIX CASE 648
The MC14042B Quad Traparen Lach is coruced wih MOS P channel and N channel enhancemen mode devices in a single monolihic srucure. Each lach has a separae daa inpu, bu all four laches share a common clock.
MC74HC04A. Hex Inverter. High Performance Silicon Gate CMOS
Hex Inverter High Performance Silicon Gate COS The is identical in pinout to the S04 and the C069. The device inputs are compatible with Standard COS outputs; with pullup resistors, they are compatible
MC74HC00A. Quad 2 Input NAND Gate. High Performance Silicon Gate CMOS
C74C00 Quad 2 Input NND Gate igh Performance Silicon Gate COS The C74C00 is identical in pinout to the S00. The device inputs are compatible with Standard COS outputs; with pullup resistors, they are compatible
MC74HC273A. Octal D Flip Flop with Common Clock and Reset. High Performance Silicon Gate CMOS
M74H273A Ocal D Flip Flop wih ommon lock and Rese High Performance Silicon Gae MOS The M74H273A is idenical in pinou o he LS273. The device inpus are compaible wih sandard MOS oupus; wih pullup resisors,
High Performance Silicon Gate CMOS
High Performance Silicon Gae MOS The M7H7A is idenical in pinou o he LS7. The device inpus are compaible wih sandard MOS oupus; wih pull up resisors, hey are compaible wih LSTTL oupus. This device coiss
MC74HC244A Octal 3 State Noninverting Buffer/Line Driver/ Line Receiver
Octal 3 State Noninverting Buffer/Line Driver/ Line Receiver High Performance Silicon Gate CMOS The MC74HC244A is identical in pinout to the LS244. The device inputs are compatible with standard CMOS outputs;
Octal 3-State Noninverting Transparent Latch
SL74HC73 Octal 3-State Noninverting Traparent Latch High-Performance Silicon-Gate CMOS The SL74HC73 is identical in pinout to the LS/ALS73. The device inputs are compatible with standard CMOS outputs;
MC14008B. 4-Bit Full Adder
4-Bi Full Adder The MC4008B 4 bi full adder is consruced wih MOS P Channel and N Channel enhancemen mode devices in a single monolihic srucure. This device consiss of four full adders wih fas inernal look
MC14555B, MC14556B. Dual Binary to 1 of 4 Decoder/Demultiplexer
MC, MC6 Dual inary to of Decoder/Demultiplexer The MC and MC6 are cotructed with complementary MOS (CMOS) enhancement mode devices. ach Decoder/Demultiplexer has two select inputs ( and ), an active low
SOTiny Gate STX. Input. Descriptio n. Features. Block Diagram. Pin Configuration. Recommended Operating Conditions (1) Pin Description.
PI74STXG08 4567890456789045678904567890456789045678904567890456789045678904567890456789045678904567890 4567890456789045678904567890456789045678904567890456789045678904567890456789045678904567890 - Feaures
MC14027B. Dual J K Flip Flop
M4027B Dual Flip Flop The M4027B dual flip flop has independen,, lock (), Se (S) and Rese (R) inpus for each flip flop. These devices may be used in conrol, regiser, or oggle funcio. Feaures Diode Proecion
MC74VHC244. Octal Bus Buffer
Ocal Bus Buffer The MC74HC244 is an advanced high speed CMOS ocal bus buffer fabricaed wih silicon gae CMOS echnology. The MC74HC244 is a noninvering 3 sae buffer, and has wo acive low oupu enables. This
74HC244 Octal 3 State Noninverting Buffer/Line Driver/ Line Receiver
Octal 3 State Noninverting Buffer/Line Driver/ Line Receiver High Performance Silicon Gate CMOS The is identical in pinout to the LS244. The device inputs are compatible with standard CMOS outputs; with
MM74HC373 3-STATE Octal D-Type Latch
3-STATE Octal D-Type Latch General Description The MM74HC373 high speed octal D-type latches utilize advanced silicon-gate CMOS technology. They possess the high noise immunity and low power consumption
MM74HC373 3-STATE Octal D-Type Latch
MM74HC373 3-STATE Octal D-Type Latch General Description The MM74HC373 high speed octal D-type latches utilize advanced silicon-gate CMOS technology. They possess the high noise immunity and low power
MC74HC393. Dual 4 Stage Binary Ripple Counter. High Performance Silicon Gate CMOS
74H393 ual 4 Sage Binary Ripple ouner High Performance Silicon Gae OS The 54/74H393 is idenical in pinou o he LS393. The device inpus are compaible wih sandard OS oupus; wih pullup resisors, hey are compaible
MC74HCT573A/D. Octal 3-State Noninverting Transparent Latch with LSTTL Compatible Inputs. High Performance Silicon Gate CMOS
Octal 3-State Noninverting Transparent Latch with LSTTL Compatible Inputs High Performance Silicon Gate CMOS The MC74HCT573A is identical in pinout to the LS573. This device may be used as a level converter
PIN ASSIGNMENT LOGI DIAGRAM LOK a RESET a a 2 a LOK b RESET b b LOK, 3 BINARY OUNTER 3, 4, 0 5, 9 6, a 4 a b 3 b RESET
Dual 4 Sage Binary Ripple ouner High Performance Silicon Gae MOS The M74H393A is idenical in pinou o he LS393. The device inpus are compaible wih sandard MOS oupus; wih pullup resisors, hey are compaible
MC74HCT138A. 1 of 8 Decoder/ Demultiplexer with LSTTL Compatible Inputs. High Performance Silicon Gate CMOS
of 8 Decoder/ Demultiplexer with LSTTL Compatible Inputs High Performance Silicon Gate CMOS The MC74HCT38A is identical in pinout to the LS38. The HCT38A may be used as a level converter for interfacing
MM74HCT573 MM74HCT574 Octal D-Type Latch 3-STATE Octal D-Type Flip-Flop
February 1990 Revised May 1999 MM74HCT573 MM74HCT574 Octal D-Type Latch 3-STATE Octal D-Type Flip-Flop General Description The MM74HCT573 octal D-type latches and MM74HCT574 octal D-type flip-flop advanced
MM74HC573 3-STATE Octal D-Type Latch
MM74HC573 3-STATE Octal D-Type Latch General Description The MM74HC573 high speed octal D-type latches utilize advanced silicon-gate P-well CMOS technology. They possess the high noise immunity and low
MM74HC151 8-Channel Digital Multiplexer
8-Channel Digital Multiplexer General Description The MM74HC151 high speed Digital multiplexer utilizes advanced silicon-gate CMOS technology. Along with the high noise immunity and low power dissipation
MM74HC540 MM74HC541 Inverting Octal 3-STATE Buffer Octal 3-STATE Buffer
September 1983 Revised February 1999 MM74HC540 MM74HC541 Inverting Octal 3-STATE Buffer Octal 3-STATE Buffer General Description The MM74HC540 and MM74HC541 3-STATE buffers utilize advanced silicon-gate
MM74HCT373 MM74HCT374 3-STATE Octal D-Type Latch 3-STATE Octal D-Type Flip-Flop
MM74HCT373 MM74HCT374 3-STATE Octal D-Type Latch 3-STATE Octal D-Type Flip-Flop General Description The MM74HCT373 octal D-type latches and MM74HCT374 Octal D-type flip flops advanced silicon-gate CMOS
MM74HC251 8-Channel 3-STATE Multiplexer
8-Channel 3-STATE Multiplexer General Description The MM74HC251 8-channel digital multiplexer with 3- STATE outputs utilizes advanced silicon-gate CMOS technology. Along with the high noise immunity and
MM74HC374 3-STATE Octal D-Type Flip-Flop
3-STATE Octal D-Type Flip-Flop General Description The MM74HC374 high speed Octal D-Type Flip-Flops utilize advanced silicon-gate CMOS technology. They possess the high noise immunity and low power consumption
MC74HC244A. Octal 3-State Noninverting Buffer/Line Driver/ Line Receiver. High Performance Silicon Gate CMOS
Octal 3-State Noninverting Buffer/Line Driver/ Line Receiver High Performance Silicon Gate CMOS The MC74HC244A is identical in pinout to the LS244. The device inputs are compatible with standard CMOS outputs;
PI5A3157. SOTINY TM Low Voltage SPDT Analog Switch 2:1 Mux/Demux Bus Switch. Features. Descriptio n. Applications. Connection Diagram Pin Description
PI53157 OINY M Low Volage PD nalog wich 2:1 Mux/Demux Bus wich Feaures CMO echnology for Bus and nalog pplicaions Low ON Resisance: 8-ohms a 3.0V Wide Range: 1.65V o 5.5V Rail-o-Rail ignal Range Conrol
MC74HC08A. Quad 2 Input AND Gate High Performance Silicon Gate CMOS
Quad 2 Input AND Gate igh Performance Silicon Gate CMOS The MC74C08A is identical in pinout to the S08. The device inputs are compatible with Standard CMOS outputs; with pullup resistors, they are compatible
NTE74HC173 Integrated Circuit TTL High Speed CMOS, 4 Bit D Type Flip Flop with 3 State Outputs
NTE74HC173 Integrated Circuit TTL High Speed CMOS, 4 Bit D Type Flip Flop with 3 State Outputs Description: The NTE74HC173 is an high speed 3 State Quad D Type Flip Flop in a 16 Lead DIP type package that
MM74HC574 3-STATE Octal D-Type Edge-Triggered Flip-Flop
3-STATE Octal D-Type Edge-Triggered Flip-Flop General Description The MM74HC574 high speed octal D-type flip-flops utilize advanced silicon-gate P-well CMOS technology. They possess the high noise immunity
MM74HC157 Quad 2-Input Multiplexer
Quad 2-Input Multiplexer General Description The MM74HC157 high speed Quad 2-to-1 Line data selector/multiplexers utilizes advanced silicon-gate CMOS technology. It possesses the high noise immunity and
MC14060B. 14 Bit Binary Counter and Oscillator
4Bit Binary Counter and Oscillator The MC4060B is a 4stage binary ripple counter with an onchip oscillator buffer. The oscillator configuration allows design of either RC or crystal oscillator circuits.
MM74HCT540 MM74HCT541 Inverting Octal 3-STATE Buffer Octal 3-STATE Buffer
February 1984 Revised February 1999 MM74HCT540 MM74HCT541 Inverting Octal 3-STATE Buffer Octal 3-STATE Buffer General Description The MM74HCT540 and MM74HCT541 3-STATE buffers utilize advanced silicon-gate
MC14027B. MARKING DIAGRAMS. MAXIMUM RATINGS (Voltages Referenced to V SS ) (Note 2.) ORDERING INFORMATION PDIP 16 P SUFFIX CASE 648
The MC14027B dual J K flip flop has independen J, K, Clock (C), Se (S) and Rese (R) inpus for each flip flop. These devices may be used in conrol, regiser, or oggle funcions. Diode Proecion on All Inpus
MM74HCT573 MM74HCT574 Octal D-Type Latch 3-STATE Octal D-Type Flip-Flop
February 1990 Revised May 2005 MM74HCT573 MM74HCT574 Octal D-Type Latch 3-STATE Octal D-Type Flip-Flop General Description The MM74HCT573 octal D-type latches and MM74HCT574 octal D-type flip-flop advanced
MM74HC244 Octal 3-STATE Buffer
MM74HC244 Octal 3-STATE Buffer General Description The MM74HC244 is a non-inverting buffer and has two active low enables (1G and 2G); each enable independently controls 4 buffers. This device does not
MC14020B. 14 Bit Binary Counter
M4020B 4Bi Binary ouner The M4020B 4sage binary couner is coruced wih MOS Phannel and Nhannel enhancemen mode devices in a single monolihic srucure. This par is designed wih an inpu wave shaping circui
High Performance Silicon Gate CMOS
High Performance Silicon Gae MOS The M74H574A is idenical in pinou o he LS574. The device inpus are compaible wih sandard MOS oupus; wih pull up resisors, hey are compaible wih LSTTL oupus. aa meeing he
MM74HC574 3-STATE Octal D-Type Edge-Triggered Flip-Flop
MM74HC574 3-STATE Octal D-Type Edge-Triggered Flip-Flop General Description The MM74HC574 high speed octal D-type flip-flops utilize advanced silicon-gate P-well CMOS technology. They possess the high
MC14007UBF. MARKING DIAGRAMS. MAXIMUM RATINGS (Voltages Referenced to V SS ) (Note 2.) ORDERING INFORMATION
The MC007UB muli purpose device consiss of hree N channel and hree P channel enhancemen mode devices packaged o provide access o each device. These versaile pars are useful in inverer circuis, pulse shapers,
MC74HC138A. 1-of-8 Decoder/ Demultiplexer. High Performance Silicon Gate CMOS
MC74HC38A -of-8 Decoder/ Demultiplexer High Performance Silicon Gate CMOS The MC74HC38A is identical in pinout to the LS38. The device inputs are compatible with standard CMOS outputs; with pullup resistors,
74HC of 8 Decoder/ Demultiplexer. High Performance Silicon Gate CMOS
of 8 Decoder/ Demultiplexer High Performance Silicon Gate CMOS The 74HC38 is identical in pinout to the LS38. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are
74HC74. Dual D Flip Flop with Set and Reset. High Performance Silicon Gate CMOS
Dual D Flip Flop with Set and Reset High Performance Silicon Gate CMOS The 74HC74 is identical in pinout to the LS74. The device inputs are compatible with standard CMOS outputs; with pullup resistors,
MC74HC393A. Dual 4-Stage Binary Ripple Counter. High Performance Silicon Gate CMOS
Dual 4-Sage Binary Ripple ouner High Performance Silicon Gae MOS The M74H393A is idenical in pinou o he LS393. The device inpus are compaible wih sandard MOS oupus; wih pullup resisors, hey are compaible
74HC245. Octal 3 State Noninverting Bus Transceiver. High Performance Silicon Gate CMOS
Octal 3 State Noninverting Bus Traceiver High Performance Silicon Gate CMOS The 74HC245 is identical in pinout to the LS245. The device inputs are compatible with standard CMOS outputs; with pull up resistors,
74HCT245. Octal 3-State Noninverting Bus Transceiver with LSTTL-Compatible Inputs. High-Performance Silicon-Gate CMOS
Octal 3-State Noninverting Bus Transceiver with LSTTL-Compatible Inputs High-Performance Silicon-Gate CMOS The 74HCT245 is identical in pinout to LS245. The device has TTL-Compatible Inputs. The HCT245
MC14557B. 1-to-64 Bit Variable Length Shift Register
MC -to- it Variable Length Shift Register The MC is a static clocked serial shift register whose length may be programmed to be any number of bits between and. The number of bits selected is equal to the
MC74HC00A. Quad 2 Input NAND Gate. High Performance Silicon Gate CMOS
MC74C00A Quad 2 Input NAND Gate igh Performance Silicon Gate CMOS The MC74C00A is identical in pinout to the S00. The device inputs are compatible with Standard CMOS outputs; with pullup resistors, they
MC74HC132A. Quad 2 Input NAND Gate with Schmitt Trigger Inputs. High Performance Silicon Gate CMOS
Quad 2 Input NAND Gate with Schmitt Trigger Inputs High Performance Silicon Gate CMOS The is identical in pinout to the LS32. The device inputs are compatible with standard CMOS outputs; with pull up resistors,
MM74HC175 Quad D-Type Flip-Flop With Clear
Quad D-Type Flip-Flop With Clear General Description The MM74HC175 high speed D-type flip-flop with complementary outputs utilizes advanced silicon-gate CMOS technology to achieve the high noise immunity
Dual D Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS
TECHNICAL DATA IN74ACT74 Dual D Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS The IN74ACT74 is identical in pinout to the LS/ALS74, HC/HCT74. The IN74ACT74 may be used as a level converter
NLSV2T Bit Dual-Supply Non-Inverting Level Translator
2-Bit Dual-Supply Non-Inverting Level Translator The NLSV2T2 is a 2 bit configurable dual supply voltage level translator. The input n and output B n ports are designed to track two different power supply
Preliminary D0 1 ENABLE D0 2 VCC ENABLE ENABLE GND
Preliminary SP26L43 High Speed, +3.3 Quad RS-422 Differenial Line Driver FETURES Quad Differenial Line Drivers ompaible wih he EI sandard for RS-422 serial proocol High-Z Oupu onrol Leas 60Mbps Transmission
BCD-TO-DECIMAL DECODER HIGH-VOLTAGE SILICON-GATE CMOS IW4028B TECHNICAL DATA
TECHNICAL DATA BCD-TO-DECIMAL DECODER HIGH-OLTAGE SILICON-GATE CMOS IW4028B The IW4028B types are BCD-to-decimal or binary-tooctal decoders consisting of buffering on all 4 inputs, decoding-logic gates,
74HC573; 74HCT573. Octal D-type transparent latch; 3-state. The 74HC573; 74HCT573 is functionally identical to:
Product data sheet 1. General description The is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). The has octal D-type transparent latches featuring separate
74HC257; 74HCT257. Quad 2-input multiplexer; 3-state
Product data sheet 1. General description 2. Features The is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). The has four identical 2-input multiplexers with
MC74HC139A. Dual 1 of 4 Decoder/ Demultiplexer. High Performance Silicon Gate CMOS
MC74HC39A Dual of 4 Decoder/ Demultiplexer High Performance Silicon Gate CMOS The MC74HC39A is identical in pinout to the LS39. The device inputs are compatible with standard CMOS outputs; with pull up
1-OF-8 DECODER/DEMULTIPLEXER High-Speed Silicon-Gate CMOS
1-OF-8 DECODER/DEMULTIPLEXER High-Speed Silicon-Gate CMOS The IN74AC138 is identical in pinout to the LS/ALS138, HC/HCT138. The device inputs are compatible with standard CMOS outputs; with pullup resistors,
MM74HC138 3-to-8 Line Decoder
3-to-8 Line Decoder General Description The MM74HC138 decoder utilizes advanced silicon-gate CMOS technology and is well suited to memory address decoding or data routing applications. The circuit features
MM74HC4020 MM74HC Stage Binary Counter 12-Stage Binary Counter
February 1984 Revised February 1999 MM74HC4020 MM74HC4040 14-Stage Binary Counter 12-Stage Binary Counter General Description The MM74HC4020, MM74HC4040, are high speed binary ripple carry counters. These
MM74HC154 4-to-16 Line Decoder
4-to-16 Line Decoder General Description The MM74HC154 decoder utilizes advanced silicon-gate CMOS technology, and is well suited to memory address decoding or data routing applications. It possesses high
MM74HC32 Quad 2-Input OR Gate
Quad 2-Input OR Gate General Description The MM74HC32 OR gates utilize advanced silicon-gate CMOS technology to achieve operating speeds similar to LS-TTL gates with the low power consumption of standard
1-OF-8 DECODER/DEMULTIPLEXER High-Speed Silicon-Gate CMOS
1-OF-8 DECODER/DEMULTIPLEXER High-Speed Silicon-Gate CMOS The IN74ACT138 is identical in pinout to the LS/ALS138, HC/HCT138. The IN74ACT138 may be used as a level converter for interfacing TTL or NMOS
MM74HC00 Quad 2-Input NAND Gate
MM74HC00 Quad 2-Input NAND Gate General Description The MM74HC00 NAND gates utilize advanced silicon-gate CMOS technology to achieve operating speeds similar to LS-TTL gates with the low power consumption
NTE74HC109 Integrated Circuit TTL High Speed CMOS, Dual J K Positive Edge Triggered Flip Flop w/set & Reset
NTE74HC109 Integrated Circuit TTL High Speed CMOS, Dual J K Positive Edge Triggered Flip Flop w/set & Reset Description: The NTE74HC109 is a dual J K flip flip with set and reset in a 16 Lead plastic DIP
Disribued by: www.jameco.com -800-83-44 The conen and copyrighs of he aached maerial are he propery of is owner. Preferred Device Schoky Barrier Diodes These Schoky barrier diodes are designed for high
Octal 3-State Inverting Transparent Latch High-Performance Silicon-Gate CMOS
TECNICAL DATA IN74C33A Octal 3-State Inverting Traparent Latch igh-performance Silicon-ate CMOS The IN74C33A is identical in pinout to the LS/ALS33. The device inputs are compatible with standard CMOS