MC74HC595A. 8-Bit Serial-Input/Serial or Parallel-Output Shift Register with Latched 3-State Outputs. High Performance Silicon Gate CMOS
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- Roland Gallagher
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1 8-Bi Serial-Inpu/Serial or Parallel-Oupu Shif Regiser wih Lached 3-Sae Oupus High Performance Silicon Gae COS The C74HC55A consiss of an 8 bi shif regiser and an 8 bi D ype lach wih hree sae parallel oupus. The shif regiser acceps serial daa and provides a serial oupu. The shif regiser also provides parallel daa o he 8 bi lach. The shif regiser and lach have independen clock inpus. This device also has an asynchronous rese for he shif regiser. The HC55A direcly inerfaces wih he SPI serial daa por on COS PUs and CUs. Feaures Oupu Drive Capabiliy: 5 LSTTL Loads Oupus Direcly Inerface o COS, NOS, and TTL Operaing olage Range: 2.0 o Low Inpu Curren:.0 A High Noise Immuniy Characerisic of COS Devices In Compliance wih he Requiremens Defined by JEDEC Sandard No. 7A Chip Complexiy: 328 FETs or 82 Equivalen Gaes Improvemens over HC55 Improved Propagaion Delays 50% Lower Quiescen Power Improved Inpu Noise and Lachup Immuniy Pb Free Packages are Available* PDIP N SUFFIX CASE 648 SOIC D SUFFIX CASE 75B TSSOP DT SUFFIX CASE 48F ARKING DIAGRAS A = Assembly Locaion WL, L = Wafer Lo YY, Y = Year WW, W = Work Week G, = Pb Free Package (Noe: icrodo may be in eiher locaion) C74HC55AN AWLYYWWG HC55AG AWLYWW HC 55A ALYW ORDERING INFORATION See deailed ordering and shipping informaion in he package dimensions secion on page 2 of his daa shee. *For addiional informaion on our Pb Free sraegy and soldering deails, please download he ON Semiconducor Soldering and ouning Techniques Reference anual, SOLDERR/D. Semiconducor Componens Indusries, LLC, 2008 Publicaion Order Number: C74HC55A/D
2 PIN ASSIGNENT Q B CC Q C 2 5 Q A Q D 3 4 A Q E 4 3 OUTPUT ENABLE Q F 5 2 LATCH CLOCK SERIAL DATA INPUT A 4 SHIFT REGISTER LOGIC DIAGRA LATCH 5 Q A Q B 2 Q C 3 Q D 4 Q E 5 Q F 6 Q G 7 Q H PARALLEL DATA OUTPUTS Q G Q H GND SHIFT CLOCK RESET SQ H SHIFT CLOCK RESET LATCH CLOCK OUTPUT ENABLE SQ H CC = PIN GND = PIN 8 SERIAL DATA OUTPUT ORDERING INFORATION Device Package Shipping C74HC55AN PDIP 500 Unis / Rail C74HC55ANG PDIP 500 Unis / Rail C74HC55AD SOIC 48 Unis / Rail C74HC55ADG SOIC 48 Unis / Rail C74HC55ADR2 SOIC 2500 Tape & Reel C74HC55ADR2G SOIC 2500 Tape & Reel C74HC55ADT TSSOP * 6 Unis / Rail C74HC55ADTR2 TSSOP * 2500 Tape & Reel C74HC55ADTR2G TSSOP * 2500 Tape & Reel C74HC55AFEL SOEIAJ 2000 Tape & Reel C74HC55AFELG SOEIAJ 2000 Tape & Reel For informaion on ape and reel specificaions, including par orienaion and ape sizes, please refer o our Tape and Reel Packaging Specificaions Brochure, BRD80/D. *This package is inherenly Pb Free. 2
3 AXIU RATINGS Symbol Parameer alue Uni Î CC DC Supply olage (Referenced o GND) 0.5 o Î in DC Inpu olage (Referenced o GND) 0.5 o CC Î ou DC Oupu olage (Referenced o GND) 0.5 o CC Î I in DC Inpu Curren, per Pin ± 20 ma Î I ou DC Oupu Curren, per Pin ± 35 ma Î I CC DC Supply Curren, CC and GND Pins ± 75 ma Î P D Power Dissipaion in Sill Air, Plasic DIP 750 mw SOIC Package 500 TSSOP Package 450 Î T sg Sorage Temperaure 65 o + 50 C Î T L Lead Temperaure, mm from Case for 0 Seconds Î (Plasic DIP, SOIC or TSSOP Package) 260 C Sresses exceeding aximum Raings may damage he device. aximum Raings are sress raings only. Funcional operaion above he Recommended Operaing Condiions is no implied. Exended exposure o sresses above he Recommended Operaing Condiions may affec device reliabiliy. Deraing Plasic DIP: 0 mw/ C from 65 o 25 C SOIC Package: 7 mw/ C from 65 o 25 C TSSOP Package: 6. mw/ C from 65 o 25 C For high frequency or heavy load consideraions, see Chaper 2 of he ON Semiconducor High Speed COS Daa Book (DL2/D). RECOENDED OPERATING CONDITIONS Î Î Symbol Parameer in ax Uni Î CC DC Supply olage (Referenced o GND) Î 2.0 Î in, ou DC Inpu olage, Oupu olage (Referenced o GND) 0 CC Î T A Operaing Temperaure, All Package Types 55 Î + 25 C Î r, f Inpu Rise and Fall Time CC = Î 000 ns (Figure ) CC = Î CC = 0 This device conains proecion circuiry o guard agains damage due o high saic volages or elecric fields. However, precauions mus be aken o avoid applicaions of any volage higher han maximum raed volages o his high impedance circui. For proper operaion, in and ou should be consrained o he range GND ( in or ou ) CC. Unused inpus mus always be ied o an appropriae logic volage level (e.g., eiher GND or CC ). Unused oupus mus be lef open. DC ELECTRICAL CHARACTERISTICS (olages Referenced o GND) Î CC Î Guaraneed Limi Symbol Parameer Tes Condiions 55 o 25 C 85 C 25 C Uni Î IH inimum High Level Inpu olage ou = 0. or CC I ou 20 A Î Î Î Î IL aximum Low Level Inpu olage ou = 0. or CC I ou 20 A Î Î Î Î OH inimum High Level Oupu olage, Q A Q H in = IH or IL I ou 20 A Î Î 5. Î in = IH or IL I ou 2.4 ma Î I ou I ou 7.8 ma 5.48 Î
4 DC ELECTRICAL CHARACTERISTICS (olages Referenced o GND) Î CC Î Guaraneed Limi Î Symbol Parameer Tes Condiions 55 o 25 CÎ 85 C 25 C Uni Î OL aximum Low Level Oupu olage, Q A Q H in = IH or IL I ou 20 A Î 0. Î in = IH or IL I ou 2.4 ma I ou ma I ou Î Î 7.8 ma Î OH inimum High Level Oupu in = IH or IL olage, SQ H II ou I 20 A Î in = IH or IL I ou II ou I 4.0 ma Î II ou I 5.2 ma 5.48 Î Î OL aximum Low Level Oupu in = IH or IL Î olage, SQ H II ou I 20 A Î in = IH or IL I ou 2.4 maî II ou I 4.0 ma II ou Î Î I 5.2 ma Î I in aximum Inpu Leakage in = CC or GND Curren ± 0. ±.0 ±.0 A Î I OZ aximum Three Sae Oupu in High Impedance Sae ± 0.5 Î ± 5.0 ± 0 A Leakage Curren, Q A Q H in = IL or IH ou = CC or GND Î I CC aximum Quiescen Supply in = CC or GND Î Curren (per Package) l ou = 0 A 4.0 Î 40 Î 0 A NOTE: Informaion on ypical parameric values can be found in Chaper 2 of he ON Semiconducor High Speed COS Daa Book (DL2/D). AC ELECTRICAL CHARACTERISTICS (C L = 50 pf, Inpu r = f = ns) Î CC Î Guaraneed Limi Symbol Parameer 55 o 25 C 85 C 25 C Uni f Î max aximum Clock Frequency (50% Duy Cycle) Hz (Figures and 7) Î Î PLH, aximum Propagaion Delay, Shif Clock o SQ H ns Î PHL (Figures and 7) Î Î PHL aximum Propagaion Delay, Rese o SQ H ns (Figures 2 and 7) Î Î PLH, aximum Propagaion Delay, Lach Clock o Q A Q H ns Î PHL (Figures 3 and 7) Î Î PLZ, aximum Propagaion Delay, Oupu Enable o Q PHZ A Q H ns (Figures 4 and 8) Î Î Î PZL, aximum Propagaion Delay, Oupu Enable o Q PZH A Q H ns (Figures 4 and 8)
5 AC ELECTRICAL CHARACTERISTICS (C L = 50 pf, Inpu r = f = ns) Î Î Guaraneed Limi CC Î Symbol Parameer 55 o 25 C 85 C 25 C Uni Î TLH, aximum Oupu Transiion Time, Q THL A Q H ns (Figures 3 and 7) Î Î TLH, aximum Oupu Transiion Time, SQ THL H ns (Figures and 7) Î C in aximum Inpu Capaciance pf aximum Three Sae Oupu Capaciance (Oupu in pf C ou High Impedance Sae), Q A Q H NOTE: For propagaion delays wih loads oher han 50 pf, and informaion on ypical parameric values, see Chaper 2 of he ON Semiconducor High Speed COS Daa Book (DL2/D). 25 C, CC = 5.0 C PD Power Dissipaion Capaciance (Per Package)* 300 pf * Used o deermine he no load dynamic power consumpion: P D = C PD 2 CC f + I CC CC. For load consideraions, see Chaper 2 of he ON Semiconducor High Speed COS Daa Book (DL2/D). TIING REQUIREENTS (Inpu r = f = ns) Guaraneed Limi Î CC Symbol Parameer 25 C o 55 C 85 C 25 C Uni Î su inimum Seup Time, Serial Daa Inpu A o Shif Clock ns (Figure 5) Î.0 3 Î su inimum Seup Time, Shif Clock o Lach Clock ns (Figure 6) Î 3 Î h inimum Hold Time, Shif Clock o Serial Daa Inpu A ns (Figure 5) Î Î rec inimum Recovery Time, Rese Inacive o Shif Clock ns (Figure 2) Î.0 3 Î w inimum Pulse Widh, Rese ns (Figure 2) Î Î Î w inimum Pulse Widh, Shif Clock ns (Figure ) Î Î Î w inimum Pulse Widh, Lach Clock ns (Figure 6) Î Î r, f aximum Inpu Rise and Fall Times ns (Figure ) Î
6 PACKAGE DIENSIONS H A 8 G F B S C K SEATING T PLANE D PL 0.25 (0.00) T A PDIP N SUFFIX CASE ISSUE T J L SOIC D SUFFIX CASE 75B 05 ISSUE J NOTES:. DIENSIONING AND TOLERANCING PER ANSI Y4.5, CONTROLLING DIENSION: INCH. 3. DIENSION L TO CENTER OF LEADS WHEN FORED PARALLEL. 4. DIENSION B DOES NOT INCLUDE OLD FLASH. 5. ROUNDED CORNERS OPTIONAL. INCHES ILLIETERS DI IN AX IN AX A B C D F G 0.00 BSC 2.54 BSC H BSC.27 BSC J K L S T SEATING PLANE 8 G A D PL 0.25 (0.00) T B S A S K B C P 8 PL 0.25 (0.00) B R X 45 SOLDERING FOOTPRINT 8X 6.40 X.2 J F NOTES:. DIENSIONING AND TOLERANCING PER ANSI Y4.5, CONTROLLING DIENSION: ILLIETER. 3. DIENSIONS A AND B DO NOT INCLUDE OLD PROTRUSION. 4. AXIU OLD PROTRUSION 0.5 (0.006) PER SIDE. 5. DIENSION D DOES NOT INCLUDE DABAR PROTRUSION. ALLOWABLE DABAR PROTRUSION SHALL BE 0.27 (0.005) TOTAL IN EXCESS OF THE D DIENSION AT AXIU ATERIAL CONDITION. DI A B C D F G J K P R ILLIETERS IN AX INCHES IN AX BSC BSC X PITCH 8 DIENSIONS: ILLIETERS 0
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Disribued by: www.jameco.com -800-83-44 The conen and copyrighs of he aached maerial are he propery of is owner. Preferred Device Schoky Barrier Diodes These Schoky barrier diodes are designed for high
SN74LS125A, SN74LS126A. Quad 3 State Buffers LOW POWER SCHOTTKY. LS125A LS126A TRUTH TABLES ORDERING INFORMATION
Quad 3 State Buffers V CC E D O E D O 4 3 2 0 9 8 LOW POWER SCHOTTKY 2 3 4 5 6 E D O E D O LS25A GND V CC E D O E D O 4 3 2 0 9 8 4 PLASTIC N SUFFIX CASE 646 LS25A INPUTS 2 3 4 5 6 E D O E LS26A D O GND
MC74VHC132. Quad 2 Input NAND Schmitt Trigger
MC74HC32 Quad 2 Input NAND Schmitt Trigger The MC74HC32 is an advanced high speed CMOS Schmitt NAND trigger fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent
MC74AC109, MC74ACT109. Dual JK Positive Edge Triggered Flip Flop
MC9, MC9 Dual JK Positive EdgeTriggered FlipFlop The MC9/9 coists of two highspeed completely independent traition clocked JK flipflops. The clocking operation is independent of rise and fall times of
MC74VHC257. Quad 2-Channel Multiplexer with 3-State Outputs
MC74HC257 Quad 2-Channel Muliplexer wih 3-ae Oupus The MC74HC257 is an advanced high speed CMO quad 2 channel muliplexer fabricaed wih silicon gae CMO echnology. I achieves high speed operaion similar
MC10ELT22, MC100ELT V Dual TTL to Differential PECL Translator
5.0 V Dual TTL to Differential PECL Translator The MC0ELT/00ELT22 is a dual TTL to differential PECL translator. Because PECL (Positive ECL) levels are used only +5 V and ground are required. The small
MC74AC132, MC74ACT132. Quad 2 Input NAND Schmitt Trigger
MC74AC32, MC74ACT32 Quad 2 Input NAND Schmitt Trigger The MC74AC/74ACT32 contains four 2 input NAND gates which are capable of transforming slowly changing input signals into sharply defined, jitter free
MM74HC373 3-STATE Octal D-Type Latch
3-STATE Octal D-Type Latch General Description The MM74HC373 high speed octal D-type latches utilize advanced silicon-gate CMOS technology. They possess the high noise immunity and low power consumption
MM74HC373 3-STATE Octal D-Type Latch
MM74HC373 3-STATE Octal D-Type Latch General Description The MM74HC373 high speed octal D-type latches utilize advanced silicon-gate CMOS technology. They possess the high noise immunity and low power
MC74VHC245. Octal Bus Buffer/Line Driver
MC74HC245 Octal Bus Buffer/Line Driver The MC74HC245 is an advanced high speed CMOS octal bus transceiver fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent
MC74VHC14. Hex Schmitt Inverter
MC74HC4 Hex Schmitt Inverter The MC74HC4 is an advanced high speed CMOS Schmitt inverter fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky
MM74HC175 Quad D-Type Flip-Flop With Clear
Quad D-Type Flip-Flop With Clear General Description The MM74HC175 high speed D-type flip-flop with complementary outputs utilizes advanced silicon-gate CMOS technology to achieve the high noise immunity
MC74ACT Input Universal Shift/Storage Register with Synchronous Reset and Common I/O Pins
8 Input Universal Shift/Storage Register with Synchronous Reset and Common I/O Pins The MC74ACT323 is an 8-bit universal shift/storage register with3-state outputs. Its function is similar to the MC74ACT299
Octal 3-State Noninverting Transparent Latch
SL74HC73 Octal 3-State Noninverting Traparent Latch High-Performance Silicon-Gate CMOS The SL74HC73 is identical in pinout to the LS/ALS73. The device inputs are compatible with standard CMOS outputs;
MC74AC259, MC74ACT Bit Addressable Latch
8 Bit Addressable Latch The MC74AC259/74ACT259 is a high speed 8 bit addressable latch designed for general purpose storage applicatio in digital systems. It is a multifunctional device capable of storing
MM74HC573 3-STATE Octal D-Type Latch
MM74HC573 3-STATE Octal D-Type Latch General Description The MM74HC573 high speed octal D-type latches utilize advanced silicon-gate P-well CMOS technology. They possess the high noise immunity and low
NTE74HC173 Integrated Circuit TTL High Speed CMOS, 4 Bit D Type Flip Flop with 3 State Outputs
NTE74HC173 Integrated Circuit TTL High Speed CMOS, 4 Bit D Type Flip Flop with 3 State Outputs Description: The NTE74HC173 is an high speed 3 State Quad D Type Flip Flop in a 16 Lead DIP type package that
MM74HC574 3-STATE Octal D-Type Edge-Triggered Flip-Flop
3-STATE Octal D-Type Edge-Triggered Flip-Flop General Description The MM74HC574 high speed octal D-type flip-flops utilize advanced silicon-gate P-well CMOS technology. They possess the high noise immunity
MC74AC138, MC74ACT of 8 Decoder/Demultiplexer
1 of 8 Decoder/Demultiplexer The MC74AC138/74ACT138 is a high speed 1 of 8 decoder/demultiplexer. This device is ideally suited for high speed bipolar memory chip select address decoding. The multiple
Dual D Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS
TECHNICAL DATA IN74ACT74 Dual D Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS The IN74ACT74 is identical in pinout to the LS/ALS74, HC/HCT74. The IN74ACT74 may be used as a level converter
BCD-TO-DECIMAL DECODER HIGH-VOLTAGE SILICON-GATE CMOS IW4028B TECHNICAL DATA
TECHNICAL DATA BCD-TO-DECIMAL DECODER HIGH-OLTAGE SILICON-GATE CMOS IW4028B The IW4028B types are BCD-to-decimal or binary-tooctal decoders consisting of buffering on all 4 inputs, decoding-logic gates,
MM74HC157 Quad 2-Input Multiplexer
Quad 2-Input Multiplexer General Description The MM74HC157 high speed Quad 2-to-1 Line data selector/multiplexers utilizes advanced silicon-gate CMOS technology. It possesses the high noise immunity and
MM74HC151 8-Channel Digital Multiplexer
8-Channel Digital Multiplexer General Description The MM74HC151 high speed Digital multiplexer utilizes advanced silicon-gate CMOS technology. Along with the high noise immunity and low power dissipation
MC14027B. Dual J K Flip Flop
M4027B Dual Flip Flop The M4027B dual flip flop has independen,, lock (), Se (S) and Rese (R) inpus for each flip flop. These devices may be used in conrol, regiser, or oggle funcio. Feaures Diode Proecion
MC74HC390. Dual 4 Stage Binary Ripple Counter with 2 and 5 Sections. High Performance Silicon Gate CMOS
Dual 4Sage Binary Ripple ouner wih 2 and 5 Secions HighPerformance Siliconae OS The 54/74H30 is idenical in pinou o he LS30. The device inpus are compaible wih sandard OS oupus; wih pullup resisors, hey
MC74LV594A. 8-Bit Shift Register with Output Register
8-Bit Shift Register with Output Register The MC74LV594A is an 8 bit shift register designed for 2 V to 6.0 V V CC operation. The device contain an 8 bit serial in, parallel out shift register that feeds
74LS195 SN74LS195AD LOW POWER SCHOTTKY
The SN74LS95A is a high speed 4-Bit Shift Register offering typical shift frequencies of 39 MHz. It is useful for a wide variety of register and counting applications. It utilizes the Schottky diode clamped
PI5A3157. SOTINY TM Low Voltage SPDT Analog Switch 2:1 Mux/Demux Bus Switch. Features. Descriptio n. Applications. Connection Diagram Pin Description
PI53157 OINY M Low Volage PD nalog wich 2:1 Mux/Demux Bus wich Feaures CMO echnology for Bus and nalog pplicaions Low ON Resisance: 8-ohms a 3.0V Wide Range: 1.65V o 5.5V Rail-o-Rail ignal Range Conrol
MM74HC374 3-STATE Octal D-Type Flip-Flop
3-STATE Octal D-Type Flip-Flop General Description The MM74HC374 high speed Octal D-Type Flip-Flops utilize advanced silicon-gate CMOS technology. They possess the high noise immunity and low power consumption
MM74HC251 8-Channel 3-STATE Multiplexer
8-Channel 3-STATE Multiplexer General Description The MM74HC251 8-channel digital multiplexer with 3- STATE outputs utilizes advanced silicon-gate CMOS technology. Along with the high noise immunity and
MM74HCT573 MM74HCT574 Octal D-Type Latch 3-STATE Octal D-Type Flip-Flop
February 1990 Revised May 1999 MM74HCT573 MM74HCT574 Octal D-Type Latch 3-STATE Octal D-Type Flip-Flop General Description The MM74HCT573 octal D-type latches and MM74HCT574 octal D-type flip-flop advanced
NTE74HC299 Integrated Circuit TTL High Speed CMOS, 8 Bit Universal Shift Register with 3 State Output
NTE74HC299 Integrated Circuit TTL High Speed CMOS, 8 Bit Universal Shift Register with 3 State Output Description: The NTE74HC299 is an 8 bit shift/storage register with three state bus interface capability
MC14049B, MC14050B. Hex Buffer
MC404B, MC4050B Hex Buffer The MC404B Hex Inverter/Buffer and MC4050B Noninverting Hex Buffer are constructed with MOS PChannel and NChannel enhancement mode devices in a single monolithic structure. These
MM74HCT373 MM74HCT374 3-STATE Octal D-Type Latch 3-STATE Octal D-Type Flip-Flop
MM74HCT373 MM74HCT374 3-STATE Octal D-Type Latch 3-STATE Octal D-Type Flip-Flop General Description The MM74HCT373 octal D-type latches and MM74HCT374 Octal D-type flip flops advanced silicon-gate CMOS
MC14584B. Hex Schmitt Trigger
MC4584B Hex Schmitt Trigger The MC4584B Hex Schmitt Trigger is constructed with MOS Pchannel and Nchannel enhancement mode devices in a single monolithic structure. These devices find primary use where
MC74HC373A. Octal 3 State Non Inverting Transparent Latch. High Performance Silicon Gate CMOS
Octal 3 State Non Inverting Transparent Latch High Performance Silicon Gate CMOS The MC74HC373A is identical in pinout to the LS373. The device inputs are compatible with standard CMOS outputs; with pullup
MC14020B. 14 Bit Binary Counter
M4020B 4Bi Binary ouner The M4020B 4sage binary couner is coruced wih MOS Phannel and Nhannel enhancemen mode devices in a single monolihic srucure. This par is designed wih an inpu wave shaping circui
MM74HC244 Octal 3-STATE Buffer
MM74HC244 Octal 3-STATE Buffer General Description The MM74HC244 is a non-inverting buffer and has two active low enables (1G and 2G); each enable independently controls 4 buffers. This device does not
FST Bit Bus Switch
FST32 4-Bit Bus Switch The ON Semiconductor FST32 is a quad, high performance switch. The device is CMOS TTL compatible when operating between 4 and. Volts. The device exhibits extremely low R ON and adds
High Performance Silicon Gate CMOS
High Performance Silicon Gae MOS The M7H7A is idenical in pinou o he LS7. The device inpus are compaible wih sandard MOS oupus; wih pull up resisors, hey are compaible wih LSTTL oupus. This device coiss
74HC Bit Serial Input/Serial or Parallel Output Shift Register with Latched 3 State Outputs. High Performance Silicon Gate CMOS
8 Bit Serial Input/Serial or Parallel Output Shift egister with Latched 3 State Outputs High Performance Silicon Gate CMOS The coists of an 8 bit shift register and an 8 bit D type latch with three state