NTMFS4833NT3G. Power MOSFET. 30 V, 191 A, Single N-Channel, SO-8 FL Features
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1 Power MOSFET 3 V, 191 A, Single N-Channel, SO-8 FL Features Low R S(on) to Minimize Conduction Losses Low Capacitance to Minimize river Losses Optimized Gate Charge to Minimize Switching Losses These are Pb-Free evices* Applications CPU Power elivery C-C Converters Low Side Switching MAXIMUM RATINGS ( unless otherwise stated) Parameter Symbol Value Unit rain-to-source Voltage V SS 3 V Gate-to-Source Voltage V GS ± V Continuous rain Current R JA (Note 1) Power issipation R JA (Note 1) Continuous rain Current R JA (Note ) Power issipation R JA (Note ) Continuous rain Current R JC (Note 1) Power issipation R JC (Note 1) Pulsed rain Current Steady State Operating Junction and Storage Temperature T A = C I A T A = 8 C 19 T A = C P.3 W T A = C I 1 A T A = 8 C 1 T A = C P.91 W T C = C I 191 A T C = 8 C 138 T C = C P 1 W T A = C, t p = 1 s I M 88 A T J, T STG - to +1 Source Current (Body iode) I S 14 A rain to Source dv/dt dv/dt V/ns Single Pulse rain-to-source Avalanche Energy (, V = 3 V, V GS = 1 V, I L = 3 A pk, L = 1. mh, R G = Lead Temperature for Soldering Purposes (1/8 from case for 1 s) C EAS 1. mj T L C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Surface-mounted on FR4 board using 1 sq-in pad, 1 oz Cu.. Surface-mounted on FR4 board using the minimum recommended pad size. *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLERRM/. SO-8 FLAT LEA CASE 488AA STYLE 1 V (BR)SS R S(ON) MAX I MAX 3 V G (4) 1. 1 V V (,) S (1,,3) N-CHANNEL MOSFET 191 A MARKING IAGRAM A = Assembly Location Y = Year WW = Work Week = Pb-Free Package (Note: Microdot may be in either location) evice Package Shipping NTMFS4833NT1G NTMFS4833NT3G ORERING INFORMATION SO-8 FL (Pb-Free) SO-8 FL (Pb-Free) S S S G 1/Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BR811/. 4833N AYWW /Tape & Reel Semiconductor Components Industries, LLC, 7 July, 7 - Rev. 3 1 Publication Order Number: NTMFS4833N/
2 THERMAL RESISTANCE MAXIMUM RATINGS Parameter Symbol Value Unit Junction-to-Case (rain) R JC 1. Junction-to-Ambient Steady State (Note 3) R JA 3. Junction-to-Ambient Steady State (Note 4) R JA Surface-mounted on FR4 board using 1 sq-in pad, 1 oz Cu. 4. Surface-mounted on FR4 board using the minimum recommended pad size. C/W ELECTRICAL CHARACTERISTICS ( unless otherwise specified) Parameter Symbol Test Condition Min Typ Max Unit OFF CHARACTERISTICS rain-to-source Breakdown Voltage V (BR)SS V GS = V, I = A 3 V rain-to-source Breakdown Voltage Temperature Coefficient V (BR)SS / T J 17 mv/ C Zero Gate Voltage rain Current I SS V GS = V, V S = 4 V T J = C 1 T J = 1 C 1 Gate-to-Source Leakage Current I GSS V S = V, V GS = ± V ±1 na ON CHARACTERISTICS (Note ) Gate Threshold Voltage V GS(TH) V GS = V S, I = A 1.. V Negative Threshold Temperature Coefficient V GS(TH) /T J 7.1 mv/ C rain-to-source On Resistance R S(on) V GS = 1 V to 11. V I = 3 A 1.3. I = 1 A 1.3 V GS = 4. V I = 3 A.3 3. I = 1 A.3 Forward Transconductance g FS V S = 1 V, I = 1 A 3 S CHARGES, CAPACITANCES & GATE RESISTANCE Input Capacitance C ISS Output Capacitance C OSS V GS = V, f = 1 MHz, V S = 1 V 1 Reverse Transfer Capacitance C RSS Total Gate Charge Q G(TOT) 39 8 Threshold Gate Charge Q G(TH). Gate-to-Source Charge Q GS V GS = 4. V, V S = 1 V; I = 3 A 1 Gate-to-rain Charge Q G 17 Total Gate Charge Q G(TOT) V GS = 11. V, V S = 1 V; 88 I = 3 A SWITCHING CHARACTERISTICS (Note ) A m pf nc nc Turn-On elay Time t d(on) Rise Time t r V GS = 4. V, V S = 1 V, I = 1 A, 34 Turn-Off elay Time t d(off) R G = 3. 3 Fall Time t f 17 Turn-On elay Time t d(on) Rise Time t r V GS = 11. V, V S = 1 V, 19 Turn-Off elay Time t d(off) I = 1 A, R G = 3. Fall Time t f 1. Pulse Test: pulse width 3 s, duty cycle %.. Switching characteristics are independent of operating junction temperatures. 14 ns ns
3 ELECTRICAL CHARACTERISTICS ( unless otherwise specified) Parameter Symbol Test Condition Min Typ Max Unit RAIN-SOURCE IOE CHARACTERISTICS Forward iode Voltage V S VGS = V, I S = 3 A T J = 1 C V Reverse Recovery Time t RR Charge Time t a V GS = V, dis/dt = 1 A/ s, ns ischarge Time t b I S = 3 A Reverse Recovery Charge Q RR nc PACKAGE PARASITIC VALUES Source Inductance L S -. - nh rain Inductance L -. - nh Gate Inductance L G T A = C nh Gate Resistance R G Pulse Test: pulse width 3 s, duty cycle %.. Switching characteristics are independent of operating junction temperatures. 3
4 TYPICAL PERFORMANCE CURVES I, RAIN CURRENT (AMPS) V thru 1 V V GS = 4. V 3.8 V 3. V 3.4 V 3. V 3. V.8 V V S, RAIN-TO-SOURCE VOLTAGE (VOLTS) Figure 1. On-Region Characteristics I, RAIN CURRENT (AMPS) V S 1 V T J = 1 C T J = - C V GS, GATE-TO-SOURCE VOLTAGE (VOLTS) Figure. Transfer Characteristics R S(on), RAIN-TO-SOURCE RESISTANCE ( ) R S(on), RAIN-TO-SOURCE RESISTANCE (NORMALIZE) V GS, GATE-TO-SOURCE VOLTAGE (VOLTS) Figure 3. On-Resistance vs. Gate-to-Source Voltage I = 3 A V GS = 1 V 1 T J, JUNCTION TEMPERATURE ( C) I = 3 A 1 Figure. On-Resistance Variation with Temperature 1 R S(on), RAIN-TO-SOURCE RESISTANCE ( ) I SS, LEAKAGE (na) , 1, 1, 1 V GS = 4. V 1 I, RAIN CURRENT (AMPS) Figure 4. On-Resistance vs. rain Current and Gate Voltage V GS = V 7 V GS = 11. V T J = 1 C T J = 1 C V S, RAIN-TO-SOURCE VOLTAGE (VOLTS) Figure. rain-to-source Leakage Current vs. Voltage
5 TYPICAL PERFORMANCE CURVES C, CAPACITANCE (pf) 8 7 C iss C iss 4 C rss 3 1 C oss V S = V V GS = V V GS V S GATE-TO-SOURCE OR RAIN-TO-SOURCE VOLTAGE (VOLTS) Figure 7. Capacitance Variation V GS, GATE-TO-SOURCE VOLTAGE (VOLTS) Q1 Q Q T I = 3 A Q G, TOTAL GATE CHARGE (nc) V GS Figure 8. Gate-To-Source and rain-to-source Voltage vs. Total Charge 9 t, TIME (ns) 1 1 V = 1 V I = 1 A V GS = 11. V t d(off) t f t r t d(on) IS, SOURCE CURRENT (AMPS) V GS = V R G, GATE RESISTANCE ( ) Figure 9. Resistive Switching Time Variation vs. Gate Resistance V S, SOURCE-TO-RAIN VOLTAGE (VOLTS) Figure 1. iode Forward Voltage vs. Current I, RAIN CURRENT (AMPS) 1 1 s s ms V GS = V 3 1 SINGLE PULSE 1 ms T C = C.1 R S(on) LIMIT dc 1 THERMAL LIMIT 1 PACKAGE LIMIT V S, RAIN-TO-SOURCE VOLTAGE (VOLTS) E AS, SINGLE PULSE RAIN-TO-SOURCE AVALANCHE ENERGY (mj) I = 3 A T J, STARTING JUNCTION TEMPERATURE ( C) 1 Figure 11. Maximum Rated Forward Biased Safe Operating Area Figure 1. Maximum Avalanche Energy vs. Starting Junction Temperature
6 TYPICAL PERFORMANCE CURVES 1 I, RAIN CURRENT (AMPS) 1 1 C 1 C 1 C PULSE WITH ( s) 1, 1, Figure 13. Avalanche Characteristics
7 PACKAGE IMENSIONS FN x, 1.7P (SO8 FL) CASE 488AA-1 ISSUE C.1 C.1 C 8X E b.1 C A B. c L X. C A B X 1 E1 E TOP VIEW A SIE VIEW ETAIL A e/ 1 4 K M L1. C c 3 X e ETAIL A STYLE 1: PIN 1. SOURCE. SOURCE 3. SOURCE 4. GATE. RAIN. RAIN 4 X A C SEATING PLANE NOTES: 1. IMENSIONING AN TOLERANCING PER ASME Y14.M, CONTROLLING IMENSION: MILLIMETER. 3. IMENSION 1 AN E1 O NOT INCLUE MOL FLASH PROTRUSIONS OR GATE BURRS. MILLIMETERS IM MIN NOM A.9 1. A b c BSC E.1 BSC E1..8 E e 1.7 BSC G.1.1 K L.1.1 L1..17 M SOLERING FOOTPRINT* 3X X X.9 MAX X.7 4X G BOTTOM VIEW X *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLERRM/. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORERING INFORMATION LITERATURE FULFILLMENT: Literature istribution Center for ON Semiconductor P.O. Box 13, enver, Colorado 817 USA Phone: or Toll Free USA/Canada Fax: or Toll Free USA/Canada orderlit@onsemi.com N. American Technical Support: Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: Japan Customer Focus Center Phone: ON Semiconductor Website: Order Literature: For additional information, please contact your local Sales Representative NTMFS4833N/
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