EKV MOS Transistor Modelling & RF Application


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1 HPRF MOS Modelling Workshop, Munich, February 1516, 1999 EKV MOS Transistor Modelling & RF Application Matthias Bucher, Wladek Grabinski Electronics Laboratory (LEG) Swiss Federal Institute of Technology, Lausanne (EPFL) Part I: Chargebased DC, AC and Noise Modelling Part II: RF Application PART I: Chargebased DC, AC and Noise Modelling Introduction: EKV v.6 Chargebased Static Model Quasistatic Charge & Transcapacitances Model NQS Model Noise Model Mobility Model & ShortChannel Effects MBWG 1999 EKV MOS Transistor Modelling & RF Application
2 Introduction: EKV v.6 MOS Transistor (MOST) Model Motivation: RF circuit design requires complete MOST model from DC to RF, including noise. All current levels need to be well modelled, in particular also moderate inversion. EKV v.6 in summary: A physicsbased compact MOST model in the public domain. Dedicated to analog circuit simulation for submicron CMOS. Includes weakmoderatestrong inversion modelling, doping & mobility effects, shortchannel effects, geometry and biasdependent matching. Small number of intrinsic model parameters: EKV v.6: <, BSIM3v3: > 65, MM9: > 55 MBWG 1999 EKV MOS Transistor Modelling & RF Application 3 Chargebased Static Model B p+ V S V G V D G S L n+ n+ L eff D t ox x V G G V S D S VD B y p substrate Bulkreference, symmetric model structure. Drain current expression including drift and diffusion: dv ch = W µ ( Q I ) dx (1) MBWG 1999 EKV MOS Transistor Modelling & RF Application 4
3 Chargebased Static Model Q I C ox Inversion Charge Density n V P g ms β B A V S I D β strong inversion E D V D C V P = I F I R g md β weak inversion V ch W eff β = µ C ox Channel Voltage L eff Integration of V D Q I Q I = β d V = ch V S C ox from source to drain: β V S Q I d V ch C ox I F ( V P V S ) β V D Q I d V ch C ox I R ( V P V D ) () MBWG 1999 EKV MOS Transistor Modelling & RF Application 5 Drain Current Normalization and Pinchoff Voltage Current normalization using the Specific current : I S = I F I R = I S ( i f i r ) = nβu T ( ) i f i r (3) Pinchoff voltage V P accounts for... threshold voltage V TO and substrate effect γ qε s N sub = ( ) C ox γ V P V G V TO γ V G V + TO Ψ +  γ = Ψ +  (4) Slope factor n: n 1 V P = = V G γ Ψ + V P (5) MBWG 1999 EKV MOS Transistor Modelling & RF Application 6
4 Chargebased Static Model g ms U T / asymptotes analytical numerical (GAMMA=.7 V) i f = / I S 1/ if g ms U T / analytic interpolation measured characteristics for:.5 µm, GAMMA=.64 V.7 µm, GAMMA=.75 V 1 µm, GAMMA=.7 V / I S Normalized transconductancetocurrent ratio vs. normalized current I S from weak through moderate to strong inversion. Comparison with numerical solution of the Poisson equation. Comparison with three different CMOS processes (longchannel devices in saturation). Almost technology independent! g ms U T MBWG 1999 EKV MOS Transistor Modelling & RF Application 7 Drain Current and Pinchoff Voltage [A] nchannel W=1 µm L=1 µm V D =3V VS=V.5V 1V 1.5V V G [V] I S V S [V] simulated measured 1 W=µm L=.7µm W=µm L=µm 3 V G [V] nchannel VTO=.75 V GAMMA=.755 V PHI=.576 V LETA=.53 WETA=.56 4 W=.8µm L=µm 5 Valid from weak to strong inversion, and from linear to saturation. Accuracy of weak inversion slope and substrate effect. no additional parameters used for adapting weak inversion slope MBWG 1999 EKV MOS Transistor Modelling & RF Application 8
5 Quasistatic Charge & Transcapacitances Model Charges normalized to WLCox [V] QB QG (VD=V) QG (VD=V) QS, QD (VD=V) QS & QD (VD=V) C OX = C ox W L Node charges: integration of inversion charge density along channel: L Q I = W Q I ( x) dx Q D = W x L  Q I ( x ) dx Q S = Q I Q D n 1 Q B = γ C OX V P + Ψ Q n I Q G = Q I Q B Q ox Drain and source charges are obtained using Ward s charge partitioning scheme. Single equation expressions are used from weak to strong inversion. VG [V] L (6) (7) MBWG 1999 EKV MOS Transistor Modelling & RF Application 9 (Trans)Capacitances Model Intrinsic Capacitances C/(C ox WL) T OX =6.6nm V D =V S =V W=µm, L=5µm C GG C GD =C GS C GB 1 V G [V] Simulated: Measured: 3 Normalized intrinsic capacitances CGD (VG=V) CBD (VG=V) CGD (VG=.8V) CBD (VG=.8V) CGS (VG=V) CGS (VG=.8V) CGB (VG=.8V) CGB (VG=V) VDB [V] Transcapacitances: derivation with respect to the terminal voltage: C MN = ± ( Q M ) MN, = G, D, S, B Accurate capacitances through all inversion levels. Symmetric C GS and C GD at V D =V S =. V N (8) MBWG 1999 EKV MOS Transistor Modelling & RF Application 1
6 Intrinsic MOST  Small Signal Equivalent G Cgs Ymg Vg Cgd S Yms Vs Cgb D Transcapacitances are not shown Ymd Vd Cbs Cbd Distributed time constant accounting for transmission line effect B Firstorder model for the transadmittances using biasdependent time constant : τ i d Y mgds (,, ) v ( gds,, ) g mgds (,, ) = with τ = τ 1+ s τ fi ( f, i r ) L τ = µ U T (9) (1) MBWG 1999 EKV MOS Transistor Modelling & RF Application 11 NonQuasistatic Model mag(y1) phase(y1) C (QS) Q (QS) C (QS) Q: charge C: capacitance Model: W/L=36x9/ C (NQS) Q (NQS) Q (NQS) C (NQS) Q (QS) Intrinsic MOST: effect of QS/NQS models on chargestranscapacitances and capacitancesonly models. Y1 Phase prediction is similar for all models except Conly QS model. Y1 Magnitude prediction is incorrect for Q (QS) and C (QS) models. MBWG 1999 EKV MOS Transistor Modelling & RF Application 1
7 Noise Model 3Feb99 13:54:9 File : noise.cou ELDO v4.6_1.1 (production) : * M.BUCHER  LEG/DE/EPFL DB(INOISE)_1:3 DB(INOISE)_:3 DB(INOISE)_3:3 DB(INOISE)_4:3 db db DB(INOISE)_5:3 input noise PSD 5e1 1e+1 1e+ 1e+3 1e+4 1e+5 1e+6 Hz DB(ONOISE)_1:3 DB(ONOISE)_:3 DB(ONOISE)_3:3 DB(ONOISE)_4:3 DB(ONOISE)_5:3 output noise PSD Noise PSD [dbv/ Hz] f = 1kHz KF = (no 1/f noise) LEVEL 3 EKV model V DS [V] e1 1e+1 1e+ 1e+3 1e+4 1e+5 1e+6 Hz Thermal noise is proportional to total inversion charge. Valid for all inversion levels, and from linear to saturation. 1/f noise modelling included. Q I MBWG 1999 EKV MOS Transistor Modelling & RF Application 13 Mobility Model 14x16 4x nchannel W=L=1µm V DS =5 V 3 pchannel W=L=1µm V DS =5 V EKV v.6 for.5um CMOS (NMOS, PMOS) 4 V B = V B =1.5V Measured Simulated 1 V B = V B =1.5V Measured Simulated V GS V GS Field and positiondependent mobility: µ ( x) µ ' = where: E E eff ( x) eff ( x) E = Q' B ( x) + η Q' inv ( x) ε ε si (11) One parameter: E vertical critical field in the oxide η = 1 η = 1 3 for nchannel, for pchannel) No backbias dependence needed due to inclusion of bulk charge. MBWG 1999 EKV MOS Transistor Modelling & RF Application 14
8 Shortchannel Effects 3.5x13 [A] nchannel W=1 µm L=.5 µm V S = V VG=3V.5V V 1.5V 1V V T [mv] Measure Simulation L drawn [µm] g ds [A/V] V D [V] [A] 1  nchannel 13 W=1 µm L=.5 µm 14 V D =3V VS=V.5V 1V 1.5V V G [V] 3. I S Includes shortchannel effects (here:.5um CMOS) Velocity saturation, Channel length modulation (CLM), Dcharge sharing, RSCE MBWG 1999 EKV MOS Transistor Modelling & RF Application 15 Summary EKV v.6 MOST model is a chargebased compact model Continuous, physicsbased and valid for all bias conditions. Includes chargebased static and dynamic models, and noise. Nonquasistatic (NQS) model for smallsignal. Availability early 99: Eldo, SmartSpice, Saber, Spectre, HSpice, PSpice, Aplac, Smash (check model versions). EKV v.6 on the web: < MBWG 1999 EKV MOS Transistor Modelling & RF Application 16
9 PART II: RF Application of the EKV v.6 MOST Model Intrinsic MOST and Extrinsic Parasitic Elements RF Test Structure Simulation and Measurement Environment DC Measurements and Simulations RF Measurements and Simulations MBWG 1999 EKV MOS Transistor Modelling & RF Application 17 Intrinsic MOST and Extrinsic Parasitic Elements Structure of the MOST Corresponding smallsignal EKV model G Lov S intrinsic part G Lov D Cgso Rg intrinsic part Cgs Cgd Ymg Vg Cgbo Cgdo As L W Ad S Rs gs Cjs Yms Vs Ymd Vd Cbs Cgb Cbd Cjd gd Rd D B C js(d) = A s(d) * C j + P s(d) * C jsw C ov = W * L ov * C ox P s, P d  perimeter A s, A d  area Rb MBWG 1999 EKV MOS Transistor Modelling & RF Application 18
10 Simulation and Measurement Environment Measurements: HP851 and HP 8719 Network Analyzers HP4145 and HP4156 DC Parameter Analyzers Cascade HF Probe Station GroundSignalGround (GSG) probes Test Devices: RF MOS transistor matrix with 36 parallel devices in GSG pad frame Geometry of single circular MOST: L =.5 um, W = 9.um OPEN pad frame for deembedding thru Y parameters Parameter Extraction and Simulation: ICCAP 5 ELDO v4.6 with EKV v.6 (LEVEL=44) MBWG 1999 EKV MOS Transistor Modelling & RF Application 19 RF Test Structure courtesy A.S. Porret The GSG pad frame and matrix of the RF MOSTs Minimized extrinsic drain capacitance using circular layout MBWG 1999 EKV MOS Transistor Modelling & RF Application
11 DC Measurements and Simulations vs. V G g m vs. V G Transfer current and conductance characteristics VD = 5mV MBWG 1999 EKV MOS Transistor Modelling & RF Application 1 DC Measurements and Simulations vs. V D g ds vs. V D Output current and conductance characteristics MBWG 1999 EKV MOS Transistor Modelling & RF Application
12 RF Measurements and Simulations S11, S S1, S1 S1 S S1 S11 Measured deembedded and simulated Sparameters Frequency sweep 45MHz  GHz DC bias VG = 1.5 V VD = 3.V MBWG 1999 EKV MOS Transistor Modelling & RF Application 3 RF Measurements and Simulations Re(Y1) Im(Y1) Real and Imaginary parts of the forward admittance Y 1 MBWG 1999 EKV MOS Transistor Modelling & RF Application 4
13 RF Measurements and Simulations Re(Y 11 ) Re(Y ) Real parts of the input and output admittances Y 11, Y MBWG 1999 EKV MOS Transistor Modelling & RF Application 5 RF Measurements and Simulations G max Maximum power gain G max MBWG 1999 EKV MOS Transistor Modelling & RF Application 6
14 Summary Application of the physicsbased EKV v.6 MOST model for RF simulation has been presented DC parameter set was verified on the RF MOST test structure measurements The smallsignal characteristics were corrected for interconnections and bond pads parasitics Effective gate and bulk (substrate) resistances were introduced to allow proper small signal simulation Simulated smallsignal S and Y parameters match onthewafers measurements over wide range of frequencies (45MHz  GHz) MBWG 1999 EKV MOS Transistor Modelling & RF Application 7
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