EE105  Fall 2005 Microelectronic Devices and Circuits


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1 EE105  Fall 005 Microelectronic Devices and Circuits ecture 7 MOS Transistor Announcements Homework 3, due today Homework 4 due next week ab this week Reading: Chapter 4 1
2 ecture Material ast lecture Diode currents MOS capacitor This lecture MOS transistor Models 3 MOS CV Curve Q G Cox C Cox Q ( V N GB Q B,max V ( GB V V GB V FB V Tn V FB V Tn Smallsignal capacitance is slope of QV curve Capacitance is linear in accumulation and inversion Capacitance is depletion region is smallest Capacitance is nonlinear in depletion 4
3 CV Curve Equivalent Circuits Cox C ox C dep Cox ε s CdepCox C Cdep = ox Cox Ctot = = = xdep Cdep + C Cdep ε s t ox ox C ε ox x ox dep In accumulation mode the capacitance is just due to the voltage drop across t ox In inversion the incremental charge comes from the inversion layer (depletion region stops growing. In depletion region, the voltage drop is across the oxide and the depletion region 5 MOSFET Cross Section gate body source drain diffusion regions p+ n+ n+ ptype substrate Add two junctions around MOS capacitor The regions forms PN junctions with substrate MOSFET is a four terminal device The body is usually grounded (or at a DC potential For ICs, the body contact is at surface 6 3
4 MOSFET ayout B S G D contact B S G D poly gate p+ n+ n+ ptype substrate x j W Planar process: complete structure can be specified by a D layout Design engineer can control the transistor width W and Process engineer controls t ox, N a, x j, etc. 7 PMOS & NMOS B S G D B S G D p+ n+ n+ x j n+ p+ p+ x j ptype substrate ntype substrate PMOS A MOSFET by any other name is still a MOSFET: NMOS, PMOS, nmos, pmos NFET, PFET IGFET Other flavors: JFET, MESFET CMOS technology: The ability to fabricated NMOS and PMOS devices simultaneously 8 4
5 CMOS B S G D B S G D p+ n+ n+ x j n+ p+ p+ x j ptype substrate ntype substrate PMOS ptype substrate Complementary MOS: Both P and N type devices Create a ntype body in a ptype substrate through compensation. This new region is called a well. To isolate the PMOS from the NMOS, the well must be reverse biased (pn junction 9 Circuit Symbols The symbols with the arrows are typically used in analog applications The body contact is often not shown The source/drain can switch depending on how the device is biased (the device has inherent symmetry 10 5
6 Observed Behavior: I D V GS I DS I DS V DS V GS Current zero for negative gate voltage Current in transistor is very low until the gate voltage crosses the threshold voltage of device (same threshold voltage as MOS capacitor Current increases rapidly at first and then it finally reaches a point where it simply increases linearly V T V GS 11 Observed Behavior: I D V DS IDS / k VGS = 4V nonlinear resistor region constant current I DS V DS resistor region VGS = 3V V GS VGS = V V DS For low values of drain voltage, the device is like a resistor As the voltage is increases, the resistance behaves nonlinearly and the rate of increase of current slows Eventually the current stops growing and remains essentially constant (current source 1 6
7 inear Region Current V GS p+ NMOS > V Tn S n+ n+ ptype G Inversion layer channel 100mV If the gate is biased above threshold, the surface is inverted This inverted region forms a channel that connects the drain and gate If a drain voltage is applied positive, electrons will flow from source to drain D x y 13 MOSFET inear Region The current in this channel is given by I = Wv Q DS y N The charge proportional to the voltage applied across the oxide over threshold Q = C ( V V N ox GS Tn I = Wv C ( V V DS y ox GS Tn If the channel is uniform density, only drift current flows vy = µ ne y Ey = W I = DS ncox( VGS VTn VGS > VTn µ V 100mV DS 14 7
8 MOSFET: Variable Resistor Notice that in the linear region, the current is proportional to the voltage I = W DS ncox( VGS VTn µ Can define a voltagedependent resistor R eq 1 = = = R ( VGS I µ C ( V V W W DS n ox GS Tn This is a nice variable resistor, electronically tunable! 15 MOSFET: Variable Resistor Notice that in the linear region, the current is proportional to the voltage I = W DS ncox( VGS VTn µ Can define a voltagedependent resistor R eq 1 = = = R ( VGS I µ C ( V V W W DS n ox GS Tn This is a nice variable resistor, electronically tunable! 16 8
9 Finding I D = f (V GS, V DS Approximate inversion charge Q N (y: drain is higher than the source less charge at drain end of channel 17 Inversion Charge at Source/Drain Q ( y Q ( y = 0 + Q ( y N N N = Q N ( Tn y = 0 = Cox ( VGS V Q N ( y = = C V V ox ( GD Tn V GD = V GS V DS 18 9
10 Average Inversion Charge Source End Drain End Cox ( VGS VT + Cox( VGD VT QN ( y Cox( VGS VT + Cox ( VGS VSD VT QN ( y Cox(VGS VT CoxVSD QN( y = Cox( VGS VT Charge at drain end is lower since field is lower Simple approximation: In reality we should integrate the total charge minus the bulk depletion charge across the channel 19 Drift Velocity and Drain Current ongchannel assumption: use mobility to find v µ n vy ( = µ ney ( µ n( V/ y = Substituting: ID = WvQN Wµ Cox( VGS VT W I C ( V V V µ D ox GS T DS Inverted Parabolas 0 10
11 Squareaw Characteristics TRIODE REGION Boundary: what is I D,SAT? SATURATION REGION 1 The Saturation Region When V DS > V GS V Tn, there isn t any inversion charge at the drain according to our simplistic model Why do curves flatten out? 11
12 Squareaw Current in Saturation Current stays at maximum (where V DS = V GS V Tn = V DS,SAT W I = C ( V V V µ D ox GS T DS W VGS VT I DS, sat Cox( VGS VT ( VGS VT µ = W µ Cox IDS, sat = ( VGS VT Measurement: I D increases slightly with increasing V DS model with linear fudge factor W µ C I V V V ox DS, sat= ( GS T (1 +λ DS 3 Pinching the MOS Transistors Depletion Region VGS > VTn S G D p+ n+ n+ VGS VTn ptype V DS NMOS PinchOff Point When V DS > V DS,sat, the channel is pinched off at drain end (hence the name pinchoff region Drain mobile charge goes to zero (region is depleted, the remaining elecric field is dropped across this highfield depletion region As the drain voltage is increases further, the pinch off point moves back towards source Channel ength Modulation: The effective channel length is thus reduced higher I DS 4 1
13 ShortChannel MOSFET Model Channel (inversion charge: neglect reduction at drain Velocity saturation defines V DS,SAT =E sat = constant Drain current: v sat / µ n I = WvQ = W ( v [ C ( V V D, SAT N sat ox GS Tn E sat = 10 4 V/cm, = 0.1 µm V DS,SAT = 0.1 V! ], I = v WC ( V V (1 + λ V D, SAT sat ox GS Tn n DS 5 inear IV Characteristics: shortchannel MOSFET 6 13
14 I D versus V DS 6 x Resistive VGS=.5 V Saturation VGS=.0 V 4.5 x VGS=.5 V VGS=.0 V I D (A 3 V DS = V GS V T VGS= 1.5 V I D (A 1 VGS= 1.5 V 1 VGS= 1.0 V 0.5 VGS= 1.0 V V DS (V ong Channel V DS (V Short Channel 7 14
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