Smart Highside Power Switch

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1 Smar ighside Power Swich Feaures Overload proecion Curren limiaion Shor circui proecion Thermal shudown Overvolage proecion (including load dump) Fas demagneizaion of inducive loads Reverse baery proecion ) Undervolage and overvolage shudown wih auoresar and hyseresis Open drain diagnosic oupu Open load deecion in ONsae CMOS compaible inpu oss of ground and loss of proecion Elecrosaic discharge (ESD) proecion Applicaion µc compaible power swich wih diagnosic feedback for 2 and 2 DC grounded loads Mos suiable for inducive loads Replaces elecromechanical relays, fuses and discree circuis PROFET BTS 0 F2 Produc Summary Overvolage proecion (AZ) 6 Operaing volage (on) Onsae resisance RON 220 mω oad curren (SO) (SO).8 A Curren limiaion (SCr) 2.7 A Sandard General Descripion N channel verical power FET wih charge pump, ground referenced CMOS compaible inpu and diagnosic feedback, monolihically inegraed in Smar SPMOS echnology. Providing embedded proecive funcions. TO220AB/ Sraigh leads SMD olage source Overvolage proecion Curren limi Gae proecion + ogic 2 ESD olage sensor ogic Charge pump evel shifer Recifier imi for unclamped ind. loads Open load deecion Temperaure sensor oad Signal Shor circui deecion PROFET oad ) Wih exernal curren limi (e.g. resisor R =0 Ω) in connecion, resisors in series wih and connecions, reverse load curren limied by conneced load. Semiconducor Group of 200Oc0

2 Pin Symbol Funcion ogic ground BTS 0 F2 2 npu, acivaes he power swich in case of logical high signal + Posiive power supply volage, he ab is shored o his pin S Diagnosic feedback, low on failure (oad, ) O Oupu o he load Maximum Raings a Tj = 2 C unless oherwise specified Parameer Symbol alues Uni Supply volage (overvolage proecion see page ) 6 oad dump proecion 2 ) oaddump = U A + s, U A =. ) oad dump 00 R ) = 2 Ω, R = 6.6 Ω, d = 00 ms, = low or high oad curren (Shor circui curren, see page ) selflimied A Operaing emperaure range T j C Sorage emperaure range T sg...+0 Power dissipaion (DC), T C 2 C P o 0 W nducive load swichoff energy dissipaion, single pulse = 2, T j,sar = 0 C, T C = 0 C cons. =.8 A, Z = 2., 0 Ω: E AS. J Elecrosaic discharge capabiliy (ESD) (uman Body Model) : all oher pins: ESD 2 k acc. MD88D, mehod 0.7 and ESD assn. sd. S.99 npu volage (DC) Curren hrough inpu pin (DC) ±.0 ma Curren hrough saus pin (DC) ±.0 see inernal circui diagrams page 6 Thermal Characerisics Parameer and Condiions Symbol alues Uni min yp max Thermal resisance chip case: juncion ambien (free air): R hjc R hja 2. 7 K/W SMD version, device on PCB ) : 2 ) Supply volages higher han (AZ) require an exernal curren limi for he and saus pins, e.g. wih a 0 Ω resisor in he connecion and a kω resisor in series wih he saus pin. A resisor for he proecion of he inpu is inegraed. ) R = inernal resisance of he load dump es pulse generaor ) oad dump is seup wihou he DUT conneced o he generaor per SO 767 and D 089 ) Device on 0mm*0mm*.mm epoxy PCB FR wih 6cm 2 (one layer, 70µm hick) copper area for connecion. PCB is verical wihou blown air. Semiconducor Group 2 200Oc0

3 Elecrical Characerisics BTS 0 F2 Parameer and Condiions Symbol alues Uni a Tj = 2 C, = 2 unless oherwise specified min yp max oad Swiching Capabiliies and Characerisics Onsae resisance (pin o ) =.6 A T j =2 C: T j =0 C: R ON mω Nominal load curren, SO Norm (pin o ) ON = 0., T C = 8 C (SO).6.8 A Oupu curren (pin ) while disconneced or pulled up, =0, = 0, see diagram page 7, Tj = C (high) ma Turnon ime o 90% : on 2 2 µs Turnoff ime o 0% : off 8 R = 2 Ω, Tj = C Slew rae on d /d on /µs 0 o 0%, R = 2 Ω, Tj = C Slew rae off 70 o 0%, R = 2 Ω, Tj = C d/d off 6 /µs Operaing Parameers Operaing volage 6 ) Tj = C: (on).7 2 Undervolage shudown Tj =2 C: Tj = C: (under) Undervolage resar Tj = C: (u rs).9 Undervolage resar of charge pump (ucp) see diagram page Undervolage hyseresis (under) = (u rs) (under) (under) 0. Overvolage shudown Tj = C: (over) 2 2 Overvolage resar Tj = C: (o rs) 0 Overvolage hyseresis Tj = C: (over) 0. Overvolage proecion 7 ) Tj = C: (AZ) 6 70 = ma Sandby curren (pin ) =0 eakage oupu curren (included in (off) ) =0 Operaing curren (Pin ) 8 ), =, Tj = C T j = C: T j = 0 C: (off) µa (off) 20 µa 2. ma 6 ) A supply volage increase up o =.6 yp wihou charge pump, 2 7 ) Meassured wihou load. See also ON(C) in able of proecion funcions and circui diagram page 7. 8 ) Add, if > 0, add, if >. Semiconducor Group 200Oc0

4 BTS 0 F2 Parameer and Condiions Symbol alues Uni a Tj = 2 C, = 2 unless oherwise specified min yp max Proecion Funcions 9) niial peak shor circui curren limi (pin o ) 0), ( max 0 µs if ON > ON(SC) ) Tj =0 C: Tj =2 C: Tj =+0 C: (SCp) Overload shudown curren limi (SCr) ON = 8, T j = T j (see iming diagrams, page ) 2.7 A Shor circui shudown delay afer inpu pos. slope ON > ON(SC), T j =0..+0 C: d(sc) 0 µs min value valid only, if inpu "low" ime exceeds 60 µs Oupu clamp (inducive load swich off) a = ON(C) = 0 ma, T j =0..+0 C: ON(C) = A, T j =0..+0 C: 7 Shor circui shudown deecion volage(pin o ) ON(SC) 8. Thermal overload rip emperaure T j 0 C Thermal hyseresis T j 0 K Reverse baery (pin o ) ) A Diagnosic Characerisics Open load deecion curren (oncondiion) T j =0..0 C: (O) 2 0 ma 9 ) negraed proecion funcions are designed o preven C desrucion under faul condiions described in he daa shee. Faul condiions are considered as ouside normal operaing range. Proecion funcions are no designed for coninuous repeiive operaion. 0 ) Shor circui curren limi for max. duraion of d(sc) max =0 µs, prior o shudown ) Requires 0 Ω resisor in connecion. The reverse load curren hrough he inrinsic drainsource diode has o be limied by he conneced load. Noe ha he power dissipaion is higher compared o normal operaing condiions due o he volage drop across he inrinsic drainsource diode. The emperaure proecion is no acive during reverse curren operaion! npu and Saus currens have o be limied (see max. raings page 2 and circui page 7). Semiconducor Group 200Oc0

5 BTS 0 F2 Parameer and Condiions Symbol alues Uni a Tj = 2 C, = 2 unless oherwise specified min yp max npu and Saus Feedback 2 ) npu urnon hreshold volage T j =0..+0 (T+). 2. npu urnoff hreshold volage T j =0..+0 (T).0 npu hreshold hyseresis (T) 0. Off sae inpu curren (pin 2), = 0. (off) 0 µa On sae inpu curren (pin 2), = (on) µa Saus invalid afer posiive inpu slope d( SC) 0 µs (shor circui) Tj= C: Saus invalid afer posiive inpu slope d() µs (open load) Tj= C: Saus oupu (open drain) Zener limi volage Tj = C, = +0 ua: low volage Tj = C, = +.6 ma: (high) (low) ) f a ground resisor R is used, add he volage drop across his resisor. Semiconducor Group 200Oc0

6 BTS 0 F2 Truh Table Normal operaion Open load Shor circui o Shor circui o Overemperaure Undervolage Overvolage npu Oupu Saus level level 2 B2 ) ) ) 0 D2 ( ) ) ) ) 0 E2/F2 ( ) ) 0 G2 ( ) ) = "ow" evel = don' care Z = high impedance, poenial depends on exernal circui = "igh" evel Saus signal afer he ime delay shown in he diagrams (see fig. page 2...) Terms 0 2 npu circui (ESD proecion) 2 PROFET R ON R ESD ZD ZD2 ZD 6 yp., ESD zener diodes are no o be used as volage clamp a DC condiions. Operaion in his mode may resul in a drif of he zener volage (increase of up o ). ) Power Transisor off, high impedance, versions BTS 0, BTS 2B: inernal pull up curren source for open load deecion. ) ow resisance shor o oupu may be deeced in ONsae by he noloaddeecion ) No curren sink capabiliy during undervolage shudown Semiconducor Group 6 200Oc0

7 Saus oupu BTS 0 F2 Overvol. and reverse ba. proecion + + Z2 R R (ON) ogic R ESD ZD Z PROFET ESDZener diode: 6 yp., max ma; R (ON) < 20 Ω a.6 ma, ESD zener diodes are no o be used as volage clamp a DC condiions. Operaion in his mode may resul in a drif of he zener volage (increase of up o ). Shor circui deecion Faul Condiion: ON > 8. yp.; high R Signal Z = 6.2 yp., Z2 = 70 yp., R = 0 Ω, R, R= kω Openload deecion ONsae diagnosic condiion: ON < R ON * (O) ; high + + ON ON ON ogic uni Shor circui deecion ogic uni Open load deecion nducive and overvolage oupu clamp Z + disconnec ON 2 ON clamped o 68 yp. PROFET PROFET Any kind of load. n case of npu=high is (T+). Due o >0, no = low signal available. Semiconducor Group 7 200Oc0

8 disconnec wih pull up 2 PROFET nducive oad swichoff energy dissipaion = E PROFET BTS 0 F2 E AS Z { R E oad E E R Any kind of load. f > (T+) device says off Due o >0, no = low signal available. disconnec wih energized inducive load high 2 PROFET Normal load curren can be handled by he PROFET iself. disconnec wih charged exernal inducive load Energy sored in load inducance: E = /2 2 While demagneizing load inducance, he energy dissipaed in PROFET is E AS = E + E E R = ON(C) i () d, wih an approximae soluion for R > 0 Ω: E AS = 2 R + (C) ) ln R (+ ( (C) ) Maximum allowable load inducance for a single swich off = f ( ); T j,sar = 0 C,T C = 0 C cons., = 2, R = 0 Ω [m] 0000 S high 2 PROFET D 000 f oher exernal inducive loads are conneced o he PROFET, addiional elemens like D are necessary [A] Semiconducor Group 8 200Oc0

9 BTS 0 F2 Typ. ransien hermal impedance chip case Z hjc = f( p, D), D= p /T Z hjc [K/W] 0 0. D= E E E E2 E E0 E p [s] Semiconducor Group 9 200Oc0

10 Opions Overview BTS 0 F2 all versions: ighside swich, npu proecion, ESD proecion, load dump and reverse baery proecion wih 0 Ω in connecion, proecion agains loss of ground Type BTS 2 B2 0D2 0E2 0F2 0G ogic version B D E F G Overemperaure proecion wih hyseresis Tj >0 C, lach funcion 6 ) 7 ) Tj >0 C, wih auoresar on cooling Shor circui o proecion swiches off when ON >. yp. and > 7 yp 6) (when firs urned on afer approx. 0 µs) swiches off when ON >8. yp. 6) (when firs urned on afer approx. 0 µs) Achieved hrough overemperaure proecion Open load deecion in OFFsae wih sensing curren 0 µa yp. in ONsae wih sensing volage drop across power ransisor Undervolage shudown wih auo resar Overvolage shudown wih auo resar 8 ) Saus feedback for overemperaure shor circui o shor o open load undervolage overvolage Saus oupu ype CMOS Open drain Oupu negaive volage ransien limi (fas inducive load swich off) 9) 9 ) 9) 9) o ON(C) oad curren limi high level (can handle loads wih high inrush currens) low level (beer proecion of applicaion) Proecion agains loss of 6 ) ach excep when < ON(SC) afer shudown. n mos cases = 0 afer shudown ( 0 only if forced exernally). So he device remains lached unless < ON(SC) (see page ). No lach beween urn on and d(sc). 7 ) Wih lach funcion. Reseed by a) npu low, b) Undervolage 8 ) No auo resar afer overvolage in case of shor circui 9 ) ow resisance shor o oupu may be deeced in ONsae by he noloaddeecion Semiconducor Group 0 200Oc0

11 BTS 0 F2 Timing diagrams Figure a: Turn on ino shor circui, Figure a: urn on: d( ) d(sc) A open drain A in case of oo early =high he device may no urn on (curve A) d( ) approx. 0 µs d(sc) approx. µs if > 8. yp. Figure b: Turn on ino overload, Figure 2a: Swiching an inducive load d() (SCp) *) (SCr) (O) *) if he ime consan of load is oo large, openloadsaus may occur eaing up may require several seconds, < 8. yp. Semiconducor Group 200Oc0

12 Figure c: Shor circui while on: BTS 0 F2 Figure a: Open load: deecion in ONsae, urn on/off o open load d() **) open **) curren peak approx. 20 µs Figure a: Overemperaure, Rese if (=low) and (T j <T j ) Figure b: Open load: deecion in ONsae, open load occurs in onsae d( O) d( O2) normal open normal T J d( O) = bd µs yp., d( O2) = bd µs yp *) goes high, when =low and Tj<Tj Semiconducor Group 2 200Oc0

13 Figure 6a: Undervolage: Figure 7a: Overvolage: BTS 0 F2 ON(C) (over) (o rs) (under) (u cp) (u rs) open drain Figure 6b: Undervolage resar of charge pump Figure 9a: Overvolage a shor circui shudown: on ON(C) (o rs) offsae onsae (over) offsae Oupu shor o shor circui shudown (u rs) (o rs) (under) (u cp) charge pump sars a (ucp) =.6 yp. Overvolage due o power line inducance. No overvolage auoresar of PROFET afer shor circui shudown. Semiconducor Group 200Oc0

14 BTS 0 F2 Package and Ordering Code All dimensions in mm Sandard TO220AB/ BTS 0 F2 Ordering code Q67060S60A2 SMD TO220AB/, Op. E062 Ordering code BTS0F2 E062A T&R: Q67060S60A TO220AB/, Opion E0 Ordering code BTS 0 F2 E0 Q67060S60A Changed since 0.96 Dae Change Mar. 997 E AS maximum raing and diagram and Z hjc diagram added ESD capabiliy (excep npu) specified o 2k, R hja SMD specified ( high) max reduced from 0 o ma Opion Overview able columns for BTS07/08 added Fig. a: ou spike a urnon added Semiconducor Group 200Oc0

15 BTS 0 F2 Published by nfineon Technologies AG, S.MarinSrasse, D8669 München nfineon Technologies AG 200 All Righs Reserved. Aenion please! The informaion herein is given o describe cerain componens and shall no be considered as a guaranee of characerisics. Terms of delivery and righs o echnical change reserved. We hereby disclaim any and all warranies, including bu no limied o warranies of noninfringemen, regarding circuis, descripions and chars saed herein. nfineon Technologies is an approved CECC manufacurer. nformaion For furher informaion on echnology, delivery erms and condiions and prices please conac your neares nfineon Technologies Office in Germany or our nfineon Technologies Represenaives worldwide (see address lis). Warnings Due o echnical requiremens componens may conain dangerous subsances. For informaion on he ypes in quesion please conac your neares nfineon Technologies Office. nfineon Technologies Componens may only be used in lifesuppor devices or sysems wih he express wrien approval of nfineon Technologies, if a failure of such componens can reasonably be expeced o cause he failure of ha lifesuppor device or sysem, or o affec he safey or effeciveness of ha device or sysem. ife suppor devices or sysems are inended o be implaned in he human body, or o suppor and/or mainain and susain and/or proec human life. f hey fail, i is reasonable o assume ha he healh of he user or oher persons may be endangered. Semiconducor Group 200Oc0

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