N channel vertical power FET in Smart SIPMOS technology. Fully protected by embedded protection functions. Overvoltage- Protection

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Clarence Shaw
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1 HITFET BTS N Feaures Logic Level Inpu Inpu Proecion (ESD) Thermal shudown Green produc (RoHS complian) Overload proecion Shor circui proecion Overvolage proecion Curren limiaion nalog driving possible Produc Summary Drain source volage V DS V On-sae resisance R DS(on) m Nominal load curren I D(Nom). Clamping energy E S 5 mj VPS5 pplicaion ll kinds of resisive, inducive and capaciive loads in swiching or linear applicaions µc compaible power swich for V DC applicaions Replaces elecromechanical relays and discree circuis General Descripion N channel verical power FET in Smar SIPMOS echnology. Fully proeced by embedded proecion funcions. Vbb M HITFET Drain Curren Limiaion Overvolage- Proecion Pin and (TB) Pin In Gae-Driving Uni ESD Overload Proecion Overemperaure Proecion Shor circui Proecion Pin Source Daashee Rev.., --

2 HITFET BTS N Maximum Raings a = 5 C, unless oherwise specified Parameer Symbol Value Uni Drain source volage V DS V Drain source volage for shor circui proecion V DS(SC) = C Coninuous inpu curren I IN m -.V V IN V V IN < -.V or V IN > V no limi I IN Operaing emperaure C Sorage emperaure T sg Power dissipaion P o. W T C = 5 C Unclamped single pulse inducive energy ) E S 5 mj Load dump proecion V ) LoadDump = V + V S V LD 5 V V IN = and V, d = ms, R I =, R L = 9, V =.5 V Elecrosaic discharge volage (Human Body Model) according o MIL STD D, mehod 5.7 and EOS/ESD assn. sandard S V ESD kv R hj Thermal resisance juncion - ambien: min. cm cooling area ) 5 7 juncion-soldering poin: R hjs 7 K/W No esed, specified by design. V Loaddump is seup wihou he DUT conneced o he generaor per ISO 77- and DIN 9 Device on 5mm*5mm*.5mm epoxy PCB FR wih cm (one layer, 7µm hick) copper area for drain connecion. PCB mouned verical wihou blown air. Daashee Rev.., --

3 HITFET BTS N Elecrical Characerisics Parameer Symbol Values Uni a = 5 C, unless oherwise specified min. yp. max. Characerisics Drain source clamp volage V DS(Z) - 55 V = , I D = m Off-sae drain curren Tj = C I DSS -.5 µ V DS = V, V IN = V Inpu hreshold volage V IN(h) V I D =. m, = 5 C I D =. m, = 5 C On sae inpu curren I IN(on) - µ On-sae resisance V IN = 5 V, I D =., = 5 C V IN = 5 V, I D =., = 5 C On-sae resisance V IN = V, I D =., = 5 C V IN = V, I D =., = 5 C Nominal load curren V DS =.5 V, < 5 C, V IN = V, T = 5 C Curren limi (acive if V DS >.5 V) ) V IN = V, V DS = V, m = µs R DS(on) I D(lim) m Device swiched on ino exising shor circui (see diagram Deerminaion of ID(lim) ). If he device is in on condi and a shor circui occurs, hese values migh be exceeded for max. 5 µs. Daashee Rev.., --

4 HITFET BTS N Elecrical Characerisics Parameer Symbol Values Uni a = 5 C, unless oherwise specified min. yp. max. Dynamic Characerisics Turn-on ime V IN o 9% I D : R L =.7, V IN = o V, V bb = V Turn-off ime V IN o % I D : R L =.7, V IN = o V, V bb = V Slew rae on 7 o 5% V bb : R L =.7, V IN = o V, V bb = V Slew rae off 5 o 7% V bb : R L =.7, V IN = o V, V bb = V on - 5 µs off - -dv DS /d on -..5 V/µs dv DS /d off -..5 Proecion Funcions ) Thermal overload rip emperaure C Inpu curren proecion mode I IN(Pro) 5 5 µ Inpu curren proecion mode I IN(Pro) - = 5 C Unclamped single pulse inducive energy ) I D =., = 5 C, V bb = V E S mj Inverse Diode Inverse diode forward volage I F = 7, m = 5 µs, V IN = V, P = µs V SD - - V Inegraed proecion funcions are designed o preven IC desrucion under faul condiions described in he daa shee. Faul condiions are considered as "ouside" normal operaing range. Proecion funcions are no designed for coninuous repeiive operaion. No esed, specified by design. Daashee Rev.., --

5 HITFET BTS N Block diagram Terms Inducive and overvolage oupu clamp V IN I IN IN HITFET R L D S I D VDS V bb V Z D S HITFET Inpu circui (ESD proecion) Shor circui behaviour Inpu Gae Drive V IN I IN Source/ Ground I D Daashee 5 Rev.., --

6 HITFET BTS N Maximum allowable power dissipaion P o = f(t S ) resp. P o = f(t R hj =7 K/W W On-sae resisance R ON = f( ); I D =.; V IN =V 5 m Po max. 7 RDS(on) 5 max. yp cm C 5 T S ;T On-sae resisance R ON = f( ); I D =.; V IN =5V C 75 Typ. inpu hreshold volage V IN(h) = f( ); I D =.5 m; V DS = V 5 m max. V. RDS(on) 5 yp. VGS(h) C C 5 Daashee Rev.., --

7 HITFET BTS N 5 Typ. ransfer characerisics I D =f(v IN ); V DS =V; T Jsar =5 C Typ. shor circui curren I D(lim) = f(tj); V DS =V Parameer: V IN ID 5 ID(lim) 7 Vin=V 5 5V 5 7 V V IN 7 Typ. oupu characerisics I D =f(v DS ); T Jsar =5 C Parameer: V IN C 75 Typ. off-sae drain curren I DSS = f( ) 7V Vin=V µ max. ID 7 5 V 5V V IDSS 9 7 V 5 yp. V V DS C 75 Daashee 7 Rev.., --

8 HITFET BTS N 9 Typ. overload curren I D(lim) = f(), V bb = V, no heasink Parameer: sar Typ. ransien hermal impedance Z hj =f( p cm cooling area Parameer: D= p /T ID(lim) - C 5 C 5 C ZhJ K/W D= C ms Single pulse s p Deerminaion of I D(lim) I D(lim) = f(); m = µs Parameer: T Jsar ID(lim) - C 5 C 5 C 5 C.... ms.55 Daashee Rev.., --

9 HITFET BTS N Package Oulines Package Oulines.5 ±. ±.. MX..±. 7±. 5 MX..5 ±. B.7 ±....5 MIN..... ±..5 M.5 M B Figure PG-SOT- (Plasic Green Small Ouline Transisor Package) GPS55 Green Produc (RoHS complian) To mee he world-wide cusomer requiremens for environmenally friendly producs and o be complian wih governmen regulaions he device is available as a green produc. Green producs are RoHS-Complian (i.e Pbfree finish on leads and suiable for Pb-free soldering according o IPC/JEDEC J-STD-). Please specify he package needed (e.g. green package) when placing an order You can find all of our packages, sors of packing and ohers in our Infineon Inerne Page Producs : hp:// Dimensions in mm Daashee 9 Rev.., --

10 HITFET BTS N Revision Hisory Revision Hisory Version Dae Changes Rev.. -- Package informaion updaed o SOT- Rev released auomoive green version Package parameer (humidiy and climaic) removed in Maximum raings EC icon added RoHS icon added Green produc (RoHS-complian) added o he feaure lis Package informaion updaed o green Green explanaion added Rev.. -- released producion version Daashee Rev.., --

11 Ediion -- Published by Infineon Technologies G 7 Munich, Germany Infineon Technologies G. ll Righs Reserved. Legal Disclaimer The informaion given in his documen shall in no even be regarded as a guaranee of condiions or characerisics ( Beschaffenheisgaranie ). Wih respec o any examples or hins given herein, any ypical values saed herein and/or any informaion regarding he applicaion of he device, Infineon Technologies hereby disclaims any and all warranies and liabiliies of any kind, including wihou limiaion warranies of non-infringemen of inellecual propery righs of any hird pary. Informaion For furher informaion on echnology, delivery erms and condiions and prices please conac your neares Infineon Technologies Office ( Warnings Due o echnical requiremens componens may conain dangerous subsances. For informaion on he ypes in quesion please conac your neares Infineon Technologies Office. Infineon Technologies Componens may only be used in life-suppor devices or sysems wih he express wrien approval of Infineon Technologies, if a failure of such componens can reasonably be expeced o cause he failure of ha life-suppor device or sysem, or o affec he safey or effeciveness of ha device or sysem. Life suppor devices or sysems are inended o be implaned in he human body, or o suppor and/or mainain and susain and/or proec human life. If hey fail, i is reasonable o assume ha he healh of he user or oher persons may be endangered.

N channel vertical power FET in Smart SIPMOS technology. Fully protected by embedded protection functions. Overvoltage- Protection

N channel vertical power FET in Smart SIPMOS technology. Fully protected by embedded protection functions. Overvoltage- Protection Feaures Logic Level Inpu Inpu Proecion (ESD) Thermal shudown Green produc (RoHS complian) Overload proecion Shor circui proecion Overvolage proecion Curren limiaion nalog driving possible Produc Summary