Data Sheet, V1.0, January 2004 BTS 5234L. Smart High-Side Power Switch PROFET Two Channels, 60 mω. Automotive Power. Never stop thinking.

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1 Daa Shee, V1.0, January 2004 PROFET Two Channels, 60 mω Auomoive Power Never sop hinking.

2 Table of Conens Page Produc Summary Overview Block Diagram Terms Pin Configuraion Pin Assignmen Pin Definiions and Funcions Elecrical Characerisics Maximum Raings Block Descripion and Elecrical Characerisics Power Sages Oupu On-Sae Resisance Inpu Circui Inducive Oupu Clamp Elecrical Characerisics Proecion Funcions Over Load Proecion Reverse Polariy Proecion Over Volage Proecion Loss of Ground Proecion Elecrical Characerisics Diagnosis ON-Sae Diagnosis OFF-Sae Diagnosis Sense Enable Funcion Elecrical Characerisics Package Oulines Revision Hisory Daa Shee 2 V1.0,

3 PROFET Produc Summary The is a dual channel high-side power swich in P-DSO-12-2 package providing embedded proecive funcions. The power ransisor is buil by a N-channel verical power MOSFET wih charge pump. The device is monolihically inegraed in Smar SIPMOS echnology. P-DSO-12-2 Operaing volage V bb(on) V Over volage proecion V bb(az) 41 V On-Sae resisance R DS(ON) 60 mω Nominal load curren (one channel acive) I L(nom) 3.5 A Curren limiaion I L(LIM) 23 A Curren limiaion repeiive I L(SCr) 6A Sandby curren for whole device wih load I bb(off) 2.5 µa Basic Feaures Very low sandby curren 3.3 V and 5 V compaible logic pins Improved elecromagneic compaibiliy (EMC) Sable behavior a under volage Logic ground independen from load ground Secure load urn-off while logic ground disconneced Opimized inverse curren capabiliy Type Ordering Code Package Q67060-S6155 P-DSO-12-2 Daa Shee 3 V1.0,

4 Proecive Funcions Reverse baery proecion wihou exernal componens Shor circui proecion Overload proecion Muli-sep curren limiaion Thermal shudown wih resar Thermal resar a reduced curren limiaion Over volage proecion wihou exernal resisor Loss of ground proecion Elecrosaic discharge proecion (ESD) Diagnosic Funcions Enhanced InelliSense signal for each channel Enable funcion for diagnosis pins (IS1 and IS2) Proporional load curren sense signal by curren source High accuracy of curren sense signal a wide load curren range Open load deecion in ON-sae by load curren sense Open load deecion in OFF-sae by volage source Feedback on over emperaure and curren limiaion in ON-sae Applicaions µc compaible high-side power swich wih diagnosic feedback for 12 V grounded loads All ypes of resisive, inducive and capaciive loads Suiable for loads wih high inrush currens, so as lamps Suiable for loads wih low currens, so as LEDs Replaces elecromechanical relays, fuses and discree circuis Daa Shee 4 V1.0,

5 Overview 1 Overview The is a dual channel high-side power swich (wo imes 60 mω) in P-DSO-12-2 power package providing embedded proecive funcions. The Enhanced InelliSense pins IS1 and IS2 provide a sophisicaed diagnosic feedback signal including curren sense funcion and open load in off sae. The diagnosis signals can be swiched on and off by he sense enable pin SEN. An inegraed ground resisor as well as inegraed resisors a each inpu pin (IN1, IN2, SEN) reduce exernal componens o a minimum. The power ransisor is buil by a N-channel verical power MOSFET wih charge pump. The inpus are ground referenced CMOS compaible. The device is monolihically inegraed in Smar SIPMOS echnology. 1.1 Block Diagram IN1 IS1 SEN channel 1 inernal power supply ESD proecion logic load curren sense gae conrol & charge pump open load deecion emperaure sensor clamp for inducive load muli sep load curren limiaion VBB OUT1 IN2 IS2 channel 2 conrol and proecion circui equivalen o channel 1 OUT2 R GND GND Figure 1 Block Diagram Daa Shee 5 V1.0,

6 1.2 Terms Following figure shows all erms used in his daa shee. Overview V bb I bb I IN1 IN1 VBB V IN1 V IN2 V IS1 V IS2 I IN2 I IS1 I IS2 I SEN IN2 IS1 IS2 SEN GND OUT1 OUT2 I L1 I L2 V DS1 V OUT1 V DS2 V OUT2 V SEN I GND Figure 2 Terms Terms2ch.emf Daa Shee 6 V1.0,

7 Pin Configuraion 2 Pin Configuraion 2.1 Pin Assignmen (op view) GND 1 12 VBB IN OUT1 IS OUT1 IS2 4 9 OUT2 IN2 5 8 OUT2 VBB 6 7 SEN hea slug (VBB) Figure 3 Pin Configuraion P-DSO Pin Definiions and Funcions Pin Symbol I/O Funcion OD 2 IN1 I Inpu signal for channel 1 5 IN2 I Inpu signal for channel 2 3 IS1 O Diagnosis oupu signal channel 1 4 IS2 O Diagnosis oupu signal channel 2 7 SEN I Sense Enable inpu for channel 1&2 10,11 OUT1 O Proeced high-side power oupu channel 1 8, 9 OUT2 O Proeced high-side power oupu channel 2 1 GND - Ground connecion 6,12, hea slug VBB - Posiive power supply for logic supply as well as oupu power supply Daa Shee 7 V1.0,

8 Elecrical Characerisics 3 Elecrical Characerisics 3.1 Maximum Raings Sresses above he ones lised here may affec device reliabiliy or may cause permanen damage o he device. Unless oherwise specified: T j = 25 C Pos. Parameer Symbol Limi Values Uni Tes min. max. Condiions Supply Volage Supply volage V bb V Supply volage for full shor circui proecion (single pulse) (T j(0) = -40 C C) V bb(sc) 0 28 V L = 8 µh, R = 0.2 Ω 1) Volage a power ransisor V DS - 52 V Supply Volage for Load Dump proecion V bb(ld) 41 V R I = 2 Ω 2) R L = 6.8 Ω Power Sages Load curren I L - I L(LIM) A - 3) Maximum energy dissipaion single pulse E AS J I L(0) = 2 A 4) T j(0) = 150 C Power dissipaion (DC) P o W T a = 85 C 5) T j 150 C Logic Pins Volage a inpu pin V IN Curren hrough inpu pin I IN Volage a sense enable pin V SEN Curren hrough sense enable pin I SEN V 2.0 ma 10 V 2.0 ma Curren hrough sense pin I IS ma 2min 2min 2min 2min Daa Shee 8 V1.0,

9 Temperaures Juncion Temperaure T j C Dynamic emperaure increase T j - 60 C while swiching Sorage Temperaure T sg C Elecrical Characerisics Unless oherwise specified: T j = 25 C Pos. Parameer Symbol Limi Values Uni Tes min. max. Condiions ESD Suscepibiliy ESD suscepibiliy HBM IN, SEN IS OUT V ESD kv according o EIA/JESD 22-A 114B 1) 2) 3) 4) 5) R and L describe he complee circui impedance including line, conac and generaor impedances Load Dump is specified in ISO 7636, R I is he inernal resisance of he Load Dump pulse generaor Curren limiaion is a proecion feaure. Operaion in curren limiaion is considered as ouside normal operaing range. Proecion feaures are no designed for coninuous repeiive operaion. Pulse shape represens inducive swich off: I L () = I L (0) * (1 - / peak ); 0 < < peak Device mouned on PCB (50 mm x 50 mm x 1.5mm epoxy, FR4) wih 6 cm 2 copper heasinking area (one layer, 70 µm hick) for V bb connecion. PCB is verical wihou blown air. Daa Shee 9 V1.0,

10 Block Descripion and Elecrical Characerisics 4 Block Descripion and Elecrical Characerisics 4.1 Power Sages The power sages are buil by a N-channel verical power MOSFET (DMOS) wih charge pump Oupu On-Sae Resisance The on-sae resisance R DS(ON) depends on he supply volage as well as he juncion emperaure T j. Figure 4 shows ha dependencies for he ypical on-sae resisance. The behavior in reverse polariy mode is described in Secion V bb = 13.5 V T j = 25 C R DS(ON) /mω T / C Figure 4 Typical On-Sae Resisance R DS(ON) /mω V bb /V Inpu Circui Figure 5 shows he inpu circui of he. There is an inegraed inpu resisor ha makes exernal componens obsolee. The curren sink o ground ensures ha he device swiches off in case of open inpu pin. The zener diode proecs he inpu circui agains ESD pulses. IN R IN I IN R GND Figure 5 Inpu Circui (IN1 and IN2) GND Inpu.emf Daa Shee 10 V1.0,

11 Block Descripion and Elecrical Characerisics A high signal a he inpu pin causes he power DMOS o swich on wih a dedicaed slope, which is opimized in erms of EMC emission. IN ON OFF V OUT 90% 70% 70% dv /d ON dv /d OFF 30% 30% 10% SwichOn.emf Figure 6 Swiching a Load (resisive) Inducive Oupu Clamp When swiching off inducive loads wih high-side swiches, he volage V OUT drops below ground poenial, because he inducance inends o coninue driving he curren. V bb VBB I L GND OUT V OUT L, R L Figure 7 Oupu Clamp (OUT1 and OUT2) OupuClamp.emf To preven desrucion of he device, here is a volage clamp mechanism implemened ha keeps ha negaive oupu volage a a cerain level (V OUT(CL) ). See Figure 7 and Figure 8 for deails. Neverheless, he maximum allowed load inducance is limied. Daa Shee 11 V1.0,

12 Block Descripion and Elecrical Characerisics V OUT V bb IN = 5V IN = 0V 0 V OUT(CL) I L InduciveLoad.emf Figure 8 Swiching an Inducance Maximum Load Inducance While demagneizaion of inducive loads, energy has o be dissipaed in he. This energy can be calculaed wih following equaion: E = ( V bb + V OUT(CL) ) V OUT(CL) ln 1 R L R L I L V OUT(CL) + I L L R L Following equaion simplifies under he assumpion of R L = 0: E = LI 2 L V bb V OUT(CL) The energy, which is convered ino hea, is limied by he hermal design of he componen. See Figure 9 for he maximum allowed energy dissipaion. 0.9 V bb = 12 V E AS /J Figure 9 Maximum energy dissipaion single pulse, T j,sar = 150 C Daa Shee 12 V1.0, I /A

13 4.1.4 Elecrical Characerisics Block Descripion and Elecrical Characerisics Unless oherwise specified: V bb = 9 V o 16 V, T j = -40 C o +150 C, ypical values: V bb = 13.5 V, T j = 25 C Pos. Parameer Symbol Limi Values Uni Tes Condiions min. yp. max. General Operaing volage V bb V V IN = 4.5 V R L = 12 Ω V DS < 0.5 V Operaing curren one channel acive all channels acive Sandby curren for whole device wih load Oupu characerisics On-Sae resisance per channel Oupu volage drop limiaion a small load currens Nominal load curren per channel one channel acive wo channels acive ISO load curren per channel one channel acive wo channels acive I GND I bb(off) R DS(ON) ma V IN = 5 V µa V IN = 0 V V SEN = 0 V T j = 25 C T j = 85 C 1) T j = 150 C mω I L = 2.5 A T j = 25 C T j = 150 C V DS(NL) 40 mv I L < 0.25 A I L(nom) I L(ISO) A T a = 85 C 2) 3) T j 150 C A T c = 85 C V DS = 0.5 V 3) Oupu clamp V OUT(CL) V I L = 40 ma Oupu leakage I L(OFF) µa V IN = 0 V curren per channel Inverse curren capabiliy -I L(inv) 3 A 1) Daa Shee 13 V1.0,

14 Block Descripion and Elecrical Characerisics Unless oherwise specified: V bb = 9 V o 16 V, T j = -40 C o +150 C, ypical values: V bb = 13.5 V, T j = 25 C Pos. Parameer Symbol Limi Values Uni Tes Condiions min. yp. max. Thermal Resisance Juncion o case R hjc K/W - 1) Juncion o ambien one channel acive all channels acive R hja K/W - 1)2) Inpu characerisics Inpu resisor R IN kω L-inpu level V IN(L) V H-inpu level V IN(H) V L-inpu curren I IN(L) µa V IN = 0.4 V H-inpu curren I IN(H) µa V IN = 5 V Timings Turn-on ime o 90% V bb ON µs R L = 12 Ω V bb = 13.5 V Turn-off ime o 10% V bb OFF µs R L = 12 Ω V bb = 13.5 V slew rae 30% o 70% V bb dv/ d ON V/µs R L = 12 Ω V bb = 13.5 V slew rae 70% o 30% V bb -dv/ d OFF V/µs R L = 12 Ω V bb = 13.5 V 1) 2) 3) No subjec o producion es, specified by design Device mouned on PCB (50 mm x 50 mm x 1.5mm epoxy, FR4) wih 6 cm 2 copper heasinking area (one layer, 70 µm hick) for V bb connecion. PCB is verical wihou blown air. No subjec o producion es, parameers are calculaed from R DS(ON) and R h Noe: Characerisics show he deviaion of parameer a he given supply volage and juncion emperaure. Typical values show he ypical parameers expeced from manufacuring. Daa Shee 14 V1.0,

15 4.2 Proecion Funcions The device provides embedded proecive funcions. Inegraed proecion funcions are designed o preven IC desrucion under faul condiions described in he daa shee. Faul condiions are considered as ouside normal operaing range. Proecion funcions are neiher designed for coninuous nor repeiive operaion Over Load Proecion The load curren I OUT is limied by he device iself in case of over load or shor circui o ground. There are hree seps of curren limiaion which are seleced auomaically depending on he volage V DS across he power DMOS. Please noe ha he volage a he OUT pin is V bb - V DS. Please refer o following figure for deails I L Figure Curren Limiaion (minimum values) V DS CurrenLimiaion.emf Curren limiaion is realized by increasing he resisance of he device which leads o rapid emperaure rise inside. A emperaure sensor for each channel causes an overheaed channel o swich off o preven desrucion. Afer cooling down wih hermal hyseresis, he channel swiches on again. Please refer o Figure 11 for deails. IN I L I L(LIM) I L(SCr) OFF(SC) Figure 11 I IS Shu Down by Over Temperaure wih Curren Limiaion In shor circui condiion, he load curren is iniially limied o I L(LIM). Afer hermal resar, he curren limiaion level is reduced o I L(SCr). The curren limiaion level is rese o I L(LIM) by swiching off he device (V IN = 0 V). OverLoad.emf Daa Shee 15 V1.0,

16 4.2.2 Reverse Polariy Proecion In case of reverse polariy, he inrinsic body diode causes power dissipaion. Addiional power is dissipaed by he inegraed ground resisor. Use following formula for esimaion of oal power dissipaion P diss(rev) in reverse polariy mode. P diss(rev) = V DS(rev) I L The reverse curren hrough he inrinsic body diode has o be limied by he conneced load. The curren hrough sense pins IS1 and IS2 has o be limied (please refer o maximum raings on Page 8). The curren hrough he ground pin (GND) is limied inernally by R GND. The over-emperaure proecion is no acive during reverse polariy Over Volage Proecion all channels ( ) 2 V bb R GND In addiion o he oupu clamp for inducive loads as described in Secion 4.1.3, here is a clamp mechanism for over volage proecion. Because of he inegraed ground resisor, over volage proecion does no require exernal componens. As shown in Figure 12, in case of supply volages greaer han V bb(az), he power ransisor swiches on and he volage across logic par is clamped. As a resul, he inernal ground poenial rises o V bb - V bb(az). Due o he ESD zener diodes, he poenial a pin IN1, IN2 and SEN rises almos o ha poenial, depending on he impedance of he conneced circuiry. VBB IN R IN ZD AZ IS SEN R SEN logic ZD ESD inernal ground R GND OUT V OUT GND Figure 12 Over Volage Proecion OverVolage.emf Loss of Ground Proecion In case of complee loss of he device ground connecions, bu conneced load ground, he securely changes o or keeps in off sae. Daa Shee 16 V1.0,

17 4.2.5 Elecrical Characerisics Unless oherwise specified: V bb = 9 V o 16 V, T j = -40 C o +150 C, ypical values: V bb = 13.5 V, T j = 25 C Pos. Parameer Symbol Limi Values Uni Tes Condiions min. yp. max. Over Load Proecion Load curren limiaion I L(LIM) A V DS = 7 V A V DS = 14 V Repeiive shor circui curren limiaion I L(SCr) 6 A T j = T 1) j(sc) Iniial shor circui shu OFF(SC) 0.84 ms T jsar = 25 C 1) down ime Thermal shu down T j(sc) C - 1) emperaure Thermal hyseresis T j 7 K - 1) Reverse Baery Drain-Source diode volage (V OUT >V bb ) Reverse curren hrough GND pin Ground Circui Inegraed Resisor in GND line Over Volage Over volage proecion Loss of GND Oupu leakage curren while GND disconneced -V DS(rev) 900 mv I L = -3.5 A V bb = V T j = 150 C -I GND 65 ma V bb = V 1) R GND Ω V bb(az) V I bb = 2 ma I L(GND) 1 ma I IN = 0, I SEN = 0, I IS = 0, 1) 2) I GND = 0 1) No subjec o producion es, specified by design 2) no connecion a hese pins Daa Shee 17 V1.0,

18 4.3 Diagnosis For diagnosis purpose, he provides an Enhanced InelliSense signal a pins IS1 and IS2. This means in deail, he curren sense signal I IS, a proporional signal o he load curren (raio k ILIS = I L / I IS ), is provided in ON-sae as long as no failure mode occurs. In case of open load in OFF-sae, he volage V IS(faul) is fed o he diagnosis pin. S OL VBB R OL IN1 gae conrol I IS1 R lim IS1 R IN V IS(faul) OUT1 µc SEN R SEN channel 1 V OUT(OL) IN2 gae conrol R IN2 R lim IS2 0 1 diagnosis I IS2 R IS1 R IS2 GND channel 2 OUT2 load Figure 13 Block Diagram: Diagnosis Sense.emf Table 1 Truh Table Operaion Mode Inpu Oupu Diagnosic Oupu Level Level SEN = H SEN = L Normal Operaion (OFF) L Z Z Z Shor Circui o GND Z Z Z Over Temperaure Z Z Z Shor Circui o V bb V bb V IS = V IS(faul) Z Open Load < V OUT(OL) > V OUT(OL) Z V IS = V IS(faul) Z Z Daa Shee 18 V1.0,

19 Table 1 Truh Table Operaion Mode Inpu Level Normal Operaion (ON) H ~V bb I IS = I L / k ILIS Z Curren Limiaion < V bb Z Z Shor Circui o GND << V bb Z Z Over Temperaure Z Z Z Shor Circui o V bb V bb I IS < I L / k ILIS Z Open Load ~V bb Z Z L = Low Level, H = High Level, Z = high impedance, poenial depends on leakage currens and exernal circui ON-Sae Diagnosis Oupu Level Diagnosic Oupu SEN = H SEN = L The sandard diagnosis signal is a curren sense signal proporional o he load curren. The accuracy of he raio (k ILIS = I L / I IS ) depends on he emperaure. Please refer o following Figure 14 for deails. Usually a resisor R IS is conneced o he curren sense pin. I is recommended o use sense resisors R IS > 500 Ω. A ypical value is 4.7 kω dummy T j = 150 C dummy T j = -40 C 6000 k ILIS I L /A Figure 14 Curren sense raio k ILIS 1) 1) The curves show he behavior based on characerizaion daa. The marked poins are guaraneed in his Daa Shee in Secion (Posiion 4.3.6). Daa Shee 19 V1.0,

20 In case of over curren as well as over emperaure, he curren sense signal is swiched off. As a resul, one hreshold is enough o disinguish beween normal and fauly operaion. Open load and over load can be differeniaed by swiching off he channel and using open load deecion in off-sae. Deails abou imings beween he diagnosis signal I IS and he oupu volage V OUT and load curren I L in ON-sae can be found in Figure 15. IN V OUT OFF ON ON I L I IS sis(on) sis( LC) Figure 15 Timing of Diagnosis Signal in ON-sae SwichOn.emf OFF-Sae Diagnosis Deails abou imings beween he diagnosis signal I IS and he oupu volage V OUT and load curren I L in OFF-sae can be found in Figure 16. IN V OUT I L ON OFF OFF Open Load I IS d(faul) s(faul) V IS(faul) / R S Figure 16 Timing of Diagnosis Signal in OFF-sae SwichOff.emf Daa Shee 20 V1.0,

21 For open load diagnosis in off sae an exernal oupu pull-up resisor (R OL ) is recommended. For calculaion of he pull-up resisor, jus he exernal leakage curren I leakage and he open load hreshold volage V OUT(OL) has o be aken ino accoun. I leakage defines he leakage curren in he complee sysem e.g. caused by humidiy. There is no inernal leakage curren from ou o ground a. V bb(min) is he minimum supply volage a which he open load diagnosis in off sae mus be ensured. To reduce he sand-by curren of he sysem, an open load resisor swich (S OL ) is recommended Sense Enable Funcion V R bb(min) V OUT(OL,max) OL = I leakage The diagnosis signals have o be swiched on by a high signal a sense enable pin (SEN). See Figure 17 for deails on he iming beween SEN pin and diagnosis signal I IS. Please noe ha he diagnosis is disabled, when no signal is provided a pin SEN. SEN I IS sis(sen) dis(sen) sis(sen) dis(sen) SEN.emf Figure 17 Timing of Sense Enable Signal The SEN pin circui is designed equal o he inpu pin. Please refer o Figure 5 for deails. The resisors R lim are recommended o limi he curren hrough he sense pins IS1 and IS2 in case of reverse polariy and over volage. Please refer o maximum raings on Page 8. The sand-by curren of he is minimized, when boh inpu pins (IN1 and IN2) and he sense enable pin (SEN) are on low level. Daa Shee 21 V1.0,

22 4.3.4 Elecrical Characerisics Unless oherwise specified: V bb = 9 V o 16 V, T j = -40 C o +150 C, V SEN = 5 V, ypical values: V bb = 13.5 V, T j = 25 C Pos. Parameer Symbol Limi Values Uni Tes Condiions min. yp. max. Open Load a OFF-Sae Open load deecion hreshold volage Sense signal in case of open load Sense signal curren limiaion Sense signal invalid afer negaive inpu slope Faul signal seling ime V OUT(OL) V V IS(faul) V V IN = 0 V V OUT = V bb I IS = 1 ma I IS(LIM) 2 ma V IN = 0 V V OUT = V bb d(faul) 1.2 ms V IN = 5V o 0V V OUT = V bb s(faul) 200 µs V IN = 0 V V OUT = 0 V o > V OUT(OL) I IS = 1 ma Load Curren Sense ON-Sae Curren sense raio k ILIS V IN = 5 V I L = 40 ma I L = 1.3 A I L = 2.2 A I L = 4.0 A T j = -40 C I L = 40 ma I L = 1.3 A I L = 2.2 A I L = 4.0 A Curren sense volage limiaion Curren sense leakage/offse curren T j = 150 C V IS(LIM) V I IS = 0.5 ma I L = 3.5 A I IS(LH) 5 µa V IN = 5 V I L = 0 A Daa Shee 22 V1.0,

23 Unless oherwise specified: V bb = 9 V o 16 V, T j = -40 C o +150 C, V SEN = 5 V, ypical values: V bb = 13.5 V, T j = 25 C Pos. Parameer Symbol Limi Values Uni Tes Condiions Curren sense leakage, while diagnosis disabled Curren sense seling ime o I IS saic ±10% afer posiive inpu slope Curren sense seling ime o I IS saic ±10% afer change of load curren min. yp. max. I IS(dis) 2 µa V SEN = 0 V I L = 3.5 A sis(on) 300 µs V IN = 0V o 5V I L = 3.5 A sis(lc) 50 µs V IN = 5 V I L = 1.3 A o 2.2 A Sense Enable Inpu resisance R SEN kω L-inpu level V SEN(L) V H-inpu level V SEN(H) V L-inpu curren I SEN(L) µa V SEN = 0.4 V H-inpu curren I SEN(H) µa V SEN = 5 V Curren sense seling ime Curren sense deacivaion ime sis(sen) 3 25 µs V SEN = 0V o 5V V IN = 0 V V OUT > V OUT(OL) dis(sen) 25 µs V SEN = 5V o 0V I L = 3.5 A R S = 5 kω 1) 1) 1) 1) No subjec o producion es, specified by design Daa Shee 23 V1.0,

24 5 Package Oulines Package Oulines P-DSO-12-2 (Plasic Dual Small Ouline Package) A ±0.1 1) 7.5 ±0.1 1) 0.1±0.05 3) ) 2.35 ± C 12x Seaing Plane 5 x 1 = 5 (1.55) 2.6 MAX. C B ±0.15 (0.2) 5 ± ± M C AB ±0.1 (1.8) (4.4) 10.3 ± B ø0.8 x Deph 4) ±0.1 (Heaslug) 4.2 ±0.1 1) 2) 3) 4) Does no include plasic or meal prorusion of 0.15 max. per side Sand OFF Sand OUT Pin 1 Index Marking; Polish finish All package corners max. R 0.25 You can find all of our packages, sors of packing and ohers in our Infineon Inerne Page Producs : hp:// SMD = Surface Mouned Device Dimensions in mm Daa Shee 24 V1.0,

25 Revision Hisory 6 Revision Hisory Version Dae Changes V iniial version Daa Shee

26 Revision Hisory Daa Shee 26 V1.0,

27 Ediion Published by Infineon Technologies AG, S.-Marin-Srasse 53, D München, Germany Infineon Technologies AG 1/31/04. All Righs Reserved. Aenion please! The informaion herein is given o describe cerain componens and shall no be considered as warraned characerisics. Terms of delivery and righs o echnical change reserved. We hereby disclaim any and all warranies, including bu no limied o warranies of non-infringemen, regarding circuis, descripions and chars saed herein. Infineon Technologies is an approved CECC manufacurer. Informaion For furher informaion on echnology, delivery erms and condiions and prices please conac your neares Infineon Technologies Office in Germany or our Infineon Technologies Represenaives worldwide. Warnings Due o echnical requiremens componens may conain dangerous subsances. For informaion on he ypes in quesion please conac your neares Infineon Technologies Office. Infineon Technologies Componens may only be used in life-suppor devices or sysems wih he express wrien approval of Infineon Technologies, if a failure of such componens can reasonably be expeced o cause he failure of ha life-suppor device or sysem, or o affec he safey or effeciveness of ha device or sysem. Life suppor devices or sysems are inended o be implaned in he human body, or o suppor and/or mainain and susain and/or proec human life. If hey fail, i is reasonable o assume ha he healh of he user or oher persons may be endangered. Daa Shee

28 hp:// Published by Infineon Technologies AG

Smart Power High-Side-Switch

Smart Power High-Side-Switch Smar Power High-Side-Swich Feaures Overload proecion Produc Summary Overvolage proecion bb(az) 4 Curren limiaion Operaing volage bb(on) 5...34 Shor circui proecion On-sae resisance R ON 35 mω Thermal shudown