Dual Low Drop Voltage Regulator TLE 7469

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1 Dual Low Drop Volage Regulaor TLE 7469 Feaures Dual oupu 5 V (±2%), 215mA and 2.6 V 1) (±4%), 200mA or 5 V (±2%), 215mA and 3.3 V (±3%), 200mA Ulra low quiescen curren consumpion < 55 µa Inhibi funcion Very low dropou volage Rese wih power-on delay Early Warning comparaor Window wachdog Power sequencing for dual volage µc Oupu proeced agains shor circui Wide operaion range: up o 45 V Wide emperaure range: -40 C o 150 C Overemperaure proecion Overload proecion Green Produc (RoHS complian) AEC Qualified Funcional Descripion The TLE 7469 is a monolihic inegraed volage regulaor wih wo volage oupus specially designed o supply microconrollers wih dual supply volage: 2.6 V 1) or 3.3 V core and 5 V I/O volage like he Infineon XC164 and XC161. 1) 2.5 V nominal specificaion range of mos µcs is compaible wih he 2.6 V oupu volage range of he TLE Type TLE 7469 GV52 TLE 7469 GV53 Package PG-DSO-12 PG-DSO-12 Daa Shee 1 Rev. 1.6,

2 The volage regulaor feaures an inegraed rese circuiry which moniors he 2.6 V/ 3.3 V supply volage. A power on he rese checks boh supply volages and performs he power-on rese wih an adjusable delay ime. The volage difference is kep in he range -0.5 V < (V Q1 - V Q2 ) < 3.0 V even during power-on and power-down ime enabling save µc operaion wihou exernal clamping. Using he inegraed early warning comparaor an exernal volage can be supervised. An inegraed oupu sink curren circuiry keeps he volage a he Q1 pin below 5.5 V even when reverse currens are applied. Thus conneced devices are proeced from overvolage damage. The regulaor can be shu down via he Inhibi inpu causing he curren consumpion o drop below 9 µa. The TLE 7469 is designed for use under he severe condiions of auomoive applicaions, and is herefore equipped wih proecion funcions agains overload, shor circui and overemperaure. I operaes in he wide juncion emperaure range from -40 C o 150 C and offers he low quiescen curren consumpion required for body applicaions. For applicaions requiring exremely low noise levels he Infineon volage regulaor family TLE 42XY and TLE 44XY is more suied han he TLE A mv-range oupu noise on he TLE 7469 caused by he charge pump operaion is unavoidable due o he ulra low quiescen curren concep. Daa Shee 2 Rev. 1.6,

3 I2 12 TLE Q2 Overemperaure Shudown Q1 Bandgap Reference 1 Rese Generaor and Window Wachdog 9 5 RO WDI Charge Pump 7 DT 8 SI INH 2 Inhibi Early Warning 4 SO I1 1 3 Q1 Overemperaure Shudown 1 Charge Pump GND 11 AEB03530_1.VSD Figure 1 Block Diagram Daa Shee 3 Rev. 1.6,

4 PG-DSO-12 I I2 INH 2 11 GND Q Q2 SO 4 9 RO WDI 5 8 SI GND 6 7 DT AEP03531.VSD Figure 2 Pin Configuraion (op view) Table 1 Pin Definiions and Funcions Pin No. Symb. Funcion 1 I1 Inpu volage 1; block o ground direcly a he IC wih a 100 nf ceramic capacior 2 INH Inhibi Inpu; low level disables he IC. Inegraed pull-down resisor 3 Q1 Oupu volage 1; 5.0 V, block o GND wih a capacior C Q1 1 µf, ESR < 6 Ω a 10 khz 4 SO Sense oupu; Oupu of Early Warning Comparaor, open collecor oupu 5 WDI Wachdog Inpu; Trigger Inpu for Wachdog pulses 6, 11 GND Ground; Pin 6, 11 and hea slug mus be conneced o GND 7 DT DT Delay iming; connec o GND, Q1 or Q2 o selec Rese and Wachdog iming 8 SI Sense inpu; Inpu for Early Warning comparaor 9 RO Rese oupu; open collecor oupu wih inegraed 20 kω pull-up resisor 10 Q2 Oupu volage 2; 2.6 V (TLE 7469 GV52), 3.3 V (TLE 7469 GV53); block o GND wih a capacior C Q2 1 µf, ESR < 6 Ω a 10 khz 12 I2 Inpu volage 2; block o ground direcly a he IC wih a 100 nf ceramic capacior Daa Shee 4 Rev. 1.6,

5 Table 2 Absolue Maximum Raings -40 C < T j < 150 C Parameer Symbol Limi Values Uni Remarks Min. Max. Inpu I1 Volage V I V Curren I I1 ma Inernally limied Inpu I2 Volage V I V Curren I I2 ma Inernally limied Oupu Q1 Volage V Q V Permanen Volage V Q V < 10 s 1) Curren I Q1 2 ma Inernally limied Oupu Q2 Volage V Q V Permanen Volage V Q V < 10 s 1) Curren I Q2 ma Inernally limied Inhibi Inpu INH Volage V INH V Observe curren limi 2) I INHmax Curren I INH -1 1 ma Rese Oupu RO Volage V RO V Permanen Volage V RO V < 10 s 1) Curren I RO ma inernally limied Delay Timing DT Volage V DT V Permanen Volage V DT V < 10 s 1) Curren I DT -5 5 ma Daa Shee 5 Rev. 1.6,

6 Table 2 Absolue Maximum Raings (con d) -40 C < T j < 150 C Parameer Symbol Limi Values Uni Remarks Min. Max. Wachdog Inpu WDI Volage V WDI V Permanen Volage V WDI V < 10 s 1) Curren I WDI ma inernally limied Sense Inpu SI Volage V SI V Observe curren limi 2) I SImax Curren I SI -1 1 ma Sense Oupu SO Volage V SO V Permanen Volage V SO V < 10 s 1) Curren I SO ma inernally limied Temperaures Juncion emperaure T j 150 C Sorage emperaure T sg C 1) Exposure o hese absolue maximum raings for exended periods ( > 10 s) may affec device reliabiliy. 2) Exernal resisor required o keep curren below absolue maximum raing when volages 5.5 V are applied. Noe: Maximum raings are absolue raings; exceeding any one of hese values may cause irreversible damage o he inegraed circui. Inegraed proecion funcions are designed o preven IC desrucion under faul condiions. Faul condiions are considered as ouside normal operaing range. Proecions funcions are no designed for coninuous repeiive operaion. Daa Shee 6 Rev. 1.6,

7 Table 3 Operaing Range Parameer Symbol Limi Values Uni Remarks Min. Max. Inpu volage V I V Inpu volage V I V V I1 > 8V Inpu volage V I V V I1 < 8V Juncion emperaure T j C Thermal Resisances PG-DSO-12 Juncion case R hjc 4.4 K/W Juncion ambien R hj-a 107 K/W PCB, only Fooprin 1) Juncion ambien R hj-a 58 K/W PCB Hea Sink Area 300 mm 2 1) Juncion ambien R hj-a 48 K/W PCB Hea Sink Area 600 mm 2 1) 1) Package mouned on PCB mm 3 ; 35µ Cu; 5µ Sn; zero airflow; 85 C ambien emperaure. Noe: In he operaing range he funcions given in he circui descripion are fulfilled. Daa Shee 7 Rev. 1.6,

8 Table 4 Elecrical Characerisics V I1 = 13.5 V; V I2 = 13.5 V; -40 C < T j < 150 C; unless oherwise specified Parameer Symbol Limi Values Uni Tes Condiion Min. Typ. Max. Oupu Q1 Oupu volage V Q V 1 ma < I Q1 < 215 ma, 6 V < V I1 < 16 V Oupu curren I Q ma V Q1 = 4.0 V limiaion Oupu drop volage; V DRQ mv I Q1 = 215 ma 1) V DRQ1 = V I1 - V Q1 Load regulaion V Q1,Lo mv 1 ma < I Q1 < 215 ma Line regulaion V Q1,Li mv I Q1 = 1 ma, 10 V < V I < 28 V Power Supply Ripple Rejecion Reverse Oupu Curren Proecion Oupu Q2 PSRR 60 db f r = 100 Hz, V r = 1 Vpp V Q,REV 5.5 V I Q,REV = 1 ma, V INH = 0 V Oupu volage V Q V 1 ma < I Q2 < 200 ma, 6 V < V I2 < 16 V, TLE 7469 GV52 Oupu volage V Q V 1 ma < I Q2 < 200 ma, 6 V < V I2 < 16 V, TLE 7469 GV53 Absolue differenial V Q1 - V Q V V Q1, V Q2 > 1 V volage Oupu curren I Q ma V Q2 = 2.0 V limiaion Load regulaion V Q2,Lo mv 1 ma < I Q2 < 200 ma Line regulaion V Q22,Li mv I Q2 = 1 ma, 10 V < V I < 28 V Power Supply Ripple Rejecion PSRR 60 db f r = 100 Hz, V r = 1 Vpp Daa Shee 8 Rev. 1.6,

9 Table 4 Elecrical Characerisics (con d) V I1 = 13.5 V; V I2 = 13.5 V; -40 C < T j < 150 C; unless oherwise specified Parameer Symbol Limi Values Uni Tes Condiion Min. Typ. Max. Curren Consumpion Quiescen curren; I q 55 µa I Q2 = I Q1 = 100 µa, I q = I I1 + I I2 - I Q1 - I Q2 T j < 80 C Quiescen curren; inhibied Inhibi Inpu INH I q 5 9 µa V INH = 0 V, T j < 80 C Turn-on Volage V INH ON 3.1 V V Q1 & V Q2 on Turn-off Volage V INH OFF 0.8 V V Q1 & V Q2 off H-inpu curren I INH ON 3 4 µa V INH = 5 V L-inpu curren I INH OFF µa V INH = 0 V, T j < 80 C Delay Timing DT Threshold Fas V DT,FAST 4.5 V Timing Selec Threshold Slow V DT,SLOW V TLE 7469 GV52 Timing Selec Threshold Slow V DT,SLOW V TLE 7469 GV53 Timing Selec Threshold Wachdog V DT,OFF 0.8 V Turn Off 2) Wachdog Inpu WDI H-inpu volage V WDIH 3.0 V hreshold L-inpu volage V WDIL 0.8 V hreshold Wachdog sampling sam ms Fas Timing ime ms Slow Timing Ignore window ime OW ms Fas Timing ms Slow Timing Open window ime OW ms Fas Timing ms Slow Timing Daa Shee 9 Rev. 1.6,

10 Table 4 Elecrical Characerisics (con d) V I1 = 13.5 V; V I2 = 13.5 V; -40 C < T j < 150 C; unless oherwise specified Parameer Symbol Limi Values Uni Tes Condiion Min. Typ. Max. Closed window ime CW ms Fas Timing ms Slow Timing Window wachdog WD ms Fas Timing rigger ime ms Slow Timing Rese Oupu RO Rese swiching hreshold 2 V RT V TLE 7469 GV52, V Q2 decreasing Rese Headroom 2 V RH mv TLE 7469 GV52 Rese swiching hreshold 2 V RT V TLE 7469 GV53, V Q2 decreasing Rese Headroom 2 V RH mv TLE 7469 GV53 Rese hyseresis 2 V RH2 45 mv TLE 7469 GV52 3) Rese swiching hreshold 1 60 mv TLE 7469 GV53 4) V RT V V Q1 decreasing Rese hyseresis 1 V RH1 90 mv Rese sink curren I RO 1 ma V Q = 5 V, V RO = 0.5 V Rese oupu low V ROL V V Q2 1 V volage Rese high volage V ROH 4.5 V Inegraed rese pullup resisor Power-up Rese delay ime R RO kω Inernally conneced o Q1 T RD ms Fas Timing (V DT 4.5 V) ms Slow Timing (V DT 3.3 V) Rese Reacion Time T RR µs Daa Shee 10 Rev. 1.6,

11 Table 4 Elecrical Characerisics (con d) V I1 = 13.5 V; V I2 = 13.5 V; -40 C < T j < 150 C; unless oherwise specified Parameer Symbol Limi Values Uni Tes Condiion Min. Typ. Max. Inpu Volage Sense Sense hreshold high V SIH V V SI increasing (see Figure 4) Sense hreshold low V SIL V V SI decreasing (see Figure 4) Sense oupu low volage Exernal SO pull-up resisor V SOL V V SI < 1.01 V; V I1 > 4.20 V; I SO = 0.5 ma R SO ex 9.2 kω V Q1 = 5V Sense inpu curren I SI µa V SI = 5 V Sense high reacion pd SO LH 4.0 µs ime Sense low reacion ime pd SO HL 4.0 µs 1) Measured when he oupu volage has dropped 100 mv from he nominal Value obained a V I1 = 13.5 V, V I2 = 13.5 V. 2) Wachdog off, Rese in slow mode. 3) Specified by design, no subjec of producion es. 4) Specified by design, no subjec of producion es. Daa Shee 11 Rev. 1.6,

12 Applicaion Informaion V Ba 47 µf e. g. Igniion Key R Vi * 100 nf 100 kω I2 INH TLE 7469 Q2 DT WDI RO 1 µf 47 µf XC 164 SI SO 10 kω 100 nf I1 GND Q1 1 µf 47 µf = Opional AEA03529_2.VSD Figure 3 Applicaion Diagram wih Typical Exernal Componens A ypical applicaion of he TLE 7469 is shown in Figure 3. To preven he regulaion loop from oscillaing a ceramic capacior of C Q1/2 1 µf is required a each of he oupus Q1 and Q2. In conras o mos low drop volage regulaors he TLE 7469 only needs moderae capaciance a he oupus and oleraes ceramic capaciors o keep he sabiliy. This offers more design flexibiliy o he circui designer enabling he IC also o operae wihou analum capaciors. Addiional a buffer capacior C B of > 10µF should be used for each oupu Q1 and Q2 o suppress influences from load surges o he volage levels. This one can eiher be an aluminum elecrolyic capacior or a analum capacior following he applicaion requiremens. A general recommendaion is o keep he drop over he equivalen serial resisor (ESR) ogeher wih he discharge of he blocking capacior below he Rese Headroom (e.g. min. 130mV for he 2.6V Oupu). Daa Shee 12 Rev. 1.6,

13 Since he regulaor oupu curren roughly rises linearly wih ime he discharge of he capacior can be calculaed as follows: dvc B = di Q *d/c B The drop across he ESR calculaes as: dv ESR = di*esr To preven a rese he following relaionship mus be fullfilled: dv C + dv ESR < V RH2 = 130mV Example: Assuming a load curren sep of di Q = 50mA, a blocking capacior of C Q = 22µF and a ypical regulaor reacion ime under normal operaing condiions of d ~ 25µs and for special dynamic load condiions, such as load sep from very low base load, a reacion ime of d ~ 75µs. dv C = di Q *d/c B = 50mA * 25µs/22µF = 54mV So for he ESR we can allow dv ESR = V RH2 - dv C = 130mV - 54mV = 76mV The permissible ESR becomes: ESR = dv ESR / di Q = 76mV/50mA = 1.52Ohm During design-in of he TLE7469 produc family, special care needs o be aken wih regards o he regulaors reacion ime o sudden load curren changes saring from very low pre-load as well as cyclic load changes. The applicaion noe TLE7x Volage Regulaors - Applicaion Noe abou Transien Response a ulra low quiescen curren Volage Regulaors (see 3_cip05405.pdf) gives imporan hins for successful design-in of he Volage Regulaors of he TLE7x family. As a dual regulaor he TLE 7469 for correc operaion should be always supplied a boh inpu pins I1 and I2 ou of one volage supply. The dual volage regulaor wih boh inpus accessible, offers he possibiliy o reduce he power dissipaion in he package. This can be achived by wo differen inpu volages or a Drop Resisor* R Vi (see Figure 3) a he inpu pin I2 for he 2.6V oupu. If one of his opions is chosen,care should be aken, o apply he device as descibed under Table 3: Operaing Range. The rese oupu RO feaures an inegraed pull-up resisor. Thus i can be direcly coupled o he microconroller rese inpu. Daa Shee 13 Rev. 1.6,

14 The sense comparaor oupu SO is an open collecor. An appropriae exernal pull-up resisor is yp. 5.6 kω 47 kω, he minimum value of 5.6 kω being defined by he max. sink curren capabiliy of he SO oupu ransisor. If he sense comparaor is no used he pull-up resisor can be spared. In his case he SI pin should be direcly conneced o Q1 in order o keep he comparaor inacive. Sense Inpu Volage V SIH V SIL Sense Oupu High PD SO LH PD SO HL Low AED02559_7469 Figure 4 Sense Timing Diagram Daa Shee 14 Rev. 1.6,

15 Circui Descripion Power On Rese In order o avoid any sysem failure, a sequence of several condiions has o be passed. When he level of V Q2 reaches he rese hreshold V RT, he signal a RO remains LOW for he Power-up rese delay ime T RD. Then a second comparaor checks wheher V Q1 V RT1 and only if his es is passed he rese oupu is swiched o HIGH. The Rese oupu is only released (se o High level) if boh oupu volages have passed heir specific rese hreshold V RT1/2. The rese funcion and iming is illusraed in Figure 5. The rese reacion ime T RR avoids wrong riggering caused by shor gliches on he V Q2 -line. For power-fail, in case of V Q2 or V Q1 power down (V Q2 < V RT2 or V Q1 < V RT1 for >T RR ) a logic LOW signal is generaed a he pin RO o rese an exernal microconroller. Daa Shee 15 Rev. 1.6,

16 V I V Q1 V RT1 V Q2 V RT2 T RR T RR V RO T RD T RD T RD V ROH V ROL AET03532.VSD Figure 5 Rese Funcion and Timing Diagram Wachdog Operaion The wachdog uses a fracion of he charge pump oscillaor s clock signal as imebase. Connecing he DT pin o Q1 or o Q2 he wachdog imebase can be adjused. The wachdog can be urned off by a low level (V DT 0.8 V) applied o he DT pin. The iming values used in his ex refer o yp. values wih DT conneced o Q1 (fas iming). Figure 6 shows he sae diagram of he window wachdog (WWD). Afer power-on, he rese oupu signal a he RO pin (microconroller rese) is kep LOW for he rese delay ime T RD of yp. 8 ms. Wih he LOW o HIGH ransiion of he signal a RO he device sars he ignore window ime CW (32 ms). During his window he signal a he WDI pin is ignored. Nex he WWD sars he open window. When a valid rigger signal is deeced during he open window a closed window is iniialized immediaely. A rigger signal wihin Daa Shee 16 Rev. 1.6,

17 he closed window is inerpreed as a prerigger failure and resuls in a rese. Afer he closed window he open window wih he duraion OW is sared again. The open window lass a minimum unil he rigger process has occurred, a maximum OW is 32 ms (yp. value wih fas iming). A HIGH o LOW ransiion of he wachdog rigger signal on pin WDI is aken as a rigger. To avoid wrong riggering due o parasiic gliches wo HIGH samples followed by wo LOW samples (sample period sam yp ms) are decoded as a valid rigger (see Figure 8). A rese is generaed (RO goes LOW) if here is no rigger pulse during he open window or if a prerigger occurs during he closed window. The riggering is correc also, if he firs hree samples (wo HIGH one LOW) of he rigger pulse a pin WDI are inside he closed window and only he fourh sample (he second LOW sample) is aken in he open window. Rese Always Ignore Window Trigger During Closed Window No Trigger During Open Window Always Trigger Closed Window Open Window No Trigger AEA03533.VSD Figure 6 Window Wachdog Sae Diagram Daa Shee 17 Rev. 1.6,

18 Vi/V VQ/V V RT VRO/V T RD Normal operaion rr T RD T RD Power Fail rr Wnd WDI/V Don care WDI during IW Ingnore Wnd OW CW OW CW OW OW CW OW 1. Correc Trigger WD,p No Trigger in OW (Wrong) Trigger in CW Figure 7 Window Wachdog Signal Flow Closed window Open window Wachdog rigger signal Open window Closed window WDI Valid WDI No valid ECW EOW = Wachdog decoder sample poin AET02952 Figure 8 Window Wachdog Definiions Daa Shee 18 Rev. 1.6,

19 Package Oulines 2.6 MAX ±0.1 (Body) STANDOFF (1.55) 7.5±0.1 1) B ± ±0.1 (Heaslug) 0.7± ± B ±0.1 1) (Mold) B (1.8 Mold) (4.4 Mold) Boom View ±0.1 (Meal) 4.2 ±0.1 (Meal) 12x 0.25 M C A B Index Marking x 1 = ±0.1 (Meal) Heaslug 1) Does no include plasic or meal prorusion of 0.15 max. per side GPS09628 Figure 9 PG-DSO-12 (Plasic Green Dual Small Ouline) Green Produc (RoHS complian) To mee he world-wide cusomer requiremens for environmenally friendly producs and o be complian wih governmen regulaions he device is available as a green produc. Green producs are RoHS-Complian (i.e Pb-free finish on leads and suiable for Pb-free soldering according o IPC/JEDEC J-STD-020). For furher packge informaion, please visi our websie: hp:// Dimensions in mm Daa Shee 19 Rev. 1.6,

20 Revision Hisory Version Dae Changes Rev Iniial version of RoHS-complian derivae of TLE 7469 Page 1: AEC cerified saemen added. Page 1 and Page 19: RoHS compliance saemen and Green produc feaure added. Page 1 and Page 19: Package changed o RoHS complian version. Rev Modificaions according o PCN No A Page 8: Parameer Oupu curren limiaion I Q2 : Max. Value modified from 500mA o 550mA. Page 3, Fig. 1 modified: RO pullup o Q1 insead o Q2. Legal disclaimer updaed. Rev Final Daashee Daa Shee 20 Rev. 1.6,

21 Ediion Published by Infineon Technologies AG Munich, Germany 2008 Infineon Technologies AG All Righs Reserved. Legal Disclaimer The informaion given in his documen shall in no even be regarded as a guaranee of condiions or characerisics. Wih respec o any examples or hins given herein, any ypical values saed herein and/or any informaion regarding he applicaion of he device, Infineon Technologies hereby disclaims any and all warranies and liabiliies of any kind, including wihou limiaion, warranies of non-infringemen of inellecual propery righs of any hird pary. Informaion For furher informaion on echnology, delivery erms and condiions and prices, please conac he neares Infineon Technologies Office ( Warnings Due o echnical requiremens, componens may conain dangerous subsances. For informaion on he ypes in quesion, please conac he neares Infineon Technologies Office. Infineon Technologies componens may be used in life-suppor devices or sysems only wih he express wrien approval of Infineon Technologies, if a failure of such componens can reasonably be expeced o cause he failure of ha life-suppor device or sysem or o affec he safey or effeciveness of ha device or sysem. Life suppor devices or sysems are inended o be implaned in he human body or o suppor and/or mainain and susain and/or proec human life. If hey fail, i is reasonable o assume ha he healh of he user or oher persons may be endangered.

5-V Low Drop Fixed Voltage Regulator TLE 4268

5-V Low Drop Fixed Voltage Regulator TLE 4268 5-V Low Drop Fixed Volage Regulaor TLE 4268 Feaures Oupu volage olerance ±2% Very low curren consumpion Low-drop volage Wachdog Seable rese hreshold Overemperaure proecion Reverse polariy proecion Shor-circui