5-V Low Drop Fixed Voltage Regulator TLE

Transcription

1 5- Low Drop Fixed oltage Regulator TLE 471- Features Output voltage tolerance ±% Low-drop voltage Integrated overtemperature protection Reverse polarity protection Input voltage up to 4 Overvoltage protection up to 65 ( 4 ms) Short-circuit proof Suitable for use in automotive electronics Wide temperature range Adjustable reset and watchdog time Green Product (RoHS compliant) AEC Qualified ^ P-TO-7-11 Functional Description The TLE 471- is functional and electrical identical to TLE 471. The device is a 5- low drop fixed voltage regulator. The maximum input voltage is 4 (65, 4 ms). Up to an input voltage of 6 and for an output current up to 55 ma it regulates the output voltage within a % accuracy. The short circuit protection limits the output current of more than 65 ma. The IC can be switched off via the inhibit input. An integrated watchdog monitors the connected controller. The device incorporates overvoltage protection and temperature protection that disables the circuit at overtemperature. P-TO-7-1 P-TO Type TLE 471- TLE 471- S TLE 471- G Package PG-TO-7-11 PG-TO-7-1 PG-TO Data Sheet 1 Rev..7, 7-6-5

2 PG-TO-7-11 PG-TO-7-1 PG-TO Ι RO D INH GND Q WI AEP1938 Ι RO D Q INH GND WI AEP1939 Ι RO D Q INH GND WI AEP17 Figure 1 Pin Configuration (top view) Table 1 Pin Definitions and Functions Pin Symbol Function 1 I Input; block to ground directly on the IC with ceramic capacitor. INH Inhibit 3 RO Reset Output; the open collector output is connected to the 5 output via an integrated resistor of 3 kω. 4 GND Ground 5 D Reset Delay; connect a capacitor to ground for delay time adjustment. 6 WI Watchdog Input 7 Q 5- Output; block to ground with µf capacitor, ESR < 3 Ω. Data Sheet Rev..7, 7-6-5

3 Circuit Description The control amplifier compares a reference voltage, which is kept highly accurate by resistance adjustment, to a voltage that is proportional to the output voltage and drives the base of a series transistor via a buffer. Saturation control as a function of the load current prevents any over-saturation of the power element. The reset output RO is in high-state if the voltage on the delay capacitor C D is greater or equal UD. The delay capacitor C D is charged with the current I D for output voltages greater than the reset threshold RT. If the output voltage gets lower than RT ( reset condition ) a fast discharge of the delay capacitor C D sets in and as soon as D gets lower than LD the reset output RO is set to low-level. The time for the delay capacitor charge from UD to LD is the reset delay time t D. When the voltage on the delay capacitor has reached UD and reset was set to high, the watchdog circuit is enabled and discharges C D with the constant current I DWD. If there is no rising edge observed at the watchdog input, C D will be discharge down to LDW, then reset output RO will be set to low and C D will be charged again with the current I DWC until D reaches UD and reset will be set high again. If the watchdog pulse (rising edge at watchdog input WI) occurs during the discharge period C D is charged again and the reset output stays high. After D has reached UD, the periodical behavior starts again. Internal protection circuits protect the IC against: Overload Overvoltage Overtemperature Reverse polarity Data Sheet 3 Rev..7, 7-6-5

4 Temperature Sensor Saturation Control and Protection Circuit Ι 1 7 Q Adjustment Bandgap Reference Control Amplifier + - Buffer Reset Generator 3 5 RO D Watchdog 6 WI INH GND AEB194 4 Figure Block Diagram Data Sheet 4 Rev..7, 7-6-5

5 Table Absolute Maximum Ratings T j = -4 to 15 C Parameter Symbol Limit alues Unit Notes Min. Max. Input oltage oltage Current Inhibit oltage oltage Current Reset Output oltage Current Reset Delay oltage Current Watchdog oltage Current Output oltage Current Ground I I I I INH INH I INH -4-4 RO -.3 I RO D -.3 I D -5 W -.3 I W -5 Q -1. I Q ma ma ma ma ma ma Current I GND -.5 A Temperatures Junction temperature Storage temperature T j T stg C C t 4 ms internally limited t 4 ms internally limited internally limited internally limited Data Sheet 5 Rev..7, 7-6-5

6 Table 3 Operating Range Parameter Symbol Limit alues Unit Notes Min. Max. Input voltage I 6 4 Junction temperature T j C Thermal Resistance Junction ambient R thja Junction case R thjc Z thjc K/W K/W K/W K/W PG-TO t < 1 ms Data Sheet 6 Rev..7, 7-6-5

7 Table 4 Characteristics I = 13.5 ; -4 C T j 15 C; INH > U,INH (unless otherwise specified) Parameter Symbol Limit alues Unit Test Condition Min. Typ. Max. Output voltage Q ma I Q 55 ma; 6 I 6 Output voltage Q I 36 ; I Q 3 ma Output current limiting Current consumption I q = I I Current consumption I q = I I Current consumption I q = I I - I Q Current consumption I q = I I - I Q Current consumption I q = I I - I Q I Qmax 65 8 ma Q = I q 6 µa INH = ; I Q = ma I q 8 µa INH = 5 ; I Q = ma I q ma I Q = 5 ma I q ma I Q = 55 ma I q 7 9 ma I Q = 55 ma; I = 5 Drop voltage dr 35 7 m I Q = 55 ma 1) Load regulation Q 5 5 m I Q = 5 to 55 ma; I = 6 Supply voltage regulation Power supply Ripple rejection Q 1 5 m I = 6 to 6 I Q = 5 ma PSRR 54 db f r = 1 Hz; r =.5 pp Data Sheet 7 Rev..7, 7-6-5

8 Table 4 Characteristics (cont d) I = 13.5 ; -4 C T j 15 C; INH > U,INH (unless otherwise specified) Parameter Symbol Limit alues Unit Test Condition Min. Typ. Max. Reset Generator Switching threshold RT Reset high voltage ROH 4.5 Saturation voltage RO,SAT 6 m R intern = 3 kω; 1. Q 4.5 Saturation voltage RO,SAT 4 m I R = 3 ma ) ; Q = 4.4 Reset pull-up R kω internally connected to Q Lower reset timing LD Q < RT threshold Charge current I D µa D = 1. Upper timing UD threshold Delay time t D ms C D = 1 nf Reset reaction time t RR 3 µs C D = 1 nf Overvoltage Protection Turn-off voltage I, ov Inhibit Turn-on voltage U,INH Q = high (> 4.5 ) Turn-off voltage L,INH Q = low (<.8 ) Inhibit current I INH µa INH = 5 Watchdog Upper watchdog UDW switching threshold Lower watchdog LDW switching threshold Discharge current I DWD µa D = 1 Charge current I DWC µa D = 1 Watchdog period t WD,P ms C D = 1 nf Data Sheet 8 Rev..7, 7-6-5

9 Table 4 Characteristics (cont d) I = 13.5 ; -4 C T j 15 C; INH > U,INH (unless otherwise specified) Parameter Symbol Limit alues Unit Test Condition Watchdog trigger time Watchdog pulse slew rate Min. Typ. Max. t WI,tr ms C D = 1 nf see diagram WI 5 /µs from % to 8% Q 1) Drop voltage = I - Q (measured when the output voltage has dropped 1 m from the nominal value obtained at 13.5 input) ) Test condition not applicable during delay time for power-on reset. Data Sheet 9 Rev..7, 7-6-5

10 Ι Ι Ι 1 7 Q 1 µ F 47 nf TLE Ι RO µ F Ι INH Ι D Ι GND D C D WI RO Q AES1941 Figure 3 Test Circuit Input Input e.g. KL 15 Reset 3 to MC Watchdog Signal from MC 47 nf 1 7 TLE nf 5 -Output µ F AES194 Figure 4 Circuit Data Sheet 1 Rev..7, 7-6-5

11 Application Description The IC regulates an input voltage in the range of 6 < I < 4 to Qnom = 5.. Up to 6 it produces a regulated output current of more than 55 ma. Above 6 the saveoperating-area protection allows operation up to 36 with a regulated output current of more than 3 ma. Overvoltage protection limits operation at 4. The overvoltage protection hysteresis restores operation if the input voltage has dropped below 36. The IC can be switched off via the inhibit input, which causes the quiescent current to drop below 1 µa. A reset signal is generated for an output voltage of Q < 4.5. The watchdog circuit monitors a connected controller. If there is no positive-going edge at the watchdog input within a fixed time, the reset output is set to low. The delay for power-on reset and the maximum permitted watchdog-pulse period can be set externally with a capacitor. Design Notes for External Components An input capacitor C I is necessary for compensation of line influences. The resonant circuit consisting of lead inductance and input capacitance can be damped by a resistor of approx. 1 Ω in series with C I. An output capacitor C Q is necessary for the stability of the regulating circuit. Stability is guaranteed at values of C Q µf and an ESR of <3Ω. Reset Circuitry If the output voltage decreases below 4.5, an external capacitor C D on pin D will be discharged by the reset generator. If the voltage on this capacitor drops below DRL, a reset signal is generated on pin RO, i.e. reset output is set low. If the output voltage rises above the reset threshold, C D will be charged with constant current. After the power-onreset time the voltage on the capacitor reaches DU and the reset output will be set high again. The value of the power-on-reset time can be set within a wide range depending of the capacitance of C D. Reset Timing The power-on reset delay time is defined by the charging time of an external capacitor C d which can be calculated as follows: t D = C D /I D (1) Definitions: C D = delay capacitor t D = reset delay time I D = charge current, typical 14 µa = UD, typical 1.8 UD = upper delay timing threshold at C D for reset delay time Data Sheet 11 Rev..7, 7-6-5

12 The reset reaction time t rr is the time it takes the voltage regulator to set the reset out LOW after the output voltage has dropped below the reset threshold. It is typically 1 µs for delay capacitor of 47 nf. For other values for C d the reaction time can be estimated using the following equation: t RR s/f C d () Ι INH t U, INH L, INH Q <t RR t RT UD D d Ι D = dt C D t RR t LD D, SAT RO t D t RO, SAT t Power Reset on Thermal Shutdown oltage Drop at Input Undervoltage at Output Secondary Spike Load Bounce Shutdown AET1985 Figure 5 Time Response Data Sheet 1 Rev..7, 7-6-5

13 Watchdog Timing WΙ Ι Q D UDW t WΙ, tr t WD, P LDW R t WD, L t WΙ, tr ( UDW - LDW ) ( UDW - LDW )( Ι DWC +Ι DWD ) ( UDW - LDW ) = C t WD, P = t WD, L= C Ι D ; DWD Ι. Ι D DWC Ι C D ; DWD DWC AES378 Figure 6 Time Response, Watchdog Behavior Data Sheet 13 Rev..7, 7-6-5

14 Typical Performance Characteristics Output oltage Q versus Temperature T j Output oltage Q versus Input oltage I ( INH = I ) Q AED198 Q 1 1 AED199 I = R L = 5 Ω C 16 T j Ι 1 Data Sheet 14 Rev..7, 7-6-5

15 Output Current Limit I Q versus Temperature T j Output Current I Q versus Input oltage I 1 ma I Q max AED193 I Q 1. A AED T j = 15 C 5 C C 16 T j Current Consumption I q versus Output Current I Q Ι q 6 ma AED Current Consumption I q versus Output Current I Q Ι q 8 ma I AED377 Ι = Ι = ma 1 Ι Q ma 6 Ι Q Data Sheet 15 Rev..7, 7-6-5

16 Current Consumption I q versus Input oltage I I q 1 ma R L = 1 Ω AED1934 Drop oltage dr versus Output Current I Q 8 m Dr T = 15 C j AED755 4 R L = Ω 5 Ω 3 1 T = 5 C j I 4 6 ma 1 Ι Q Inhibit Current I INH versus Inhibit oltage INH Ι 1 µa INH 1 8 Ι INH, on Ι INH, high AED1944 Output oltage Q versus Inhibit oltage INH Q AED1945 Ι = 13.5 Tj = 5 C 6 4 Ι = 13.5 T j = 5 C 3 Ι INH, off INH INH Data Sheet 16 Rev..7, 7-6-5

17 Inhibit Current Consumptions I INH versus Temperature T j 14 µ A Ι INH Ι INH, high Ι INH, on AED1946 Inhibit oltages INH versus Temperature T j 6 INH INH, on AED Ι INH, off INH, off C 16 T j T j Switching oltage UD and LDW versus Temperature T j.4. Ι = 13.5 AED UD, UDW LDW C 16 T j Data Sheet 17 Rev..7, 7-6-5

18 Charge Current I D, I DWC and Discharge Current I DWD versus Temperature T j I 16 µa I D, I DWC AED1949 Watchdog Pulse Time T w versus Temperature T j 8 ms T W AED195 8 I = 13.5 D = 1 4 Ι = 13.5 C D = 1 nf I DWD C C 16 T j T j Data Sheet 18 Rev..7, 7-6-5

19 Package Outlines 1 ±. 9.9 ±. A 9.8 ± ) 1.7 ± ± ±.3 1) 13.4 ± ±. 1.6 ± x ±.3 1. ±.3 7x.6 ±.1.5 M A C C 3.7± ±.4.5 ± ±.4 1) Typical All metal surfaces tin plated, except area of cut. GPT983 Figure 7 PG-TO-7-11 (Plastic Transistor Single Outline) Green Product (RoHS compliant) To meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-). You can find all of our packages, sorts of packing and others in our Infineon Internet Page Products : SMD = Surface Mounted Device Dimensions in mm Data Sheet 19 Rev..7, 7-6-5

20 1 ±. 9.8 ± ) A B ±.1 17± ±.3 1) 13.4 ± ±. C 11±.5 13 ± x.6 ± ± M A B C 1) Typical All metal surfaces tin plated, except area of cut. GPT984 Figure 8 PG-TO-7-1 (Plastic Transistor Single Outline) Green Product (RoHS compliant) To meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-). You can find all of our packages, sorts of packing and others in our Infineon Internet Page Products : SMD = Surface Mounted Device Dimensions in mm Data Sheet Rev..7, 7-6-5

21 (15) ±. 1 ±.3 1 ± ) ) A 1.7 ±.1 B ±.5.7± x.6 ±.1 6 x M A B 8 MAX..5 ±.1.1 B 1) Typical Metal surface min. X = 7.5, Y = 6.9 All metal surfaces tin plated, except area of cut. GPT9114 Figure 9 PG-TO (Plastic Transistor Single Outline) Green Product (RoHS compliant) To meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-). You can find all of our packages, sorts of packing and others in our Infineon Internet Page Products : SMD = Surface Mounted Device Dimensions in mm Data Sheet 1 Rev..7, 7-6-5

22 Revision History ersion Date Changes Rev Initial version of RoHS-compliant derivate of TLE 471- Page 1: AEC certified statement added Page 1 and Page 19 ff: RoHS compliance statement and Green product feature added Page 1 and Page 19 ff: Package changed to RoHS compliant version Legal Disclaimer updated Data Sheet Rev..7, 7-6-5

23 Edition Published by Infineon Technologies AG 8176 Munich, Germany 7 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office ( Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.