Data Sheet, Rev. 1.1, September 2011 HITFET - BTS3405G. Smart Low-Side Power Switch. Automotive Power

Size: px

Start display at page:

Download "Data Sheet, Rev. 1.1, September 2011 HITFET - BTS3405G. Smart Low-Side Power Switch. Automotive Power"

Barbara Small
5 years ago
Views:

1 Daa Shee, Rev. 1.1, Sepember 2011 HITFET - Smar Low-Side Power Swich Auomoive Power

2 1 Overview Block Diagram Terms Pin Configuraion Pin Assignmen Pin Definiions and Funcions General Produc Characerisics Absolue Maximum Raings Thermal Resisance Transien Thermal Impedance Block Descripion and Characerisics Inpu and Power Sage Inpu Circui Failure Feedback Oupu On-Sae Resisance Power Dissipaion Oupu Timing Characerisics Proecion Funcions Thermal Proecion Overvolage Proecion Shor Circui Proecion Characerisics Package Oulines Revision Hisory Daa Shee 2 Rev. 1.1,

HITFET 1 Overview Feaures Low inpu curren Shor circui and Overload proecion Curren limiaion Inpu proecion (ESD) Thermal proecion wih auo resar Compaible o sandard Power MOSFET Analog driving possible

3 HITFET 1 Overview Feaures Low inpu curren Shor circui and Overload proecion Curren limiaion Inpu proecion (ESD) Thermal proecion wih auo resar Compaible o sandard Power MOSFET Analog driving possible Two channel concep saves PCB fooprin Green Produc (RoHS complian) AEC Qualified PG-DSO-8-25 Descripion The is a wo channel low-side power swich in PG-DSO-8-25 package providing embedded proecive funcions. The device consiss of wo separae monolihic IC. Each wih one N-channel power MOSFET ransisor and addiional proecion circuiry. Table 1 Produc Summary Drain Volage V D 42 V 1) Inpu Volage V IN(max) 10 V Typical On-Sae Resisance a T j = 25 C and Vin = 10V R DS(ON,amb yp) 0.7 Ω Maximum On-Sae Resisance a T j = 150 C and Vin = 10V R DS(ON,ho max) 1.9 Ω Nominal Load Curren I Dnom(min) 350 ma Drain Curren I D 600 ma 2) Single Clamping Energy E AS 65 mj 1) Acive clamped 2) Inernally limied Type Package Marking PG-DSO-8-25 Daa Shee 3 Rev. 1.1,

4 Overview Proecive Funcions Elecrosaic discharge proecion (ESD) Acive clamp over volage proecion Thermal shudown wih auo resar Shor circui proecion Faul Informaion Thermal shudown Shor o Baery and overload Applicaions Designed for driving Relays in Auomoive Applicaions All ypes of resisive, inducive and capaciive loads Suiable for loads wih peak currens Replaces discree circuis Deailed Descripion The device is able o swich all kind of resisive, inducive and capaciive loads, limied by E AS and maximum curren capabiliies. The offers ESD proecion of each IN Pin in relaion o he corresponding Source Pin. The overemperaure proecion prevens he device from overheaing due o overload and/or bad cooling condiions. The emperaure informaion is given by a emperaure sensor in each of he wo power MOSFET. During hermal shudown he device ries o sink an increased inpu curren a he corresponding IN pin o feedback he faul condiion on his channel. The has a hermal-auo-resar funcion, he regarding channel will urn on again afer he measured emperaure has dropped down for he hermal hyseresis. The over volage proecion is acive during load-dump or inducive urn off condiions. The power MOSFET is limiing he Drain - Source volage o he defined clamping volage. This funcion is available regardless of he inpu pin sae, means wihou volage on he IN pins. Daa Shee 4 Rev. 1.1,

5 Block DiagramTerms 2 Block Diagram Drain 1 IN 1 Gae Driving Uni Overvolage Proecion Overemperaure Proecion ESD Proecion Shor circui deecion Source 1 Drain2 IN 2 Gae Driving Uni Overvolage Proecion Overemperaure Proecion ESD Proecion Shor circui deecion Source2 BlockDiagram_3405 Figure 1 Block Diagram 2.1 Terms Figure 2 shows all exernal erms used in his daa shee. V bb V bb Z L1 V IN1 R in1 R in2 I IN 1 IN1 Drain1 Drain2 I D1 I D2 Z L2 V IN2 I IN 2 IN2 Source1 Source2 V D1 V D2 Figure 2 GND Terms I S1 I S2 Terms.emf Daa Shee 5 Rev. 1.1,

6 Pin ConfiguraionPin Assignmen 3 Pin Configuraion 3.1 Pin Assignmen Source Drain 1 IN1 2 7 Drain 1 Source Drain 2 IN2 4 5 Drain 2 Figure 3 Pin Configuraion PG-DSO-8-25 P-DSO-8.vsd 3.2 Pin Definiions and Funcions Pin Symbol Funcion 1 Source1 Ground connecion for channel 1 2 IN1 Inpu / Faul feedback for channel 1 3 Source2 Ground connecion for channel 2 4 IN2 Inpu / Faul feedback for channel 2 5, 6 Drain2 Load connecion channel 2 7, 8 Drain1 Load connecion channel 1 Daa Shee 6 Rev. 1.1,

7 General Produc CharacerisicsAbsolue Maximum Raings 4 General Produc Characerisics 4.1 Absolue Maximum Raings All parameers apply for boh channels accordingly. Absolue Maximum Raings 1) T j = -40 C o +150 C; all volages wih respec o ground, posiive curren flowing ino pin (unless oherwise specified), all values valid for boh channels Pos. Parameer Symbol Limi Values Uni Tes Condiions Min. Max. Volages Drain volage V D 42 V 2) V IN = 0 V, I D = 10 ma Inpu Volage V IN V Inpu Curren I IN self limied ma -0.2 V < V IN < 10 V ma V IN < -0.2 V or V IN > 10 V Drain Curren I D 600 ma 3) T j = 25 C Energies Unclamped single pulse inducive energy single pulse Unclamped single pulse inducive energy single pulse Unclamped repeiive pulse inducive energy cycles Unclamped repeiive pulse inducive energy cycles E AS 0 65 mj I D = 350 ma; V bb = 28 V; T J(sar) = 85 C 30 mj I D = 250 ma; V bb = 28 V; T J(sar) = 150 C E AR 0 18 mj I D = 200 ma; V bb = 13.5 V; T J(sar) = 105 C 13 mj I D = 170 ma; V bb = 13.5 V; T J(sar) = 105 C Toal Power Dissipaion P o 0.78 W 4) T a = 85 C Temperaures Operaing emperaure T J C Sorage emperaure T sg C ESD Suscepibiliy Elecrosaic discharge volage 5) V ESD -2 2 kv IN Pin R = 1.5 k; C = 100 pf; T J = 25 C 1) No subjec o producion es, specified by design. 2) Acive clamped. 3) Inernally limied. 4) Device mouned on PCB according EIA/JEDEC sandard JESD51-7 (4-layer FR4, 76.2 mm mm wih buried planes). PCB is mouned verical wihou blown air. 5) ESD suscepibiliy HBM according o EIA/JESD 22-A 114B, secion 4. Daa Shee 7 Rev. 1.1,

8 General Produc CharacerisicsThermal Resisance 4.2 Thermal Resisance Pos. Parameer Symbol Limi Values Uni Condiions Min. Typ. Max Juncion o Soldering Poin R hjc 38 K/W 1) 2) Juncion o Ambien all channel ON R hja 80 K/W 1) 2) 1) No subjec o producion es, specified by design. 2) Device mouned on PCB according EIA/JEDEC sandard JESD51-7 (4-layer FR4, 76.2 mm mm wih buried planes). PCB is mouned verical wihou blown air wih 0.78W power dissipaion generaed in each channel on he DMOS. Noe: Sresses above he ones lised here may cause permanen damage o he device. Exposure o absolue maximum raing condiions for exended periods may affec device reliabiliy. Noe: Inegraed proecion funcions are designed o preven IC desrucion under faul condiions described in he daa shee. Faul condiions are considered as ouside normal operaing range. Proecion funcions are no designed for coninuous repeiive operaion Transien Thermal Impedance Z hja Zh [ K / W ] Z hjc p [ s ] Zh_3405.emf Figure 4 Typical Transien Thermal Impedance single pulse, Z hja and Z hjc Daa Shee 8 Rev. 1.1,

9 General Produc CharacerisicsThermal Resisance 10 2 D = D = 0.2 D = 0.1 Z hja [K/W] D = D = 0.02 D = 0.01 Single pulse p [s] pulse_bts3405_25.emf Figure 5 Typical Transien Thermal Impedance Z hja wih differen Duy cycles Z hja = f( p ), D = p/t, T a = 25 C Device mouned on PCB according EIA/JEDEC sandard JESD51-7 (4-layer FR4, 76.2 mm mm wih buried planes). PCB is mouned verical wihou blown air wih 0.78W power dissipaion generaed in each channel for single pulse on he DMOS Daa Shee 9 Rev. 1.1,

10 Block Descripion and CharacerisicsInpu and Power Sage 5 Block Descripion and Characerisics 5.1 Inpu and Power Sage Inpu Circui Figure 6 shows he inpu circui of he. The zener Diode proecs he inpu circui agains ESD pulses. The inernal circuiry is supplied by he inpu PIN. During normal operaion he Inpu is conneced o he Gae of he power MOSFET. During faul condiion he device ries o sink he curren I INlim in order o give he faul informaion back o he driving circui. I IN IN I INnom Logic Gae Faul condiion Z D I INlim Source Inpu.emf Figure 6 Inpu Circui 2,00 1,75 V IN(h) [ V ] 1,50 1,25 1,00 0,75 0,50 0,25 0, T [ C] Vinh.emf Figure 7 Typical Inpu Threshold Volage V inh = f(t J ); I D = 50 μa, V D = V IN 0,7 0,6 0,5 I D [ A ] 0,4 0,3 0,2 0, V IN [ V ] Transferchar.emf Figure 8 Typical Transfer Characerisic I D = f(v IN ); V D = 12 V, T Jsar = 25 C Daa Shee 10 Rev. 1.1,

11 Block Descripion and CharacerisicsInpu and Power Sage Failure Feedback During failure condiion he ries o sink a increased inpu curren I INlim Oupu On-Sae Resisance The on-sae resisance depends on he juncion emperaure T J. Figure 9 shows his dependency for he ypical on-sae resisance R DS(on). 1,5 1,3 R DS(on) [ Ω ] 1,1 0,9 0,7 0,5 Vin = 5V Vin = 10V 0, T [ C ] Figure 9 Typical On-Sae Resisance, R DS(on) = f(t J ) rdson.emf Daa Shee 11 Rev. 1.1,

12 Block Descripion and CharacerisicsInpu and Power Sage Power Dissipaion The maximum allowed power dissipaion in Figure 10 is calculaed by R hjc and R hja. 1,00 R hjc =38 K/W R hja =80 K/W P o / W 0,10 0, T / C Po_3405.emf Figure 10 Maximal Allowable Power Dissipaion Oupu Timing A volage signal a he inpu pin above he hreshold volage causes he power MOSFET o swich on wih a dedicaed slope which is opimized for low EMC emission. Figure 11 shows he iming definiion. IN [V] V D V bb 90 % off 10 % on Swiching.emf Figure 11 Definiion of Power Oupu Timing for Resisive Load Daa Shee 12 Rev. 1.1,

13 Block Descripion and CharacerisicsInpu and Power Sage Characerisics Noe: Characerisics show he deviaion of parameer a given inpu volage and juncion emperaure. Typical values show he ypical parameers expeced from manufacuring. All volages wih respec o Source Pin unless oherwise saed. Elecrical Characerisics: Inpu and Power Sage T j = -40 C o +150 C, all volages wih respec o ground, posiive curren flowing ino pin (unless oherwise specified Pos. Parameer Symbol Limi Values Uni Tes Condiions Min. Typ. Max. Inpu Nominal Inpu curren I INnom μa V D = 0 V; V IN = 10 V Inpu curren proecion mode I INlim μa V IN = 10 V; T J = 150 C Inpu hreshold volage V INTH V V D = V IN ; I D = 50 μa T J = 25 C V V D = V IN ; I D = 50 μa, 150 C Power Sage On-Sae Resisance R DS(on) 0.9 Ω 1) T J = 25 C; V IN = 5 V; I D = 200mA Ω T J = 150 C; V IN = 5 V; I D = 200mA Ω 1) T J = 25 C; V IN = 10 V; I D = 200mA Ω T J = 150 C; V IN = 10 V; I D = 200mA Nominal load curren for boh channels ON I Dnom ma 1) T J < 150 C; T A = 105 C 2) ; V IN = 5 V Zero inpu volage drain curren I DSS 5 μa V DS = 13.5 V;V IN = 0 V; T J =150 C μa V DS = 32 V;V IN = 0 V; T J =-40 C o 85 C 4 7 μa V DS = 32 V;V IN = 0 V; T J =150 C Daa Shee 13 Rev. 1.1,

14 Block Descripion and CharacerisicsInpu and Power Sage Elecrical Characerisics: Inpu and Power Sage (con d) T j = -40 C o +150 C, all volages wih respec o ground, posiive curren flowing ino pin (unless oherwise specified Pos. Parameer Symbol Limi Values Uni Tes Condiions Min. Typ. Max. Swiching V bb = 12 V, R L = 82 Ω Turn-on ime on μs V IN = 10 V o 90% I D Turn-off ime off μs V IN = 0 V o 10% I D Slew rae on dv ds /d on V/μs 50% - 30% V bb ; R L = 82 Ω; V IN = 0 V o 10 V; V bb = 12 V Slew rae off dv ds /d off V/μs 30% - 50% V bb ; R L = 82 Ω; V IN = 10 V o 0 V; V bb = 12 V Inverse Diode Inverse Diode forward volage V D V I D = -1 A; V IN = 0 V 1) No subjec o producion es, calculaed by R hja and R DS(on). 2) Device mouned on PCB according EIA/JEDEC sandard JESD51-7 (4-layer FR4, 76.2 mm mm wih buried planes). PCB is mouned verical wihou blown air. Daa Shee 14 Rev. 1.1,

15 Proecion FuncionsThermal Proecion 6 Proecion Funcions The device provides embedded proecion funcions. Inegraed proecion funcions are designed o preven IC desrucion under faul condiions described in he daa shee. Faul condiions are considered as ouside normal operaion. 6.1 Thermal Proecion The device is proeced agains over emperaure due o overload and / or bad cooling condiions. To ensure his a emperaure sensor locaed in he Power MOSFET is used. The has a hermal auo-resar funcion. Afer he device has cooled down i will swich on again see Figure 12. Thermal shudown IN 5V 0 T J resar T JSD ΔT JSD I IN I INf Figure 12 I IS 0 Error Signal via Inpu Curren a Thermal Shudown Thermal_faul_auoresar.emf 6.2 Overvolage Proecion When swiching off inducive loads wih low-side swiches, he Drain-Source volage V D rises above baery poenial, because he inducance inends o coninue driving he curren. Drain Source OupuClamap.emf Figure 13 Oupu Clamp The is equipped wih a volage clamp mechanism ha keeps he Drain-Source volage V D a a cerain level. See Figure 13 and Figure 14 for more deails. Daa Shee 15 Rev. 1.1,

16 Proecion FuncionsOvervolage Proecion IN 5V 0 I D Turn off due o over emperaure or shor circui V D V Clamp V bb Figure 14 Swiching an Inducance InduciveLoad.emf While demagneizaion of inducive loads, energy has o be dissipaed in he. This energy can be calculaed wih following equaion: E = ( V bb + V ou( CL) ) V ou( CL) R L R L I L ln + I L V ou( CL) L R L (1) Following equaion simplifies under assumpion of R L = 0 V bb 1 2 E = --LI 2 L V ou( CL) V bb (2) Daa Shee 16 Rev. 1.1,

17 Proecion FuncionsShor Circui Proecion 6.3 Shor Circui Proecion The condiion shor circui is an overload condiion of he device. If he curren reaches he value of I lim he device sars o limi he curren. In he condiion of curren limiaion he device heas up. If he hermal shudown emperaure is reached he device urns off. Figure 15 shows his behavior. During he curren limiaion he inpu curren is above I INnom. During he ime period dlim, he curren can be above I lim. Occurrence of Over curren or high ohmic Shor circui Turn off due o over emperaure Resar afer shor circui urn off Resar ino normal load condiion IN 5V 0 I D V bb /Z sc I lim d lim T J T JSD ΔT JSD I IN I INlim I INnom 0 Shor_circui.emf Figure 15 Shor Circui Behavior of As he device is a low side swich i can be assumed ha he Source o Ground pah has a neglecable low impedance and resisance. Therefore all impedance and resisance in he load pah during shor circui is merged ino Zsc. Daa Shee 17 Rev. 1.1,

18 Proecion FuncionsCharacerisics 6.4 Characerisics Noe: Characerisics show he deviaion of parameer a given inpu volage and juncion emperaure. Typical values show he ypical parameers expeced from manufacuring. Elecrical Characerisics: Proecion Funcions T j = -40 C o +150 C; all volages wih respec o ground, posiive curren flowing ino pin (unless oherwise specified), all values valid for boh channels Pos. Parameer Symbol Limi Values Uni Tes Condiions Min. Typ. Max. Thermal Proecion Thermal shu down juncion emperaure T JSD ) C Thermal hyseresis ΔT JSD 10 K 1) Overvolage Proecion Drain clamp volage V Clamp V V IN = 0 V; I D = 10 ma; Curren Limiaion and Shor Circui Proecion Curren limiaion I lim A V IN = 10 V;V DS = 12 V; measure = 4 dlim T J = 25 C 1) 0.3 T J = 150 C 1.4 T J = -40 C 1) Curren limiaion delay ime dlim 50 μs 1) 1) No subjec o producion es, specified by design. Daa Shee 18 Rev. 1.1,

19 Package Oulines 7 Package Oulines 0.35 x ) ±0.07 (1.45) 1.75 MAX M A B 8x B 1) ±0.2 C ± MAX. 0.2 M C 8x ) A Index Marking Figure 16 1) Does no include plasic or meal prorusion of 0.15 max. per side 2) Lead widh can be 0.61 max. in dambar area GPS01181 PG-DSO-8-25 (Plasic Dual Small Ouline Package) Green Produc (RoHS complian) To mee he world-wide cusomer requiremens for environmenally friendly producs and o be complian wih governmen regulaions he device is available as a green produc. Green producs are RoHS-Complian (i.e Pb-free finish on leads and suiable for Pb-free soldering according o IPC/JEDEC J-STD-020). For furher informaion on alernaive packages, please visi our websie: hp:// Dimensions in mm Daa Shee 19 Rev. 1.1,

20 Revision Hisory 8 Revision Hisory Version Dae Changes Rev fixed a ypo in EAR es condiions in chaper Max raings updaed Feaure lis and rephrased Deailed Descripion fixed a spelling error in regarding dependency Rev released daa shee Daa Shee 20 Rev. 1.1,

21 Ediion Published by Infineon Technologies AG Munich, Germany 2011 Infineon Technologies AG All Righs Reserved. Legal Disclaimer The informaion given in his documen shall in no even be regarded as a guaranee of condiions or characerisics. Wih respec o any examples or hins given herein, any ypical values saed herein and/or any informaion regarding he applicaion of he device, Infineon Technologies hereby disclaims any and all warranies and liabiliies of any kind, including wihou limiaion, warranies of non-infringemen of inellecual propery righs of any hird pary. Informaion For furher informaion on echnology, delivery erms and condiions and prices, please conac he neares Infineon Technologies Office ( Warnings Due o echnical requiremens, componens may conain dangerous subsances. For informaion on he ypes in quesion, please conac he neares Infineon Technologies Office. Infineon Technologies componens may be used in life-suppor devices or sysems only wih he express wrien approval of Infineon Technologies, if a failure of such componens can reasonably be expeced o cause he failure of ha life-suppor device or sysem or o affec he safey or effeciveness of ha device or sysem. Life suppor devices or sysems are inended o be implaned in he human body or o suppor and/or mainain and susain and/or proec human life. If hey fail, i is reasonable o assume ha he healh of he user or oher persons may be endangered.

N channel vertical power FET in Smart SIPMOS technology. Fully protected by embedded protection functions. Overvoltage- Protection

N channel vertical power FET in Smart SIPMOS technology. Fully protected by embedded protection functions. Overvoltage- Protection Feaures Logic Level Inpu Inpu Proecion (ESD) Thermal shudown Green produc (RoHS complian) Overload proecion Shor circui proecion Overvolage proecion Curren limiaion nalog driving possible Produc Summary