Data Sheet, Rev. 1.0, March 2008 BTS4300SGA. Smart High-Side Power Switch. Automotive Power

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1 Daa Shee, Rev. 1.0, March 2008 BTS4300SGA Smar High-Side Power Swich Auomoive Power

2 BTS 4300SGA 1 Overview 3 2 Block Diagram 5 3 Pin Configuraion Pin Assignmen Pin Definiions and Funcions Volage and Curren Definiion 7 4 General Produc Characerisics Absolue Maximum Raings Funcional Range Thermal Resisance 9 5 Power Sage Oupu ON-Sae Resisance Turn ON / OFF Characerisics Inducive Oupu Clamp Elecrical Characerisics Power Sage 12 6 Proecion Mechanisms Undervolage Proecion Overvolage Proecion Reverse Polariy Proecion Overload Proecion Elecrical Characerisics Proecion Funcions 16 7 Diagnosic Mechanism ST Pin ST Signal in Case of Failures Diagnosic in Open Load, Channel OFF ST Signal in case of Over Temperaure Elecrical Characerisics Diagnosic Funcions 20 8 Inpu Pin Inpu Circuiry Elecrical Characerisics 21 9 Applicaion Informaion Furher Applicaion Informaion Package Oulines Revision Hisory 24 Daashee 2 1.0,

3 Smar High-Side Power Swich BTS4300SGA 1 Overview Basic Feaures Fi for 12V applicaion One Channel device Very Low Sand-by Curren CMOS Compaible Inpus Elecrosaic Discharge Proecion (ESD) Opimized Elecromagneic Compaibiliy Logic ground independen from load ground Very low leakage curren from OUT o he load in OFF sae Green Produc (RoHS complian) AEC Qualified PG-DSO-8-24 Descripion The BTS4300SGA is a single channel Smar High-Side Power Swich. I is embedded in a PG-DSO-8-24 package, providing proecive funcions and diagnosics. The power ransisor is buil by a N-channel power MOSFET wih charge pump. The device is monolihically inegraed in Smar echnology. I is specially designed o drive Relay or LED in he harsh auomoive environmen. Table 1 Elecrical Parameers (shor form) Parameer Symbol Value Operaing volage range V SOP 5V... 34V Over volage proecion V S (AZ) 41V Maximum ON Sae resisance a T j = 150 C R DS(ON) 600mΩ Nominal load curren I L (nom) 0.4A Minimum curren limiaion I L_SCR 0.4A Sandby curren for he whole device wih load I S(off) 26µA Maximum reverse baery volage -V s(rev) 32V Diagnosic Feaure Open drain diagnosic oupu Open load deecion in OFF sae Type Package Marking BTS4300SGA PG-DSO SGA Daa Shee 3 Rev. 1.0,

4 Overview Proecion Funcions Shor circui proecion Overload proecion Curren limiaion Thermal shudown wih resar Overvolage proecion (including load dump) Loss of ground and loss of baery proecion Elecrosaic discharge proecion (ESD) Applicaion All ypes of relays, resisive and capaciive loads Daa Shee 4 Rev. 1.0,

5 Block Diagram 2 Block Diagram V S inernal power supply ESD proecion driver logic over emperaure gae conrol & charge pump volage sensor clamp for inducive load over curren swich off open load deecion T OUT ST GND Block diagram.emf Figure 1 Block diagram for he BTS4300SGA Daa Shee 5 Rev. 1.0,

6 Pin Configuraion 3 Pin Configuraion 3.1 Pin Assignmen GND 1 8 V S 2 7 V S OUT 3 6 V S ST 4 5 V S Figure 2 Pin Configuraion 3.2 Pin Definiions and Funcions Pin Symbol Funcion 1 GND Ground; Ground connecion 2 Inpu channel; Inpu signal. Acivae he channel in case of logic high level 3 OUT Oupu; Proeced High side power oupu channel 4 ST Diagnosic feedback; of channel. Open drain. 5, 6, 7, 8 V S Baery volage; Design he wiring for he simulaneous max. shor circui curren and also for low hermal resisance Daa Shee 6 Rev. 1.0,

7 Pin Configuraion 3.3 Volage and Curren Definiion Figure 3 shows all erms used in his daa shee, wih associaed convenion for posiive values. V S I S V DS V S I OUT I L V V OUT I ST ST V ST GND R GND I GND Volage and curren convenion single avec diag.vsd Figure 3 Volage and curren definiion Daa Shee 7 Rev. 1.0,

8 General Produc Characerisics 4 General Produc Characerisics 4.1 Absolue Maximum Raings Absolue Maximum Raings 1) T j = 25 C; (unless oherwise specified) Pos. Parameer Symbol Limi Values Uni Condiions Min. Max. Volages Supply volage V S 40 V Reverse polariy Volage - V S(REV) 0 32 V Supply volage for shor circui proecion V ba(sc) 0 28 V R ECU = 20mΩ, R Cable =16mΩ/m, L Cable =1µH/m, l = 0 or 5m 2) 1) No subjec o producion es, specified by design 2) In accordance o AEC Q and AEC Q ) ESD suscepibiliy HBM according o EIA/JESD 22-A 114B see Chaper 6 Inpu pins Volage a PUT pins V V Curren hrough PUT pins I -5 5 ma Power sage Load curren I L I L(LIM) A Power dissipaion (DC), P TOT 0.8 W T A =85 C, T j <150 C Inducive load swich off energy dissipaion, Single pulse E AS 800 mj T j =150 C, V S =13.5V, I L = 0.3A Temperaures Juncion Temperaure T j C Sorage Temperaure T sg C ESD Suscepibiliy ESD Resisiviy pin V ESD -1 1 kv HBM 3) ESD Resisiviy all oher pins V ESD -5 5 kv HBM 3) Noe: Sresses above he ones lised here may cause permanen damage o he device. Exposure o absolue maximum raing condiions for exended periods may affec device reliabiliy. Noe: Inegraed proecion funcions are designed o preven IC desrucion under faul condiions described in he daa shee. Faul condiions are considered as ouside normal operaing range. Proecion funcions are no designed for coninuous repeiive operaion. Daa Shee 8 Rev. 1.0,

9 General Produc Characerisics 4.2 Funcional Range Pos. Parameer Symbol Limi Values Uni Condiions Min. Max Operaing Volage V SOP 5 34 V V = 4.5V, R L = 47Ω, V DS < 0.5V Undervolage shudown V SUV 5 V Undervolage resar of charge V S(u cp) 5.5 V pump Operaing curren I GND 1.3 ma V = 5V Sandby curren I S(OFF) 26 µa T j = 150 C, V = 0V Noe: Wihin he funcional range he IC operaes as described in he circui descripion. The elecrical characerisics are specified wihin he condiions given in he relaed elecrical characerisics able. 4.3 Thermal Resisance Pos. Parameer Symbol Limi Values Uni Condiions Min. Typ. Max Juncion o Soldering Poin R hjc 15 K/W 1) Juncion o Ambien: channel acive 1) No subjec o producion es, specified by design R hja 83 K/W wih 6cm² cooling area 1) Daa Shee 9 Rev. 1.0,

10 Power Sage 5 Power Sage The power sage is buil by an N-channel verical power MOSFET (DMOS) wih charge pump. 5.1 Oupu ON-Sae Resisance The ON-sae resisance R DS(ON) depends on he supply volage as well as he juncion emperaure T j. Figure 4 shows he dependencies for he ypical ON-sae resisance. The behavior in reverse polariy is described in Chaper Rdson (m ) Rdson (mω) Juncion emperaure ( C) Baery volage (V) Rdson.vsd Figure 4 Typical ON-sae resisance A high signal (See Chaper 8) a he inpu pin causes he power DMOS o swich ON wih a dedicaed slope, which is opimized in erms of EMC emission. 5.2 Turn ON / OFF Characerisics Figure 5 shows he ypical iming when swiching a resisive load. V _H_min V _L_max V OUT dv/d OFF 90% V S ON 70% V S dv/d ON 30% V S OFF 10% V S Figure 5 Turn ON/OFF (resisive) iming Swiching imes.vsd Daa Shee 10 Rev. 1.0,

11 Power Sage 5.3 Inducive Oupu Clamp When swiching OFF inducive loads wih high side swiches, he volage V OUT drops below ground poenial, because he inducance inends o coninue driving he curren. To preven he desrucion of he device due o high volages, here is a volage clamp mechanism implemened ha keeps he negaive oupu volage a a cerain level (V S -V DS(AZ) ). Please refers o Figure 6 and Figure 7 for deails. Neverheless, he maximum allowed load inducance is limied. V S LOGIC V DS V BAT I L GND OUT V OUT V L, R L Figure 6 Oupu clamp Oupu clamp.vsd V OUT V S V S- V DS(AZ) peak I L Swiching an inducance.vsd Figure 7 Swiching in inducance iming Maximum Load Inducance During demagneizaion of inducive loads, energy has o be dissipaed in he BTS4300SGA. This energy can be calculaed wih following equaion: L V E V DS( AZ) S V DS( AZ) R L = + ln IL + I RL R L V S V DS( AZ) L Daa Shee 11 Rev. 1.0,

12 Power Sage Following equaion simplifies under he assumpion of R L = 0Ω. 1 E -- LI 2 V = S V S VDS( AZ) ) The energy, which is convered ino hea, is limied by he hermal design of he componen. 5.4 Elecrical Characerisics Power Sage Elecrical Characerisics: Power sage V S = 13.5V, T j = -40 C o +150 C,(unless oherwise specified). Typical values are given a T j = 25 C Pos. Parameer Symbol Limi Values Uni Condiions Min. Typ. Max ON-sae resisance per channel R DS(ON) 300 mω T j = 25 C, 1) 1) No subjec o producion es, specified by design 2) Volage is measured by forcing I DS. I L = 0.3A, V BB = V V = 5V, See Figure T j =150 C Nominal load curren I L(nom) 0.4 A T A =85 C 1), T j <150 C Drain o Source Clamping Volage V DS(AZ) = V S -V OUT V DS(AZ) V I DS = 4mA 2) Oupu leakage curren I L(OFF) 12 µa V =0V, V OUT = 0V Slew rae ON dv/d ON V/µs R L =47Ω, 10% o 30% V OUT V s =13.5V, Slew rae OFF -dv/d OFF 2 V/µs See Figure 5 70% o 40% V OUT Turn-ON ime o 90% V OUT ON 140 µs Includes propagaion delay Turn-OFF ime o 10% OFF 170 µs V OUT Includes propagaion delay Daa Shee 12 Rev. 1.0,

13 Proecion Mechanisms 6 Proecion Mechanisms The device provides embedded proecive funcions. Inegraed proecion funcions are designed o preven he desrucion of he IC from faul condiions described in he daa shee. Faul condiions are considered as ouside normal operaing range. Proecion funcions are designed for neiher coninuous nor repeiive operaion. 6.1 Undervolage Proecion Below V SOP_min, he under volage mechanism is me. If he supply volage is below he under volage mechanism, he device is OFF (urns OFF). As soon as he supply volage is above he under volage mechanism, hen he device can be swiched ON and he proecion funcions are operaional. 6.2 Overvolage Proecion There is a clamp mechanism for over volage proecion. To guaranee his mechanism operaes properly in he applicaion, he curren in he zener diode Z DAZ has o be limied by a ground resisor. Figure 8 shows a ypical applicaion o wihsand overvolage issues. In case of supply greaer han V S(AZ), he power ransisor swiches ON and he volage across logic secion is clamped. As a resul, he inernal ground poenial rises o V S - V S(AZ). Due o he ESD zener diodes, he poenial a pin rises almos o ha poenial, depending on he impedance of he conneced circuiry. Inegraed resisors are provided a he pin o proec he inpu circuiry from excessive curren flow during his condiion. V S V BAT R ZD AZ R ST ST LOGIC OUT ZD ESD GND R GND Overvolage proecion single wih diag.vsd Figure 8 Over volage proecion wih exernal componens In he case he supply volage is in beween of V S(SC) max and V DS(AZ), he oupu ransisor is sill operaional and follow he inpu. If he channel is in ON sae, parameers are no longer warraned and lifeime is reduced compared o normal mode. This specially impacs he shor circui robusness, as well as he maximum energy E AS he device can handle. Daa Shee 13 Rev. 1.0,

14 Proecion Mechanisms 6.3 Reverse Polariy Proecion In case of reverse polariy, he inrinsic body diode causes power dissipaion. The curren in his inrinsic body diode is limied by he load iself. Addiionally, he curren ino he ground pah and he logical pins has o be limied o he maximum curren described in Chaper 4.1, someimes wih an exernal resisor. Figure 9 shows a ypical applicaion. The R GND resisor is used o limi he curren in he zener proecion of he device. Resisors R and R ST is used o limi he curren in he logic of he device and in he ESD proecion sage. The recommended value for R GND is 150Ω, for R ST 0/1 = 15kΩ. In case he over volage is no considered in he applicaion, R GND can be replaced by a Shoky diode. Micro conroller (e.g. XC22xx) VccµC R STPU RST ST V S V BAT R -V DS(REV) Z dbody OUT I L(nom) ZD ESD GND R GND Reverse Polariy single wih diag.vsd Figure 9 Reverse polariy proecion wih exernal componens 6.4 Overload Proecion In case of overload, or shor circui o ground, he BTS4300SGA offers wo proecions mechanisms. Curren limiaion A firs sep, he insananeous power in he swich is mainained o a safe level by limiing he curren o he maximum curren allowed in he swich I L(LIM). During his ime, he DMOS emperaure is increasing, which affecs he curren flowing in he DMOS. Thermal proecion A hermal shudown, he device urns OFF and cools down. A resar mechanism is used, afer cooling down, he device resars and limis he curren o I L(SCR). Figure 10 shows he behavior of he curren limiaion as a funcion of ime. Daa Shee 14 Rev. 1.0,

15 Proecion Mechanisms I L I L(LIM) I L(SCr) ST T dst(+) Curren limiaion wih diag full. vsd Figure 10 Curren limiaion funcion of he ime Daa Shee 15 Rev. 1.0,

16 Proecion Mechanisms 6.5 Elecrical Characerisics Proecion Funcions Elecrical Characerisics: Proecion V S = 13.5V, T j = -40 C o +150 C. Typical values are given a T j = 25 C Pos. Parameer Symbol Limi Values Uni Condiions Min. Typ. Max. Reverse polariy Drain source diode volage during reverse polariy -V DS(REV) 600 mv T J = 150 C Overvolage Over volage proecion V S(AZ) 41 V I s = 4mA Overload condiion Load curren limiaion I L(LIM) Repeiive shor circui curren I L(SCR) 1 A 1) limiaion Thermal shudown emperaure T jsc 150 C 1) Thermal shudown hyseresis T JT 10 K 1) 1) No subjec o producion es, bu specified by design A T j = -40 C, T j = 25 C, T j = 150 C, V S = 20V Daa Shee 16 Rev. 1.0,

17 Diagnosic Mechanism 7 Diagnosic Mechanism For diagnosis purpose, he BTS4300SGA provides a saus pin. 7.1 ST Pin BTS4300SGA saus pin is an open drain, acive low circui. Figure 11 shows he equivalen circuiry. As long as no hard failure mode occurs (Shor circui o GND / Over emperaure or open load in OFF), he signal is permanenly high, and due o a required exernal pull-up o he logic volage will exhibi a logic high in he applicaion. A suggesed value for he R PU ST is 15kΩ.. V ccµc R PU ST ST R ST Channel 0 Diagnosic Logic ZD ESD GND ST pin full diag.vsd Figure 11 Saus oupu circuiry 7.2 ST Signal in Case of Failures Table 3 gives a quick reference for he logical sae of he ST pin during device operaion. Table 3 ST pin ruh able Device operaion OUT ST Normal operaion L L H H H H Open Load channel L H L H H H Over emp channel L L H H L L Shor circui o GND L L H H L 1) L 1) V out < 2V yp Diagnosic in Open Load, Channel OFF For open load diagnosis in OFF-sae, an exernal oupu pull-up resisor (R OL ) is recommended. For calculaion of he pull-up resisor value, he leakage currens and he open load hreshold volage V OL(OFF) has o be aken ino accoun. Figure 12 gives a skech of he siuaion and Figure 13 shows he ypical iming diagram. I leakage defines he leakage curren in he complee sysem, including I L(OFF) (see Chaper 5.4) and exernal leakages e.g due o humidiy, corrosion, ec... in he applicaion. Daa Shee 17 Rev. 1.0,

18 Diagnosic Mechanism To reduce he sand-by curren of he sysem, an open load resisor swich S OL is recommended. If he channel is OFF, he oupu is no longer pulled down by he load and V OUT volage rises o nearly V S. This is recognized by he device as open load. The volage hreshold is given by V OL(OFF). In ha case, he ST signal is swiched o a logical low V STL. Vba SOL VS I L(OL) ROL OL comp. OUT I leakage GND V OL(OFF) RGND Rleakage Figure 12 Open load deecion in OFF elecrical equivalen circui Open Load in OFF.vsd V OUT I L V OL(OFF) V ST(HIGH) ST V ST(LOW) Diagnosic In Open load full diag.vs Figure 13 ST in open load condiion Daa Shee 18 Rev. 1.0,

19 Diagnosic Mechanism ST Signal in case of Over Temperaure In case of over emperaure, he juncion emperaure reaches he hermal shudown emperaure T jsc. In ha case, he ST signal is sable and remains o oggling beween V ST(L) and V ST(H). Figure 14 gives a skech of he siuaion. V OUT ST T J T JSC T JSC Diagnosic In Overload full oggling.vs Figure 14 Sense signal in overemperaure condiion. Daa Shee 19 Rev. 1.0,

20 Diagnosic Mechanism 7.3 Elecrical Characerisics Diagnosic Funcions Elecrical Characerisics: Diagnosics V S = 13.5V, T j = -40 C o +150 C, (unless oherwise specified) Typical values are given a V s = 13.5V, T j = 25 C Pos. Parameer Symbol Limi Values Uni Condiions Min. Typ. Max. Load condiion hreshold for diagnosic Open Load deecion volage V OL(OFF) 3.0 V V = 0V Open load deecion curren I L(OL) 5 µa included in he sandby curren I S(OFF) ST pin Saus oupu (open drain) High level; Zener limi volage Saus oupu (open drain) Low level Diagnosic iming Saus invalid afer posiive inpu slope V ST (HIGH) V I ST = +1,6mA 1), Zener Limi volage V ST (LOW) 0.6 V I ST =+1,6mA 1) dst(+) µs 2) Shor circui deecion volage V OUT (SC) 2.8 V 1) If ground resisor R GND is used, he volage drop across his resisor has o be added 2) No subjec o producion es, specified by design Daa Shee 20 Rev. 1.0,

21 Inpu Pin 8 Inpu Pin 8.1 Inpu Circuiry The inpu circuiry is CMOS compaible. The concep of he Inpu pin is o reac o volage ransiion and no o volage hreshold. Wih he Schmid rigger, i is impossible o have he device in an un-defined sae, if he volage on he inpu pin is slowly increasing or decreasing. The oupu is eiher OFF or ON bu canno be in an linear or undefined sae. The inpu circuiry is compaible wih PWM applicaions. Figure 15 shows he elecrical equivalen inpu circuiry. The pull down curren source ensures he channel is OFF wih a floaing inpu. R I To driver s logic I I ESD Inpu circuiry.vsd Figure 15 Inpu pin circuiry 8.2 Elecrical Characerisics Elecrical Characerisics: Diagnosics V S = 13.5V, T j = -40 C o +150 C, Typical values are given a V s = 13.5V, T j = 25 C Pos. Parameer Symbol Limi Values Uni Condiions Min. Typ. Max. pu pins characerisics Low level inpu volage V (L) 0.8 V 1) High level inpu volage V (H) 2.2 V 1) Inpu volage hyseresis V (HYS) 0.3 V 2) Low level inpu curren I (L) 1 30 µa V = 0.7V High level inpu curren I (H) 1 30 µa V = 5V Inpu resisance R I kω See Figure 15 1) If ground resisor R GND is used, he volage drop across his resisor has o be added 2) No subjec o producion es, specified by design Daa Shee 21 Rev. 1.0,

22 Applicaion Informaion 9 Applicaion Informaion Noe: The following informaion is given as a hin for he implemenaion of he device only and shall no be regarded as a descripion or warrany of a cerain funcionaliy, condiion or qualiy of he device. V DD V DD V BAT R PUST V BAT_SW Vdd R V s R OL OUT Microconroller (e.g. XC22xx) ST OUT R ST GND GND R GND Applicaion example single avec diag.vsd IS Figure 16 Applicaion diagram wih BTS4300SGA Noe: This is a very simplified example of an applicaion circui. The funcion mus be verified in he real applicaion. 9.1 Furher Applicaion Informaion For furher informaion you may visi hp:// Daa Shee 22 Rev. 1.0,

23 Package Oulines 10 Package Oulines 0.1 M. (1.5) 1.75 MAX ±0.08 x 45 1) MAX C 0.2 M A C x8 6 ± ± Figure 17 Index Marking 1 5 1) -0.2 Index Marking (Chamfer) 4 A 1) Does no include plasic or meal prorusion of 0.15 max. per side PG-DSO-8-24 (Plasic Dual Small Ouline Package) Green Produc (RoHS complian) To mee he world-wide cusomer requiremens for environmenally friendly producs and o be complian wih governmen regulaions he device is available as a green produc. Green producs are RoHS-Complian (i.e Pbfree finish on leads and suiable for Pb-free soldering according o IPC/JEDEC J-STD-020). Daa Shee 23 Rev. 1.0,

24 Revision Hisory 11 Revision Hisory Version Dae Changes Creaion of he daa shee Daa Shee 24 Rev. 1.0,

25 Ediion Published by Infineon Technologies AG Munich, Germany 2008 Infineon Technologies AG All Righs Reserved. Legal Disclaimer The informaion given in his documen shall in no even be regarded as a guaranee of condiions or characerisics. Wih respec o any examples or hins given herein, any ypical values saed herein and/or any informaion regarding he applicaion of he device, Infineon Technologies hereby disclaims any and all warranies and liabiliies of any kind, including wihou limiaion, warranies of non-infringemen of inellecual propery righs of any hird pary. Informaion For furher informaion on echnology, delivery erms and condiions and prices, please conac he neares Infineon Technologies Office ( Warnings Due o echnical requiremens, componens may conain dangerous subsances. For informaion on he ypes in quesion, please conac he neares Infineon Technologies Office. Infineon Technologies componens may be used in life-suppor devices or sysems only wih he express wrien approval of Infineon Technologies, if a failure of such componens can reasonably be expeced o cause he failure of ha life-suppor device or sysem or o affec he safey or effeciveness of ha device or sysem. Life suppor devices or sysems are inended o be implaned in he human body or o suppor and/or mainain and susain and/or proec human life. If hey fail, i is reasonable o assume ha he healh of he user or oher persons may be endangered.

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