BTS7004-1EPP. 1 Overview. High Current PROFET 12V Smart High-Side Power Switch. Package PG-TSDSO Marking P

Transcription

1 High Curren PROFET 12V Smar High-Side Power Swich 1x 4 mω Package PG-TSDSO Marking P 1 Overview Poenial Applicaions Suiable for driving 15 A resisive, inducive and capaciive loads Replaces elecromechanical relays, fuses and discree circuis Suiable for driving glow plug, heaing loads, DC moor and for power disribuion V BAT R/L cable T 1 Opional elemens marked in grey C VS D Z2 V DD VDD GPIO R IN IN0 VS Conrol T R OL R/L cable GPIO R DEN DEN Proecion OUT0 Microconroller Diagnosis C OUT R PD A/D IN R AD R IS_PROT IS GND R LOAD C SENSE VSS D Z1 RSENSE R GND App_1ch_hea_cover.emf Figure 1 BTS7004-1EPP Applicaion Diagram. Furher informaion in Chaper 10 Daa Shee 1 Rev

2 High Curren PROFET 12V Overview Basic Feaures High-Side Swich wih Diagnosis and Embedded Proecion Par of High Curren PROFET 12V Family ReverSave for low power dissipaion in Reverse Polariy Green Produc (RoHS complian) Qualified in accordance wih AEC Q100 grade 1 Proecion Feaures Absolue and dynamic emperaure limiaion wih conrolled reacivaion Overcurren proecion (ripping) wih Inelligen Lach Undervolage shudown Overvolage proecion wih exernal componens (as shown in Figure 37) Diagnosic Feaures Proporional load curren sense Open Load in ON and OFF sae Shor circui o ground and baery Descripion The BTS7004-1EPP is a Smar High-Side Power Swich, providing proecion funcions and diagnosis. Table 1 Produc Summary Parameer Symbol Values Minimum Operaing volage V S(OP) 4.1 V Minimum Operaing volage (cranking) V S(UV) 3.1 V Maximum Operaing volage V S 28 V Minimum Overvolage proecion (T J = 25 C) V DS(CLAMP) 35 V Maximum curren in OFF mode (T J 85 C) I VS(OFF) 0.5 µa Maximum operaive curren I GND(ON_D) 3 ma Typical ON-sae resisance (T J = 25 C) R DS(ON)_ mω Maximum ON-sae resisance (T J = 150 C) R DS(ON) 8 mω Nominal load curren (T A = 85 C) I L(NOM) 15 A Minimum overload deecion curren I L(OVL0)_ A Typical curren sense raio a I L = I L(NOM) k ILIS Daa Shee 2 Rev. 1.00

3 High Curren PROFET 12V Block Diagram and Terms 2 Block Diagram and Terms 2.1 Block Diagram VS Supply Volage Monioring IS IN DEN Overvolage Proecion Inernal Power Supply Inelligen Resar Conrol SENSE Oupu ESD Proecion + Inpu Logic Channel Driver Logic Volage Sensor Overemperaure Gae Conrol + Chargepump ReverSave TM InverseON Load Curren Sense Overvolage Clamping Overcurren Proecion T OUT Inernal Reverse Polariy Proecion Oupu Volage Limiaion GND Circuiry GND Block_HEAT1ch.emf Figure 2 Block Diagram of BTS7004-1EPP Daa Shee 3 Rev. 1.00

4 High Curren PROFET 12V Block Diagram and Terms 2.2 Terms Figure 3 shows all erms used in his daa shee, wih associaed convenion for posiive values. I VS I IN V SIS IN VS V DS V S I DEN DEN OUT I L V IN V DEN I IS IS V OUT GND V IS I GND Terms_1CH.emf Figure 3 Volage and Curren Convenion Daa Shee 4 Rev. 1.00

5 High Curren PROFET 12V Pin Configuraion 3 Pin Configuraion 3.1 Pin Assignmen GND IN DEN IS n.c. n.c. n.c VS exposed pad (boom) 8 OUT OUT OUT n.c. OUT OUT OUT PinOu_PROFET1ch_PDH.emf Figure 4 Pin Configuraion Daa Shee 5 Rev. 1.00

6 High Curren PROFET 12V Pin Configuraion 3.2 Pin Definiions and Funcions Table 2 Pin Definiion Pin Symbol Funcion EP VS (exposed pad) Supply Volage Baery volage 1 GND Ground Signal ground 2 IN Inpu Channel Digial signal o swich ON he channel ( high acive) If no used: connec o GND pin or o module ground wih resisor R IN = 4.7 kω 3 DEN Diagnosic Enable Digial signal o enable device diagnosis ( high acive) and o clear he proecion lach of channel If no used: connec o GND pin or o module ground wih resisor R DEN = 4.7 kω 4 IS SENSE curren oupu Analog/digial signal for diagnosis If no used: lef open 5-7, 11 n.c. No conneced, inernally no bonded 8-10, OUT Oupu Proeced high-side power oupu channel 1) 1) All oupu pins of he channel mus be conneced ogeher on he PCB. All pins of he oupu are inernally conneced ogeher. PCB races have o be designed o wihsand he maximum curren which can flow. Daa Shee 6 Rev. 1.00

7 High Curren PROFET 12V General Produc Characerisics 4 General Produc Characerisics 4.1 Absolue Maximum Raings - General Table 3 Absolue Maximum Raings 1) T J = -40 C o +150 C; all volages wih respec o ground, posiive curren flowing ino pin (unless oherwise specified) Parameer Symbol Values Uni Noe or Number Min. Typ. Max. Tes Condiion Supply pins Power Supply Volage V S V P_ Load Dump Volage V BAT(LD) 35 V suppressed Load Dump acc. o ISO (2010). R i = 2 Ω P_ Supply Volage for Shor Circui Proecion V BAT(SC) 0 24 V Seup acc. o AEC-Q Reverse Polariy Volage -V BAT(REV) 16 V 2 min T A = +25 C Seup as described in Chaper 10 P_ P_ Curren hrough GND Pin I GND ma R GND according o Chaper 10 P_ Logic & conrol pins (Digial Inpu = DI) DI = IN, DEN Curren hrough DI Pin I DI -1 2 ma 2) P_ Curren hrough DI Pin I DI(REV) ma P_ Reverse Baery Condiion 2 min IS pin Volage a IS Pin V IS -1.5 V S V I IS = 10 μa P_ Curren hrough IS Pin I IS -25 I IS(SAT),M ma P_ Temperaures Juncion Temperaure T J C P_ Sorage Temperaure T STG C P_ ESD Suscepibiliy AX 2) Daa Shee 7 Rev. 1.00

8 High Curren PROFET 12V General Produc Characerisics Table 3 Absolue Maximum Raings 1) (coninued) T J = -40 C o +150 C; all volages wih respec o ground, posiive curren flowing ino pin (unless oherwise specified) Parameer Symbol Values Uni Noe or Min. Typ. Max. Tes Condiion ESD Suscepibiliy all Pins V ESD(HBM) -2 2 kv HBM 3) P_ (HBM) ESD Suscepibiliy OUT vs GND V ESD(HBM)_OU -4 4 kv HBM 3) P_ and VS conneced (HBM) T ESD Suscepibiliy all Pins V ESD(CDM) V CDM 4) P_ (CDM) ESD Suscepibiliy Corner Pins (CDM) (pins 1, 7, 8, 14) V ESD(CDM)_CR N V CDM 4) P_ ) No subjec o producion es - specified by design. 2) Maximum V DI o be considered for Lach-Up ess: 5.5 V. 3) ESD suscepibiliy, HBM according o ANSI/ESDA/JEDEC JS001 (1.5 kω, 100 pf). 4) ESD suscepibiliy, Charged Device Model CDM according JEDEC JESD22-C101. Noes 1. Sresses above he ones lised here may cause permanen damage o he device. Exposure o absolue maximum raing condiions for exended periods may affec device reliabiliy. 2. Inegraed proecion funcions are designed o preven IC desrucion under faul condiions described in he daa shee. Faul condiions are considered as ouside normal operaing range. Proecion funcions are no designed for coninuous repeiive operaion. 4.2 Absolue Maximum Raings - Power Sages Number Power Sage - 4 mω Table 4 Absolue Maximum Raings 1) T J = -40 C o +150 C; all volages wih respec o ground, posiive curren flowing ino pin (unless oherwise specified) Parameer Symbol Values Uni Noe or Min. Typ. Max. Tes Condiio n Maximum Energy Dissipaion Single Pulse E AS 150 mj I L = 2*I L(NOM) T J(0) = 150 C V S = 28 V Number P_ Daa Shee 8 Rev. 1.00

9 High Curren PROFET 12V General Produc Characerisics Table 4 Absolue Maximum Raings 1) (coninued) T J = -40 C o +150 C; all volages wih respec o ground, posiive curren flowing ino pin (unless oherwise specified) Parameer Symbol Values Uni Noe or Min. Typ. Max. Tes Condiio n Maximum Energy Dissipaion Repeiive Pulse 4.3 Funcional Range E AR 44 mj I L = I L(NOM) T J(0) = 85 C V S = 13.5 V 1M cycles P_ Load Curren I L I L(OVL0),MAX A P_ ) No subjec o producion es - specified by design. Number Table 5 Funcional Range - Supply Volage and Temperaure 1) Parameer Symbol Values Uni Noe or Number Min. Typ. Max. Tes Condiion Supply Volage Range for Normal Operaion V S(NOR) V P_ Lower Exended Supply Volage Range for Operaion Upper Exended Supply Volage Range for Operaion V S(EXT,LOW) V 2)3) V S(EXT,UP) V (parameer deviaions possible) 1) No subjec o producion es - specified by design. 2) In case of V S volage decreasing: V S(EXT,LOW),MIN =3.1V. In case of V S volage increasing: V S(EXT,LOW),MIN =4.1V. 3) Proecion funcions sill operaive. 3) (parameer deviaions possible) P_ P_ Juncion Temperaure T J C P_ Noe: Wihin he funcional or operaing range, he IC operaes as described in he circui descripion. The elecrical characerisics are specified wihin he condiions given in he Elecrical Characerisics ables. Daa Shee 9 Rev. 1.00

10 High Curren PROFET 12V General Produc Characerisics 4.4 Thermal Resisance Noe: This hermal daa was generaed in accordance wih JEDEC JESD51 sandards. For more informaion, go o Table 6 Thermal Resisance 1) Parameer Symbol Values Uni Noe or Min. Typ. Max. Tes Condiion Thermal Characerizaion Ψ JTOP 3 5 K/W 2) Parameer Juncion-Top Thermal Resisance Juncion-o-Case Thermal Resisance Juncion-o-Ambien 1) No subjec o producion es - specified by design. 2) According o Jedec JESD51-2,-5,-7 a naural convecion on FR4 2s2p board; he Produc (Chip + Package) was simulaed on a mm board wih 2 inner copper layers (2 70 µm Cu, 2 35 µm Cu). Where applicable a hermal via array under he exposed pad conaced he firs inner copper layer. Simulaion done a T A = 105 C, P DISSIPATION = 1 W PCB Seup R hjc K/W 2) simulaed a exposed pad Number P_ P_ R hja 31.8 K/W 2) P_ µm modeled (races, cooling area) 1,5 mm 70 µm, 5% mealizaion* *: means percenual Cu mealizaion on each layer PCB_Zh_1s0p.emf Figure 5 1s0p PCB Cross Secion 1,5 mm 70 µm modeled (races) 35 µm, 90% mealizaion* 35 µm, 90% mealizaion* 70 µm, 5% mealizaion* *: means percenual Cu mealizaion on each layer PCB_Zh_2s2p.emf Figure 6 2s2p PCB Cross Secion Daa Shee 10 Rev. 1.00

11 High Curren PROFET 12V General Produc Characerisics PCB 1s0p mm2 cooling PCB 2s2p / 1s0p fooprin PCB_sim _seup_tsdso14.emf Figure 7 PCB seup for hermal simulaions PCB_ 2s2p_vias_TSDSO14.emf Figure 8 Thermal vias on PCB for 2s2p PCB seup Thermal Impedance Daa Shee 11 Rev. 1.00

12 High Curren PROFET 12V General Produc Characerisics Z hja - BTS7004-1EPP 100 JEDEC 2s2p JEDEC 1s0p mm² JEDEC 1s0p mm² JEDEC 1s0p - fooprin 10 Z hja [K/W] T A = 105 C Time [s] Figure 9 Typical Thermal Impedance. PCB seup according Chaper R hja - BTS7004-1EPP JEDEC 1s0p R hja [K/W] T A = 105 C Cooling area [mm²] Figure 10 Thermal Resisance on 1s0p PCB wih various cooling surfaces Daa Shee 12 Rev. 1.00

13 High Curren PROFET 12V Logic Pins 5 Logic Pins The device has 2 digial pins. 5.1 Inpu Pin (IN) The inpu pin IN acivaes he oupu channel. The inpu circuiry is compaible wih 3.3V and 5V microconroller. The elecrical equivalen of he inpu circuiry is shown in Figure 11. In case he pin is no used, i should be pulled o module GND or device GND pin via R IN = 4.7 kω. VS IN I DI V S(CLAMP) ESD I DI V DI(CLAMP) V DI GND I GND RGND Inpu_IN_INTDIO.emf Figure 11 Inpu circuiry The logic hresholds for low and high saes are defined by parameers V DI(TH) and V DI(HYS). The relaionship beween hese wo values is shown in Figure 12. The volage V IN needed o ensure a high sae is always higher han he volage needed o ensure a low sae. V DI V DI(TH ),MAX V DI(TH) V DI(HYS) V DI(TH ),MIN Inernal channel acivaion signal 0 x 1 x 0 Inpu_VDITH_2.emf Figure 12 Inpu Threshold volages and hyseresis Daa Shee 13 Rev. 1.00

14 High Curren PROFET 12V Logic Pins 5.2 Diagnosis Pin The Diagnosis Enable (DEN) pin conrols he diagnosis circuiry and can be used o rese he lached proecion (Proecion circuiry no disabled by DEN). When DEN pin is se o high, he diagnosis is enabled (see Chaper 9.2 for more deails). When i is se o low, he diagnosis is disabled (IS pin is se o high impedance). The ransiion from high o low of DEN pin clears he proecion lach of he channel depending on he logic sae of IN pin and DEN pulse lengh (see Chaper 8.3 for more deails). The inernal srucure of diagnosis pins is he same as he one of inpu pins. See Figure 11 for more deails. Daa Shee 14 Rev. 1.00

15 High Curren PROFET 12V Logic Pins 5.3 Elecrical Characerisics Logic Pins V S = 6 V o 18 V, T J = -40 C o +150 C Typical values: V S = 13.5 V, T J = 25 C Digial Inpu (DI) pins = IN, DEN Table 7 Elecrical Characerisics: Logic Pins - General Parameer Symbol Values Uni Noe or Min. Typ. Max. Tes Condiion Digial Inpu Volage Threshold Digial Inpu Clamping Volage Digial Inpu Clamping Volage V DI(TH) V See Figure 11 and Figure 12 V DI(CLAMP1) 7 V 1) I DI = 1 ma See Figure 11 and Figure 12 V DI(CLAMP2) V I DI = 2 ma See Figure 11 and Figure 12 Digial Inpu Hyseresis V DI(HYS) 0.25 V 1) Digial Inpu Curren ( high ) See Figure 11 and Figure 12 I DI(H) µa V DI = 2 V See Figure 11 and Figure 12 Digial Inpu Curren ( low ) I DI(L) µa V DI = 0.8 V See Figure 11 and Figure 12 1) No subjec o producion es - specified by design. Number P_ P_ P_ P_ P_ P_ Daa Shee 15 Rev. 1.00

16 High Curren PROFET 12V Power Supply 6 Power Supply The BTS7004-1EPP is supplied by V S, which is used for he inernal logic as well as supply for he power oupu sage. V S has an undervolage deecion circui, which prevens he acivaion of he power oupu sage and diagnosis in case he applied volage is below he undervolage hreshold (V S < V S(OP) ). During power up, he inernal power on signal is se when supply volage (V S ) exceeds he minimum operaing volage (V S > V S(OP) ). 6.1 Operaion Modes BTS7004-1EPP has he following operaion modes in case of V S > V S(OP) : OFF mode ON mode Diagnosis in ON mode Diagnosis in OFF mode Faul The ransiion beween operaion modes is deermined according o hese variables: Logic level a IN pin Logic level a DEN pin Inernal lach Sense curren I IS level The ruh able in case of V S > V S(OP) is shown in Table 8. The behavior of BTS7004-1EPP as well as some parameers may change in dependence on he operaion mode of he device. There are hree parameers describing each operaion mode of BTS7004-1EPP: Saus of he oupu channel Saus of he diagnosis Curren consumpion a VS pin (measured by I VS in OFF mode, I GND in all oher operaive modes) Table 8 Operaion Mode ruh able IN DEN Inernal I IS Operaive Mode Commen lach L L L leakage OFF DMOS channel is OFF L L H leakage OFF DMOS channel is OFF L H L leakage OFF_DIAG Diagnosic in OFF-mode open load Diagnosic in OFF-mode L H H faul Diagnosic in OFF-mode H L L leakage ON DMOS channel is ON, no diagnosic H L H leakage faul DMOS channel is swiched OFF due o failure H H L I IS ON_DIAG DMOS channel is ON and diagnosic H H H faul faul DMOS channel is swiched OFF due o failure Daa Shee 16 Rev. 1.00

17 High Curren PROFET 12V Power Supply OFF mode When BTS7004-1EPP is in OFF mode, he oupu channel is OFF. The curren consumpion is minimum (see parameer I VS(OFF) ). No Overemperaure, Overload proecion mechanism and no diagnosis funcion is acive when he device is in OFF mode ON mode ON (IN = High; DEN = Low) mode is he normal operaion mode of BTS7004-1EPP. Device curren consumpion is specified wih I GND(ON_D) + I IS(OFF) (measured a GND pin because he curren a VS pin includes he load curren). Overcurren and Overemperaure proecions are acive. No diagnosis funcion is acive OFF_Diag mode The device is in OFF_Diag mode as long as DEN pin is se o high and IN pin is se o low. The oupu channel is OFF. If an open load case happens, an Open Load in OFF curren I IS(OLOFF) may be presen a IS pin. In such siuaion, he curren consumpion of he device is increased ON_Diag mode The device is in normal ON mode wih curren sense funcion. I IS or I IS(FAULT) will be presen a IS pin. Device curren consumpion is specified wih I GND(ON_D). Depending on he load condiion, eiher a faul curren I IS(FAULT) or I IS curren may be presen a IS pin Faul mode The device is in Faul mode as soon as a proecion even happens which affecs ha he device swiches off due o is proecion funcion. In Faul mode, a I IS(FAULT) signal is presening a IS pin during he DEN signal is "high". 6.2 Undervolage on V S Beween V S(OP) and V S(UV) he undervolage mechanism is riggered. If he device is operaive (in ON mode) and he supply volage drops below he undervolage hreshold V S(UV), he inernal logic swiches OFF he oupu channel. As soon as he supply volage V S is above he operaive hreshold V S(OP), he channel is swiched ON again. The resar is delayed wih a ime DELAY(UV) which proecs he device in case he undervolage condiion is caused by a shor circui even (according o AEC-Q ), as shown in Figure 13. If he device is in OFF mode and he inpu is se o high, he channel will be swiched ON if V S > V S(OP) wihou waiing for DELAY(UV). Daa Shee 17 Rev. 1.00

18 High Curren PROFET 12V Power Supply V S V S(OP) V S(UV) V S(HYS) Channel acivaion signal V OUT DELAY(UV) PowerSupply_UVRVS.emf Figure 13 V S undervolage behavior Daa Shee 18 Rev. 1.00

19 High Curren PROFET 12V Power Supply 6.3 Elecrical Characerisics Power Supply V S = 6 V o 18 V, T J = -40 C o +150 C Typical values: V S = 13.5 V, T J = 25 C Typical resisive load conneced o he oupu for esing (unless oherwise specified): R L = 2.1 Ω Table 9 Elecrical Characerisics: Power Supply - General Parameer Symbol Values Uni Noe or Min. Typ. Max. Tes Condiion VS pin Power Supply Undervolage Shudown Power Supply Minimum Operaing Volage Power Supply Undervolage Shudown Hyseresis Power Supply Undervolage Recovery Time Breakdown Volage beween GND and VS Pins in Reverse Baery 1) No subjec o producion es - specified by design. V S(UV) V V S decreasing IN = high From V DS 0.5 V o V DS = V S See Figure 13 V S(OP) V V S increasing IN = high From V DS = V S o V DS 0.5 V See Figure 13 V S(HYS) 0.7 V 1) V S(OP) - V S(UV) See Figure 13 DELAY(UV) ms dv S /d 0.5 V/µs V S -1 V See Figure 13 -V S(REV) V 1) I GND(REV) = 7 ma T J = 150 C Number P_ P_ P_ P_ P_ Elecrical Characerisics Power Supply - Produc Specific BTS7004-1EPP Daa Shee 19 Rev. 1.00

20 High Curren PROFET 12V Power Supply Table 10 Elecrical Characerisics: Power Supply BTS7004-1EPP Parameer Symbol Values Uni Noe or Min. Typ. Max. Tes Condiion Supply Curren Consumpion in OFF Mode wih Loads Supply Curren Consumpion in OFF Mode wih Loads Operaing Curren in ON_Diag Mode (Channel ON) Operaing Curren in OFF_Diag Mode 1) No subjec o producion es - specified by design. I VS(OFF) µa 1) V S = 18 V V OUT = 0 V IN = DEN = low T J 85 C I VS(OFF) 5 20 µa V S = 18 V V OUT = 0 V IN = DEN = low T J = 150 C I GND(ON_D) 2 3 ma V S = 18 V IN = DEN = high I GND(OFF_D) ma V S = 18 V IN = low ; DEN = high Number P_ P_ P_ P_ Daa Shee 20 Rev. 1.00

21 High Curren PROFET 12V Power Sages 7 Power Sages The high-side power sage is buil using a N-channel verical Power MOSFET wih charge pump. 7.1 Oupu ON-Sae Resisance The ON-sae resisance R DS(ON) depends mainly on juncion emperaure T J. Figure 14 shows he variaion of R DS(ON) across he whole T J range. The value 2 on he y-axis corresponds o he maximum R DS(ON) measured a T J = 150 C R DS(ON) variaion over T J 2.00 Reference value: "2" = R 150 C R DS(ON) variaion facor Typical Juncion Temperaure ( C) Figure 14 R DS(ON) variaion facor The behavior in Reverse Polariy is described in Chaper Swiching loads Swiching Resisive Loads When swiching resisive loads, he swiching imes and slew raes shown in Figure 15 can be considered. The swich energy values E ON and E OFF are proporional o load resisance and imes ON and OFF. Daa Shee 21 Rev. 1.00

22 High Curren PROFET 12V Power Sages V IN(TH) IN V OUT V IN(HYS) 90% of V S ON OFF(DELAY) 70% of V S 70% of V S (dv/d) ON -(dv/d) OFF 30% of V S 30% of V S 10% of V S ON(DELAY) OFF P DMOS E ON E OFF Power S age_swichres.emf Figure 15 Swiching a Resisive Load Swiching Inducive Loads When swiching OFF inducive loads wih high-side swiches, he volage V OUT drops below ground poenial, because he inducance inends o coninue driving he curren. To preven he desrucion of he device due o overvolage, a volage clamp mechanism is implemened. The clamping srucure limis he negaive oupu volage so ha V DS = V DS(CLAMP). Figure 16 shows a concep drawing of he implemenaion. The clamping srucure is available in all operaion modes lised in Chaper 6.1. V S High-side Channel VS V DS V SIS(CLAMP) V DS(CLAMP) IS I L V S(CLAMP) OUT V OU T RSENSE GND I L L, R L RGND PowerSage_Clamp_INTDIO_1CH.emf Figure 16 Oupu Clamp concep Daa Shee 22 Rev. 1.00

23 High Curren PROFET 12V Power Sages During demagneizaion of inducive loads, energy has o be dissipaed in BTS7004-1EPP. The energy can be calculaed wih Equaion (7.1): E = V S V DS CLAMP 1 R L I L ln I L V DS CLAMP R L V S V DS CLAMP L R L (7.1) The maximum energy, herefore he maximum inducance for a given curren, is limied by he hermal design of he componen. Please refer o Chaper 4.2 for he maximum allowed values of E AS (single pulse energy) and E AR (repeiive energy) Oupu Volage Limiaion To increase he curren sense accuracy, V DS volage is moniored. When he oupu curren I L decreases while he channel is diagnosed (DEN pin se o high - see Figure 17) bringing V DS equal or lower han V DS(SLC), he oupu DMOS gae is parially discharged. This increases he oupu resisance so ha V DS = V DS(SLC) even for very small oupu currens. The V DS increase allows he curren sensing circuiry o work more efficienly, providing beer k ILIS accuracy for oupu curren in he low range. IN DEN I L V DS V S V DS(SLC) PowerSage_GBR_diag_HEAT.emf Figure 17 Oupu Volage Limiaion acivaion during diagnosis 7.3 Advanced Swiching Characerisics Inverse Curren behavior When V OUT > V S, a curren I INV flows ino he power oupu ransisor (see Figure 18). This condiion is known as Inverse Curren. If he channel is in OFF sae, he curren flows hrough he inrinsic body diode generaing high power losses herefore an increase of overall device emperaure. If he channel is in ON sae, R DS(INV) can be expeced and power dissipaion in he oupu sage is comparable o normal operaion in R DS(ON). During Inverse Curren condiion, he channel remains in ON or OFF sae as long as -I L < -I L(INV). Wih InverseON, i is possible o swich ON he channel during Inverse Curren condiion as long as -I L < -I L(INV) (see Figure 19). Daa Shee 23 Rev. 1.00

24 High Curren PROFET 12V Power Sages V BAT V S Gae Driver Device Logic INV Comp. OUT -I L V OUT > V S GND RGND PowerSage_Inverse_HE AT.emf Figure 18 Inverse Curren Circuiry IN CASE 1 : Swich is ON IN CASE 2 : Swich is OFF I L ON I L OFF NORMAL INVERSE NORMAL NORMAL INVERSE NORMAL DMOS sae DMOS sae ON OFF CASE 3 : Swich ON ino Inverse Curren CASE 4 : Swich OFF ino Inverse Curren IN IN I L OFF ON I L ON OFF NORMAL INVERSE NORMAL NORMAL INVERSE NORMAL DMOS sae DMOS sae OFF ON ON OFF PowerSage_InvCurr_INVON.emf Figure 19 Noe: InverseON - Channel behavior in case of applied Inverse Curren No proecion mechanism like Overemperaure or Overload proecion is acive during applied Inverse Currens. Daa Shee 24 Rev. 1.00

25 High Curren PROFET 12V Power Sages Cross Curren robusness wih H-Bridge configuraion When BTS7004-1EPP is used as high-side swich e.g. in a bridge configuraion (herefore paired wih a low-side swich as shown in Figure 20), he maximum slew rae applied o he oupu by he low-side swich mus be lower han dv OUT / d. Oherwise he oupu sage may urn ON in linear mode (no in R DS(ON) ) while he lowside swich is commuaing. This creaes an unproeced overheaing for he DMOS due o he crossconducion curren. V BAT R/L cable HSS 1 HSS 2 VS VS T T ON (DC) IN IN OFF OUT OUT dv OUT/ d Curren hrough Moor M Cross Curren OFF ON (PWM) PowerSage _PassiveSlew_ PROFET1Ch.emf Figure 20 High-Side swich used in Bridge configuraion Daa Shee 25 Rev. 1.00

26 High Curren PROFET 12V Power Sages 7.4 Elecrical Characerisics Power Sages V S = 6 V o 18 V, T J = -40 C o +150 C Typical values: V S = 13.5 V, T J = 25 C Typical resisive load conneced o he oupu for esing (unless oherwise specified): R L = 2.1 Ω Table 11 Elecrical Characerisics: Power Sages - General Parameer Symbol Values Uni Noe or Min. Typ. Max. Tes Condiion Volages Drain o Source Clamping Volage a T J = -40 C Drain o Source Clamping Volage a T J 25 C 1) Tesed a T J = 150 C. V DS(CLAMP)_ V I L = 5 ma T J = -40 C See Figure 16 V DS(CLAMP)_ V 1) I L = 5 ma T J 25 C See Figure 16 Number P_ P_ Elecrical Characerisics Power Sages Table 12 Elecrical Characerisics: Power Sages Parameer Symbol Values Uni Noe or Number Min. Typ. Max. Tes Condiion Timings Swich-ON Delay ON(DELAY) μs V S = 13.5 V P_ V OUT = 10% V S Swich-OFF Delay OFF(DELAY) μs V S = 13.5 V P_ V OUT = 90% V S Swich-ON Time ON μs V S = 13.5 V P_ V OUT = 90% V S Swich-OFF Time OFF μs V S = 13.5 V P_ V OUT = 10% V S Swich-ON/OFF Maching Δ SW μs V S = 13.5 V P_ ON - OFF Volage Slope Swich-ON Slew Rae (dv/d) ON V/μs V S = 13.5 V P_ V OUT = 30% o 70% of V S Swich-OFF Slew Rae -(dv/d) OFF V/μs V S = 13.5 V V OUT = 70% o 30% of V S P_ Daa Shee 26 Rev. 1.00

27 High Curren PROFET 12V Power Sages Table 12 Elecrical Characerisics: Power Sages (coninued) Parameer Symbol Values Uni Noe or Min. Typ. Max. Tes Condiion Slew Rae Maching Δ(dV/d) SW V/μs V S = 13.5 V P_ (dv/d) ON - (dv/d) OFF Volages Oupu Volage Drop Limiaion a Small Load Currens 1) No subjec o producion es - specified by design V DS(SLC) mv 7.5 Elecrical Characerisics - Power Oupu Sages 1) I OUT = I OUT(OL) = 20 ma Number P_ Power Oupu Sage - 4 mω Table 13 Elecrical Characerisics: Power Sages - 4 mω Parameer Symbol Values Uni Noe or Number Min. Typ. Max. Tes Condiion Oupu characerisics ON-Sae Resisance a R DS(ON)_ mω 1) P_ T J =25 C T J = 25 C ON-Sae Resisance a T J = 150 C R DS(ON)_150 8 mω T J = 150 C P_ ON-Sae Resisance in Cranking ON-Sae Resisance in Inverse Curren a T J = 25 C ON-Sae Resisance in Inverse Curren a T J = 150 C ON-Sae Resisance in Reverse Polariy a T J = 25 C R DS(ON)_CRAN K 10 mω T J = 150 C V S = 3.1 V R DS(INV)_ mω 1) T J = 25 C V S = 13.5 V I L = -4 A DEN = low see Figure 18 R DS(INV)_ mω T J = 150 C V S = 13.5 V I L = -4 A DEN = low R DS(REV)_ mω 1) T J = 25 C V S = V I L = -4 A see Figure 29 P_ P_ P_ P_ Daa Shee 27 Rev. 1.00

28 High Curren PROFET 12V Power Sages Table 13 Elecrical Characerisics: Power Sages - 4 mω (coninued) Parameer Symbol Values Uni Noe or Min. Typ. Max. Tes Condiion ON-Sae Resisance in Reverse Polariy a T J = 150 C R DS(REV)_ mω T J = 150 C V S = V I L = -4 A Nominal Load Curren I L(NOM) 15 A 1) Oupu Leakage Curren a T J 85 C Oupu Leakage Curren a T J = 150 C I L(OFF)_ μa T A = 85 C T J 150 C 1) V OUT = 0 V V IN = low T A 85 C I L(OFF)_ μa V OUT = 0 V V IN = low T A = 150 C Inverse Curren Capabiliy I L(INV) -15 A 1) V S < V OUT IN = high see Figure 18 Volage Slope Passive Slew Rae (e.g. for Half Bridge Configuraion) dv OUT / d 10 V/μs 1) V S = 13.5 V Volages Drain Source Diode Volage V DS(DIODE) mv I L = -190 ma T J = 150 C Swiching Energy Swich-ON Energy E ON 1.4 mj 1) Swich-OFF Energy E OFF 1.65 mj 1) No subjec o producion es - specified by design. V S = 18 V see Figure 15 1) V S = 18 V see Figure 15 Number P_ P_ P_ P_ P_ P_ P_ P_ P_ Daa Shee 28 Rev. 1.00

29 High Curren PROFET 12V Proecion 8 Proecion The BTS7004-1EPP is proeced agains Overemperaure, Overload, Reverse Baery (wih ReverSave ) and Overvolage. Overemperaure and Overload proecions are working when he device is in ON or ON_Diag mode bu no during InverseON and ReverSave funcion. Overvolage proecion works in all operaion modes. Reverse Baery proecion works when he GND and VS pins are reverse supplied. 8.1 Overemperaure Proecion The device incorporaes boh an absolue (T J(ABS) ) and a dynamic (T J(DYN) ) emperaure proecion circuiry for he channel. An increase of juncion emperaure T J above eiher one of he wo hresholds (T J(ABS) or T J(DYN) ) swiches OFF he overheaed channel o preven desrucion. The channel remains swiched OFF unil juncion emperaure has reached he Reacivaion condiion described in Table 14. The behavior is shown in Figure 21 (absolue Overemperaure Proecion) and Figure 22 (dynamic Overemperaure Proecion). T J(REF) is he reference emperaure used for dynamic emperaure proecion. IN DEN I L I L(OVL 0) I L(NOM) T J T J( ABS) I IS I IS = I L k ILIS I IS( FAULT) Inernal lach 0 1 Over_Temperaure_Behaviour.emf Figure 21 Overemperaure Proecion (Absolue) Daa Shee 29 Rev. 1.00

30 High Curren PROFET 12V Proecion IN DEN I L I L(OVL) T J T J( ABS) TJ(DYN) I IS T J(REF) I L / k ILIS I IS(FAULT) Inernal Lach 0 1 Figure 22 Overemperaure Proecion (Dynamic) When he Overemperaure proecion circuiry allows he channel o be swiched ON again, he Inelligen Lach sraegy described in Chaper 8.3 is followed. 8.2 Overload Proecion The BTS7004-1EPP is proeced in case of Overload or shor circui o ground. Two Overload hresholds are defined (see Figure 23) and seleced auomaically depending on he volage V DS across he power DMOS: I L(OVL0) when V DS < 13 V I L(OVL1) when V DS > 22 V Daa Shee 30 Rev. 1.00

31 High Curren PROFET 12V Proecion Figure 23 Overload Curren Thresholds In order o allow a higher load inrush a low ambien emperaure, Overload hreshold is maximum a low emperaure and decreases when T J increases (see Figure 24). I L(OVL0) ypical value remains consan up o a juncion emperaure of +75 C. Figure 24 Overload Curren Thresholds variaion wih T J Daa Shee 31 Rev. 1.00

32 High Curren PROFET 12V Proecion Power supply volage V S can increase above 18 V for shor ime, for insance in Load Dump or in Jump Sar condiion. Whenever V S V S(JS), he overload deecion curren is se o I L(OVL_JS) as shown in Figure 25. I L(OVL ) I L(OVL_ JS) V S(JS) V S Proecion_JS.emf Figure 25 Overload Deecion Curren variaion wih V S volage When I L I L(OVL) (eiher I L(OVL0) or I L(OVL1) ) he channel is swiched OFF. The channel is allowed o be reacivaed according o he inelligen lach sraegy described in Chaper Proecion and Diagnosis in case of Faul Any even ha riggers a proecion mechanism (eiher Overemperaure or Overload) has 2 consequences: The channel swiches OFF and he inernal lach is se o 1 If he diagnosis is acive for he channel, a curren I IS(FAULT) is provided by IS pin (see Chaper for furher deails) The channel can be swiched ON again if all he proecion mechanisms fulfill he reacivaion condiions described in Table 14. Furhermore, he device has he inelligen lach o proec iself agains unwaned repeiive reacivaion in faul condiion. Table 14 Proecion Reacivaion Condiion Faul condiion Swich OFF even Reacivaion condiion Overemperaure T J T J(ABS) or (T J - T J(REF) ) T J(DYN) T J < T J(ABS) and (T J - T J(REF) ) < T J(DYN) (including hyseresis) Overload I L I L(OVL) Device is OFF Inelligen Lach Sraegy A normal condiion, when IN is se o high, he channel is swiched ON. In case of faul condiion he oupu sage laches OFF. There are wo ways o de-lach he swich. Wih IN pin: I is necessary o se he inpu pin o low for a ime longer han DELAY(LR) ( lach rese delay ime) o de-lach he channel.the channel can be allowed o resar only if he lach condiions for he proecion mechanisms are fulfilled (see Table 14 ). Daa Shee 32 Rev. 1.00

33 High Curren PROFET 12V Proecion During he lach rese delay ime, if he inpu is se o high he channel remains swiched OFF and he imer DELAY(LR) is rese. The imer DELAY(LR) resars as soon as he inpu pin is se o low again. The inelligen lach sraegy is shown in Figure 28 (flowchar) and Figure 26 (iming diagram). Wih DEN pin: I is possible o force a rese of he inernal lach wihou waiing for DELAY(LR) by applying a pulse (rising edge followed by a falling edge) o he DEN pin while IN pin is low. The pulse applied o DEN pin mus have a duraion longer han DEN(LR) o ensure a rese of he inernal lach. The iming is shown in Figure 27. IN DELAY(LR) Shor circui o ground I L Inernal lach DEN sis(diag) I IS I IS (FAULT) I IS (FAULT) ON Proecion_Lach_Timing.emf Figure 26 Inelligen Lach Timing Diagram Daa Shee 33 Rev. 1.00

34 High Curren PROFET 12V Proecion IN Shor circui o ground I L Inernal lach 0 < DEN(LR) 1 > DEN(LR) 0 1 DEN sis(diag) sis(diag) sis(diag) I IS I IS (FAULT) I IS (FAULT ) I IS (FAULT) Proecion_Lach_DENforce.emf Figure 27 Inelligen Lach Timing Diagram wih Forced Rese Daa Shee 34 Rev. 1.00

35 High Curren PROFET 12V Proecion START IN is "high" no yes Lach = 1 yes no Reacivaion condiion fulfilled (TJ and / or T / and / or Over Load) no yes Lach = 0 Swich channel ON Yes no DEN pulse > DEN(LR) Faul (Overemperaure or Overload) no yes Swich channel OFF Wai unil DEN pulse > DEN(LR) Lach = 1 Wai unil IN is "low" hen sar couning for Se DEN o high DELAY(LR) IN is "low" no yes yes De-laching wih DEN no Coninue laching for DELAY(LR) no DELAY(LR) elapsed yes Lach = 0 Proecion_PROFET_Flow_PDH.emf Figure 28 Inelligen Lach Flowchar Daa Shee 35 Rev. 1.00

36 High Curren PROFET 12V Proecion 8.4 Addiional proecions Reverse Polariy Proecion In Reverse Polariy condiion (also known as Reverse Baery), he oupu sage is swiched ON (see parameer R DS(REV) ) because of ReverSave feaure which limis he power dissipaion in he oupu sage. Each ESD diode of he logic conribues o oal power dissipaion. The reverse curren hrough he oupu sage mus be limied by he conneced load. The curren hrough digial inpu pins has o be limied as well by an exernal resisor (please refer o he Absolue Maximum Raings lised in Chaper 4.1 and o Applicaion Informaion in Chaper 10). Figure 29 shows a ypical applicaion including a device wih ReverSave. A curren flowing ino GND pin (- I GND ) during Reverse Polariy condiion is necessary o acivae ReverSave, herefore a resisive pah beween module ground and device GND pin mus be presen. -V BAT(REV) High-side Channel VS Microconroller DO I DI R DI DI ReverSave TM OUTn -I L GND IS GND L, C, R -I IS RSENSE RGND -I GND Proecion_RevBa.emf Figure 29 Reverse Baery Proecion (applicaion example) Overvolage Proecion In he case of supply volages beween V S(EXT,UP) and V BAT(LD), he oupu ransisor is sill operaional and follows he inpu pin. In addiion o he oupu clamp for inducive loads as described in Chaper 7.2.2, here is a clamp mechanism available for Overvolage proecion for he logic circui and he oupu channel, monioring he volage beween VS and GND pins (V S(CLAMP) ). 8.5 Proecion agains loss of connecion Loss of Baery and Loss of Load The loss of connecion o baery or o he load has no influence on device robusness when load and wire harness are purely resisive. In case of driving an inducive load, he energy sored in he inducance mus be handled. High Curren PROFET 12V devices can handle he induciviy of he wire harness up o 10 µh wih Daa Shee 36 Rev. 1.00

37 High Curren PROFET 12V Proecion I L(NOM). In case of applicaions where currens and/or he aforemenioned induciviy are exceeded, an exernal suppressor diode (like diode D Z2 shown in Chaper 10) is recommended o handle he energy and o provide a well-defined pah o he load curren Loss of Ground In case of loss of module ground wih he load remaining conneced o ground, he device proecs iself by auomaically swiching OFF (when i was previously ON) or remains OFF, regardless of he volage applied on IN pin. In case of loss of device ground, i is recommended o have a resisor conneced beween any Digial Inpu pin and he microconroller o ensure a channel swich OFF (as described in Chaper 10). Daa Shee 37 Rev. 1.00

38 High Curren PROFET 12V Proecion 8.6 Elecrical Characerisics Proecion V S = 6 V o 18 V, T J = -40 C o +150 C Typical values: V S = 13.5 V, T J = 25 C Typical resisive load conneced o he oupu for esing (unless oherwise specified): R L = 2.1 Ω Table 15 Elecrical Characerisics: Proecion - General Parameer Symbol Values Uni Noe or Min. Typ. Max. Tes Condiion Thermal Shudown T J(ABS) C 1)2) Temperaure (Absolue) See Figure 21 Thermal Shudown T HYS(ABS) 30 K 3) Hyseresis (Absolue) See Figure 21 Thermal Shudown T J(DYN) 80 K 3) Temperaure (Dynamic) See Figure 22 Power Supply Clamping Volage a T J = -40 C Power Supply Clamping Volage a T J 25 C Power Supply Volage Threshold for Overcurren Threshold Reducion in case of Shor Circui 1) Funcional es only. 2) Tesed a T J = 150 C only. 3) No subjec o producion es - specified by design. V S(CLAMP)_ V I VS = 5 ma T J = -40 C See Figure 16 V S(CLAMP)_ V 2) V S(JS) V I VS = 5 ma T J 25 C See Figure 16 3) Seup acc. o AEC- Q Number P_ P_ P_ P_ P_ P_ Elecrical Characerisics Proecion Table 16 Elecrical Characerisics: Proecion Parameer Symbol Values Uni Noe or Min. Typ. Max. Tes Condiion Lach Rese Delay Time afer DELAY(LR) ms 1) Faul Condiion Minimum DEN Pulse DEN(LR) µs 2) Duraion for Lach Rese 1) Funcional es only. 2) No subjec o producion es - specified by design. Number P_ P_ Daa Shee 38 Rev. 1.00

39 High Curren PROFET 12V Proecion 8.7 Elecrical Characerisics Proecion - Power Oupu Sages Proecion Power Oupu Sage - 4 mω Table 17 Elecrical Characerisics: Proecion - 4 mω Parameer Symbol Values Uni Noe or Min. Typ. Max. Tes Condiion Overload Deecion Curren a T J = -40 C Overload Deecion Curren a T J = 25 C Overload Deecion Curren a T J = 150 C 1) Funcional es only. 2) No subjec o producion es - specified by design. I L(OVL0)_ A 1) I L(OVL0)_ A I L(OVL0)_ A 2) T J = -40 C di/d = 0.4 A/µs see Figure 23 2) T J = 25 C di/d = 0.4 A/µs see Figure 23 T J = 150 C di/d = 0.4 A/µs see Figure 23 Overload Deecion Curren I L(OVL1) 72 A 2) a High V DS di/d = 0.4 A/µs see Figure 23 Overload Deecion Curren Jump Sar Condiion I L(OVL_JS) 72 A 2) V S > V S(JS) di/d = 0.4 A/µs Number P_ P_ P_ P_ P_ Daa Shee 39 Rev. 1.00

40 High Curren PROFET 12V Diagnosis 9 Diagnosis For diagnosis purpose, he BTS7004-1EPP provides a sense curren signal (I IS ) a pin IS. In case of disabled diagnosic (DEN pin se o low ), IS pin becomes high impedance. A sense resisor R SENSE mus be conneced beween IS pin and module ground if he curren sense diagnosis is used. R SENSE value has o be higher han 820 Ω (or 400 Ω when a cenral Reverse Baery proecion is presen on he baery feed) o limi he power losses in he sense circuiry. A ypical value is R SENSE = 1.2 kω. Due o he inernal connecion beween IS pin and V S supply volage, i is no recommended o connec he IS pin o he sense curren oupu of oher devices, if hey are supplied by a differen baery feed. See Figure 30 for deails as an overview. VS Oupu Channel T Overemperaure Lach IN DEN IS Pin Conrol Logic I L / k ILIS OUT I IS(FAULT) + V DS(OLOFF) I IS(OLOFF) MUX IS R SENSE Diag nosis_heat_1ch.emf Figure 30 Diagnosis Block Diagram 9.1 Overview Table 18 gives a quick reference o he sae of he IS pin during BTS7004-1EPP operaion. Daa Shee 40 Rev. 1.00

41 High Curren PROFET 12V Diagnosis Table 18 SENSE Signal, Funcion of Applicaion Condiion Applicaion Condiion Inpu level DEN level V OUT Diagnosic Oupu Normal operaion low high ~ GND Z I IS(FAULT) if lach 0 Shor circui o GND ~ GND Z I IS(FAULT) if lach 0 Overemperaure Z I IS(FAULT) Shor circui o V S V S I IS(OLOFF) (I IS(FAULT) if lach 0) Open Load 1) Wih addiional pull-up resisor. 2) The oupu curren has o be smaller han I L(OL). 3) The oupu curren has o be higher han I L(OL). < V S - V DS(OLOFF) > V S - V DS(OLOFF) 1) Z I IS(OLOFF) (in boh cases I IS(FAULT) if lach 0) Inverse curren V OUT > V S I IS(OLOFF) (I IS(FAULT) if lach 0) Normal operaion high ~ V S I IS = I L / k ILIS Overload < V S I IS(FAULT) Shor circui o GND ~ GND I IS(FAULT) Overemperaure Z I IS(FAULT) Shor circui o V S V S I IS < I L / k ILIS Open Load 2) ~ V S I IS = I IS(EN) Under load (e.g. Oupu Volage 3) ~ V S I IS(EN) < I IS < I L(NOM) / k ILIS Limiaion condiion) Inverse curren V OUT > V S I IS = I IS(EN) All condiions n.a. low n.a. Z 9.2 Diagnosis in ON sae A curren proporional o he load curren (raio k ILIS = I L / I IS ) is provided a pin IS when he following condiions are fulfilled: The power oupu sage is swiched ON wih V DS < 2 V The diagnosis is enabled No faul (as described in Chaper 8.3) is presen or was presen and no cleared ye (see Chaper for furher deails) If a hard failure mode is presen or was presen and no cleared ye a curren I IS(FAULT) is provided a IS pin Curren Sense (k ILIS ) The accuracy of he sense curren depends on emperaure and load curren. I IS increases linearly wih I L oupu curren unil i reaches he sauraion curren I IS(SAT). In case of Open Load a he oupu sage (I L close o 0 A), he maximum sense curren I IS(EN) (no load, diagnosis enabled) is specified. This condiion is shown in Daa Shee 41 Rev. 1.00

42 High Curren PROFET 12V Diagnosis Figure 32. The blue line represens he ideal k ILIS line, while he red lines show he behavior of a ypical produc. An exernal RC filer beween IS pin and microconroller ADC inpu pin is recommended o reduce signal ripple and oscillaions (a minimum ime consan of 1 µs for he RC filer is recommended). The k ILIS facor is specified wih limis ha ake ino accoun effecs due o emperaure, supply volage and manufacuring process. Tigher limis are possible (wihin a defined curren window) wih calibraion: A well-defined and precise curren (I L(CAL) ) is applied a he oupu during End of Line es a cusomer side The corresponding curren a IS pin is measured and he k ILIS is calculaed (k I L(CAL) ) Wihin he curren range going from I L(CAL)_L o I L(CAL)_H he k ILIS is equal o k I L(CAL) wih limis defined by Δk ILIS The deraing of k ILIS afer calibraion is calculaed using he formulas in Figure 31 and i is specified by Δk ILIS Diagnosis_dKILIS.emf Figure 31 Δk ILIS calculaion formulas The calibraion is inended o be performed a T A(CAL) = 25 C. The parameer Δk ILIS includes he drif overemperaure as well as he drif over he curren range from I L(CAL)_L o I L(CAL)_H. I IS I IS(OL) I IS(EN) I L(OL) I L Diagnosis_ OLON _adv.emf Figure 32 Curren Sense Raio in Open Load a ON condiion Faul Curren (I IS(FAULT) ) As soon as a proecion even occurs, he value of he inernal lach (see Chaper 8.3 for more deails) is changed from 0 o 1, a curren I IS(FAULT) is provided by pin IS when DEN is se o high and he affeced device is swiched OFF. If inernal lach is 1, and i is no rese, he curren I IS(FAULT) is provided each ime he device diagnosis is acivaed by DEN=High. Figure 33 shows he relaion beween I IS = I L / k ILIS, I IS(SAT) and I IS(FAULT). Daa Shee 42 Rev. 1.00

43 High Curren PROFET 12V Diagnosis I IS I IS (SA T).max I IS (SA T) I IS (FA ULT).max I IS (FA ULT ) I IS (SA T).min I IS (FA ULT).min I L / k ILI S I L(OVL).min I L(OVL).max I L Figure 33 SENSE behavior - overview Diagnosis HEAT IISFAULT IISSAT.emf 9.3 Diagnosis in OFF sae When a power oupu sage is in OFF sae, he BTS7004-1EPP can measure he drain-source volage and compare i wih a hreshold volage. In his way, using some addiional exernal componens (a pull-down resisor and a swichable pull-up curren source), i is possible o deec if he load is missing or if here is a shor circui o baery. If a Faul condiion was deeced by he device (if inernal lach is 1, faul curren is provided by IS pin independend of drain-source or oupu volage, as long as DEN=High) a curren I IS(FAULT) is provided by IS pin each ime he channel diagnosis is checked also in OFF sae. See Chaper for furher deails Open Load curren (I IS(OLOFF) ) In OFF sae, when DEN pin is se o high, he V DS volage is compared wih a hreshold volage V DS(OLOFF). If he load is properly conneced and here is no shor circui o baery, V DS ~ V S herefore V DS > V DS(OLOFF). When he diagnosis is acive and V DS V DS(OLOFF), a curren I IS(OLOFF) is provided by IS pin. Figure 34 shows he relaionship beween I IS(OLOFF) and I IS(FAULT) as funcions of V DS. The wo currens do no overlap making always possible o differeniae beween Open Load in OFF and Faul condiion. Daa Shee 43 Rev. 1.00

44 High Curren PROFET 12V Diagnosis I IS I IS(FAULT) I IS(OLOFF) V DS(OLOFF) V DS Diagnosis_PROFET_IISOL OFF.emf Figure 34 I IS in OFF Sae I is necessary o wai a ime IS(OLOFF)_D beween he falling edge of he inpu pin and he sensing a pin IS for Open Load in OFF diagnosis o allow he inernal comparaor o sele. In Figure 35 he imings for an Open Load deecion are shown - he load is always disconneced. IN DEN V OUT ~ V S IS(OLOFF)_D V DS(OLOFF) Load conn eced I IS I IS(OLOFF) I IS(OL) Diagnosis_PROFET_OLOFF_ime.emf Figure 35 Open Load in OFF Timings - load disconneced 9.4 SENSE Timings Figure 36 shows he iming during seling sis(on) and disabling sis(off) of he SENSE (including he case of load change). As a proper signal canno be esablished before he load curren is sable (herefore before ON ), sis(diag) 3 ( ON_max + sis(on)_max ). Daa Shee 44 Rev. 1.00

45 High Curren PROFET 12V Diagnosis IN OFF ON OFF DEN I L I IS sis(lc) sis(o FF) sis(on) sis(o FF) sis(di AG) Diagnose_PROFET_SENSE_imings_Hea.emf Figure 36 SENSE Seling / Disabling Timing Daa Shee 45 Rev. 1.00

46 High Curren PROFET 12V Diagnosis 9.5 Elecrical Characerisics Diagnosis V S = 6 V o 18 V, T J = -40 C o +150 C Typical values: V S = 13.5 V, T J = 25 C Typical resisive load conneced o he oupu for esing (unless oherwise specified): R L = 2.1 Ω Table 19 Elecrical Characerisics: Diagnosis - General Parameer Symbol Values Uni Noe or Min. Typ. Max. Tes Condiion SENSE Sauraion Curren I IS(SAT) ma 1) V SIS = V S - V IS 2 V See Figure 33 SENSE Leakage Curren when Disabled SENSE Leakage Curren when Enabled a T J 85 C SENSE Leakage Curren when Enabled a T J = 150 C SENSE Operaive Range for k ILIS Operaion (V S - V IS ) I IS(OFF) µa DEN = low V IS = 0 V I IS(EN)_ µa 1) T J 85 C DEN = high I L = 0 A See Figure 32 I IS(EN)_ µa T J = 150 C DEN = high I L = 0 A See Figure 32 V SIS_k V 1) V S = 6 V IN = DEN = high I L 2 * I L(NOM) Number P_ P_ P_ P_ P_ SENSE Operaive Range for Open Load a OFF Diagnosis (V S - V IS ) SENSE Operaive Range for Faul Diagnosis (V S - V IS ) Power Supply o IS Pin Clamping Volage a T J =-40 C Power Supply o IS Pin Clamping Volage a T J 25 C V SIS_OL V 1) No subjec o producion es - specified by design. 2) Tesed a T J = 150 C. 1) V S = 6 V IN = low DEN = high V SIS_F V V S = 6 V IN = low DEN = high lach 0 V SIS(CLAMP)_ V I IS = 1 ma 40 T J = -40 C See Figure 16 V SIS(CLAMP)_ V 2) 1) I IS = 1 ma T J 25 C See Figure 16 P_ P_ P_ P_ Daa Shee 46 Rev. 1.00

47 High Curren PROFET 12V Diagnosis Elecrical Characerisics Diagnosis Table 20 Elecrical Characerisics: Diagnosis Parameer Symbol Values Uni Noe or Number Min. Typ. Max. Tes Condiion SENSE Faul Curren I IS(FAULT) ma P_ SENSE Open Load in OFF Curren I IS(OLOFF) ma P_ SENSE Open Load in OFF Delay Time Open Load V DS Deecion Threshold in OFF Sae SENSE Seling Time wih Nominal Load Curren Sable IS(OLOFF)_D µs V DS < V OL(OFF) from IN falling edge o V IS = R SENSE * 0.9 * I IS(OLOFF),MIN DEN = high 9.6 Elecrical Characerisics Diagnosis - Power Oupu Sages P_ V DS(OLOFF) V P_ sis(on) 5 40 µs I L = I L(NOM) DEN from low o high SENSE Disable Time sis(off) 5 20 µs 1) SENSE Seling Time afer Load Change 1) No subjec o producion es - specified by design. sis(lc) 5 20 µs 1) From DEN falling edge o I IS = I IS(OFF) See Figure 36 from I L = I L_16 o I L = I L_18 See Figure 36 P_ P_ P_ Diagnosis Power Oupu Sage - 4 mω Table 21 Elecrical Characerisics: Diagnosis - 4 mω Parameer Symbol Values Uni Noe or Number Min. Typ. Max. Tes Condiion Open Load Oupu Curren I L(OL)_4u ma I IS = I IS(OL) = 4 µa P_ a I IS = 4 µa Curren Sense Raio a k ILIS04-65% % I L04 = 50 ma P_ I L = I L04 Curren Sense Raio a I L = I L07 k ILIS07-65% % I L07 = 200 ma P_ Daa Shee 47 Rev. 1.00

48 High Curren PROFET 12V Diagnosis Table 21 Elecrical Characerisics: Diagnosis - 4 mω (coninued) Parameer Symbol Values Uni Noe or Min. Typ. Max. Tes Condiion Curren Sense Raio a k ILIS09-55% % I L09 = 450 ma P_ I L = I L09 Curren Sense Raio a k ILIS13-40% % I L13 = 2 A P_ I L = I L13 Curren Sense Raio a k ILIS16-24% % I L16 = 5.5 A P_ I L = I L16 Curren Sense Raio a k ILIS18-8% % I L18 = 10 A P_ I L = I L18 Curren Sense Raio a I L = I L19 k ILIS19-8% % 1) I L19 = 15 A P_ SENSE Curren Deraing wih Low Curren Calibraion SENSE Curren Deraing wih Nominal Curren Calibraion 1) No subjec o producion es - specified by design. Δk ILIS(OL) % 1) Δk ILIS(NOM) % 1) I L(CAL) = I L07 I L(CAL)_H = I L09 I L(CAL)_L = I L04 T A(CAL) = 25 C I L(CAL) = I L18 I L(CAL)_H = I L19 I L(CAL)_L = I L16 T A(CAL) = 25 C Number P_ P_ Daa Shee 48 Rev. 1.00

49 High Curren PROFET 12V Applicaion Informaion 10 Applicaion Informaion Noe: The following informaion is given as a hin for he implemenaion of he device only and shall no be regarded as a descripion or warrany of a cerain funcionaliy, condiion or qualiy of he device Applicaion seup V BAT R/L cable T 1 Opional elemens marked in grey C VS D Z2 V DD VDD GPIO R IN IN0 VS Conrol T R OL R/L cable GPIO R DEN DEN Proecion OUT0 Microconroller Diagnosis C OUT R PD A/D IN R AD R IS_PROT IS GND R LOAD C SENSE VSS D Z1 RSENSE R GND App_1ch_hea.emf Figure 37 BTS7004-1EPP Applicaion Diagram Noe: This is a very simplified example of an applicaion circui. The funcion mus be verified in he real applicaion. Daa Shee 49 Rev. 1.00