Effects of Scaling on Modeling of Analog RF MOS Devices
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1 Effects of Scaling on Modeling of Analog RF MOS Devices Y. Liu, S. Cao, T.-Y. Oh 1, B. Wu, O. Tornblad 2, R. Dutton Center for Integrated Systems, Stanford University 1 LG Electronics 2 Infineon Technologies
2 Outline Thermal noise modeling Impedance Field Method (IFM) Hydrodynamic transport Low frequency noise in high-k devices Large signal distortion and harmonic balance (HB) method
3 Impedance Field Method MOS noise modeling using IFM, due to Shockley et al., 1966 Def. of impedance field: A k v = ( r ) Power spectral density of local noise source: ( r ) Current fluctuatio n at kth electrode v Injected current at r in the device = v 2 v dv k in Noise at k-th electrode: S A ( r ) S ( r ) k S in v
4 Equivalent Circuit for Drain IF Pinch-off 1 A d 0 0 L L channel position For ideal long channel MOS: A R + 1/ g s ( x) = x / L' d = R s m Modeling of MOS in saturation region for drain impedance field calculation. r o ( x) A d ( x) ro ( x) gm local AC resistance
5 Equivalent Circuit for Gate IF A g 0 0 L L channel position A g channel position Circuit modeling of impedance field generation for gate current noise: capacitive coupling between gate and channel distributed RC network model 0 0 L L
6 Hydrodynamic Model Transport equation set: Corrections to local noise source: (T.-Y. Oh, Ph.D. dissertation) v j v j v s v s + ( ε ψ ) = q( p n + N N ) n p n p = q( G R) = q( G R) v = j n ψ 3 / 2qn v = j ψ 3 / 2qp p ( v v ) ( v pt vt 0 )/ τ pε DD local noise source: S in = 4kBqnµ ntl Einstein relation correction based on Monte Carlo: D = k T µ µ / µ ( ) q B c 0 0 / Correction due to coupling of energy/velocity fluctuations: S in = D nt A T 0 / τ nε ( µ / µ ) [ 2 1/ ( 1+ αv αv )] 2 2 4q nµ vtn 0 Tn T 0
7 Impedance Fields in Ultra-Scaled MOS HD DD A A 2 For drain noise For gate noise Well-tempered ultra-scaled MOS devices: L g =30nm (device structure and doping profiles from D. Connelly, TED 2006); Significant difference of DD and HD simulation results.
8 Distributions of Noise Contribution DD w/ v_sat DD w/o v_sat source junction HD Drain noise contribution Gate noise contribution HD gives greater drain noise contribution at source junction: near-ballistic transport; source junction resistance more important DD w/o velocity saturation results closer to HD results
9 Excess Noise Parameters HD HD DD DD Drain noise parameter Gate noise parameter DD transport model gives only moderate increase in γ and δ as channel length decreases HD transport model predicts much higher γ and δ for aggressively scaled channel length devices: hot carrier effects
10 Devices with High-κ Gate Stacks Various charge transport processes in high-k devices Charge trapping induced V T instabilities High-k gate stacks: improved electrostatic control with tolerable leakage Various charge transport processes: scattering, tunneling, trapping Non-negligible charge trapping may degrade low freq. noise performance
11 Modeling of 1/f Noise Log (noise power) GR Flicker 1/f 1/f 2 thermal Distributed trap times Log (freq) Expected freq. behavior of various noise components. Unified model to consider both carrier number and mobility fluctuations (Vandamme & Vandamme, TED, 2000 )
12 Simulated Low Frequency Noise Thermal Vd=0.1V Vg=0.4V Significant 1/f noise in high-k devices Transition from 1/f to 1/f 2 due to reduced trap density in interfacial layer Channel length scaling: 1/f increases faster than thermal noise
13 Large Signal Distortion Steady state response of periodic or quasi-periodic inputs input nonlinear system output Limitation of traditional transient simulations Poor performance in the presence of widely separated spectral components
14 Harmonic Balance Method A nonlinear frequency-domain analysis technique: Well-suited for handling multi-tone steady state distortion problems (device analysis: B. Troyanovsky, SASIMI 96) N state eqs. after discretization M tone stimulus Harmonic expansion and truncation Fourier transform: (2H+1)N nonlinear eqs. (2H+1)N unknowns Newton iteration & Linear solver: =0 (2H+1)N Harmonic components
15 Effects of Nonlinear Capacitance Case A: Lg=40nm, 2 Halos Case B: Lg=68nm, 2 Halos Case C: Lg=68nm, drain Halo removed small-signal C-V simulations: largest Cgd for case C: due to the removal of halo smallest Csd for case B: increased effective channel length
16 Summary Thermal noise modeling: Usefulness of impedance field method Higher order transport to be considered for scaled devices Low frequency noise modeling: Local noise source modeling for high-k gate stack Increased significance in scaled devices Large signal distortion and HB analysis Impact of channel length and doping Indication of nonlinear cap. effects
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