FP7 (CULV) BLOCK DIAGRAM

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1 FP (ULV) LOK IGRM P STK UP 0 L HI TOP GN IN IN V OT PU SU00 eleron FS /00/0 P (G) 0W PGE,, PU THERML SENSOR PGE LK_PU_LK,LK_PU_LK# LK_MH_LK,LK_MH_LK# LK_PIE_VG,LK_PIE_VG#.MHz LOK GEN RTMN-0-V-GRT PGE RIII-on board G Rx *pcs PGE, RIII-SOIMM PGE RIII 0 MTs RIII 0 MTs NORTH RIGE antiga SFF GS PGE ~ LVS RT PIE L ONN PGE RT PGE HMI level shift Parade PS0 PGE HMI ON PGE MI LINK.KHz NSRLK, NSRLK# SYSTEM HRGER(ISLHZ-T) PGE SYSTEM POWER RT0 PGE ST -." H & SS PGE ST0 0M P (FG) SOUTH RIGE IH-M SFF P (FG) US.0 0, US.0 Ports X PGE PI-E Webcam PGE luetooth PGE WWN PGE SIM ard PGE ard Reader PGE R III SMR_VTERM.VSUS(RT0) GMH +.0V (RT0) PU ORE RT SYSTEM ISHRGER +.V/LN/S PGE PGE 0 PGE PGE Keyboard Touch Pad PGE PGE.KHz LP ENE K K PGE PGE ~0 igital microphone PGE, zalia nalog ITH0 pin,qfn PGE Jack to Speaker PGE X Mini PI-E ard Wlan (Half Minicard Wireless ) PGE LN 0/00 RTL0EL-GR PGE FN PGE SPI PGE udio Jacks (Phone/ MI combo connect) PGE UMT_--_ SOT_-_- sc0-_-_-p S0 SOT S0 PROJET : FP Quanta omputer Inc. Size ocument Number Rev N ustom lock iagram ate: Thursday, May, 00 Sheet of

2 /.el Vcc_H R (short00).,, 0,, R G, foot print P.opv-0 update net import, swap pin.pr net change from +VSUS to +VSUS..PR net change from +0VLW to +VLW..NET NME hange from R_LK_VG_OE# to R_LK_WWN_OE#..NET NME hange from LK_VG_OE# to LK_WWN_OE#..New add R,R, R0 RT_R,RT_G,RT_ for EMI /.New add for RT RG EMI.New add GN P Footprint SP-RE0x.del T00,T0,T0,T0. /.update power schematic for LV cup. /.update rename..el H0,H0.. and..new K test P on GPX and GPX.hange footprint N,N,N,N,N,N,PL,PL,PL.New add for EMI..R Footprint change to R00.hange LN from G to 0/00( Transformer).WWN--->New add R,R0,,,. 0.EL NET-->MI+,MI-,MI+,MI-.. R,,R,R for HSYN VSYN. Title <Title> Size ocument Number Rev <oc> <Revod ate: Thursday, May, 00 Sheet of

3 +V L H0KF-T_ L0 +V_K_PU H0KF-T_ 0U/.V_ L H0KF-T_ +V R 0K/F_ = overclocking of PU and SR not llowed TME 0U/.V_ 0U/.V_ PT_SM PLK_SM 0.U/0V_ Q MEN00E +V_K_MIN 0.U/0V_ 0.U/0V_ 0.U/0V_ 0.U/0V_ P/0V_ +V_K_MIN 0 0.U/0V_ 0.U/0V_ 0.U/0V_ Q MEN00E +V +V R0.K/F_ hange to p Y X. G_XIN.MHZ GF P/0V_ 0.U/0V_.MHz 0PPM,L=0PF 0.U/0V_ R.K/F_ GT_SM GLK_SM G_XOUT SI- P/0V_ K_PWG 0.U/0V_ *00K/F_ +V_K_MIN +V_K_PU +V_K_MIN PU_SEL R0 R, GLK_SM, GT_SM G_XIN G_XOUT *0_/S FS PV- U VPLL V VPI VREF VSR VPU VI/O VPLLI/O VSRI/O VSRI/O VSRI/O VPU_IO N X X K_PWRG/P# FSL/TEST_MOE SLK ST GN GN GN GNPU GNPI 0 GNREF GNSR GNSR GNSR EP K0 Realtek Silego K0 RTMN-0-V-GRT QFN RTMN-0-V-GR SLGSPVTR,,0,,,,,,,0,,,,,,,, +V,,,,,,0,,0,0, +.0V PULKT0 0 PULK0 PULKT PULK PUT_ITP/SRT PU_ITP/SR 0 OTT_/SRT0 OT_/SR0 MHz_Nonss/SRLK/SE Mhz_ss/SRL/SE SRLKT/STL SRLK/STL SRLK/R#_ SRLKT/R#_ SRLKT SRLK PI_STOP# PU_STOP# SRLKT SRLK SRLKT/R#_F 0 SRLK/R#_E SRLKT SRLK SRLKT0 SRLK0 0 SRLK/R#_G SRLKT/R#_H PILK0/R#_ 0 PILK/R#_ PILK/TME PILK PILK/_SELET PI_F/ITP_EN US_MHZ/FSL FSL/TST_SL/REF M_NONSS M_SS R_LK_MINI_OE# R_LK_ST_OE# R_LK_WWN_OE# R_LK_MH_OE# TME R_PLK_K M_SEL L LSP000 ITP_EN FS FS LK_PU_LK LK_PU_LK# LK_MH_LK LK_MH_LK# LK_PU_ITP LK_PU_ITP# REFLK REFLK# *P T *P T LK_PIE_WWN LK_PIE_WWN# REFSSLK REFSSLK# LK_PIE_GPLL LK_PIE_GPLL# PM_STPPI# PM_STPPU# LK_PIE_IH LK_PIE_IH# LK_PIE_LN LK_PIE_LN# LK_PIE_ST LK_PIE_ST# LK_PIE_WLN LK_PIE_WLN# R R /F_ /F_ R /F_ R /F_ R _ R _ R _ R _ R0 _ R#_ R#_ R#_G R#_H R0.K/F_ PU_SEL0 R 0K/F_ PU_SEL R _ SR, SR 0, SR SR 0 LK_MINI_OE# LK_ST_OE# LK_WWN_OE# LK_MH_OE# PLK_LP_EUG PLK_LP_K0 LK_MH_OE# LKREQ LK_MH_OE# LK_VG_OE# LK_ST_OE# LK_MINI_OE# PLK_IH LK_M_R LK_M_US LK_M_IH R SR Port SR SR SR SR0 0K/F_ 0 +V 0=UM M_SEL R 0K/F_ M_SEL PIN 0=UM PIN0 PIN OTT OT PIN PIN SRT/LT_00 SRT/LT_00 = External VG SRT0 SR0 Mout-NSS Mout-SS LK_MINI_OE# LK_WWN_OE# LK_ST_OE# R R R *P/0V_ *P/0V_ PLK_LP_K0 PLK_IH 0K/F_ 0K/F_ 0K/F_ +V R 0K/F_ ITP_EN For Realtek reserve R_PLK_K R *0K/F_ PU lock select PU_SEL0 R0 K/F_ PU_SEL0 MH_SEL0 PU_SEL R K/F_ PU_SEL MH_SEL +.0V R K/F_ PU_SEL PU_SEL R K/F_ MH_SEL +.0V R K/F_ K to N only when XP is implement.no XP can use 0 ohm R0 K/F_ FS FS FS PU SR PI RSV 00 *0P/0V_ *P/0V_ *0P/0V_ LK_M_R PLK_LP_EUG LK_M_US *P/0V_ LK_M_IH for EMI PROJET : FP Quanta omputer Inc. Size ocument Number Rev N ustom lock Generator ate: Thursday, May, 00 Sheet of

4 H_#[..] H_ST#0 H_REQ#[0..] H_ST# H_0M# H_FERR# H_IGNNE# H_STPLK# H_INTR H_NMI H_SMI# H_#[..] H_REQ#[0..] H_#[..] U H_# P H_# V []# S# H_# W []# NR# H_# T []# PRI# H_# []# H_# []# EFER# H_# T []# RY# H_#0 []# SY# H_# [0]# H_# []# R0# H_# []# H_# E []# IERR# H_# []# INIT# H_# []# Y []# LOK# ST[0]# H_REQ#0 R RESET# H_REQ# R REQ[0]# RS[0]# H_REQ# U REQ[]# RS[]# H_REQ# P REQ[]# RS[]# H_REQ# W REQ[]# TRY# REQ[]# H_# N HIT# H_# K []# HITM# H_# G []# H_#0 T []# PM[0]# H_# K [0]# PM[]# H_# T []# PM[]# H_# H []# PM[]# H_# F []# PRY# H_# J []# PREQ# H_# H []# TK H_# M []# TI H_# P []# TO H_# R []# TMS H_#0 J []# TRST# H_# L [0]# R# H_# M []# H_# U []# THERML H_# P []# H_# R []# N []# PROHOT# ST[]# THERM THERM 0M# F0 FERR# THERMTRIP# IGNNE# R GROUP 0 R GROUP IH F STPLK# LINT0 E LINT SMI# V Y RSV0 G RSV0 L RSV0 J RSV0 F RSV0 H RSV0 RSV0 ONTROL XP/ITP SIGNLS H LK LK[0] LK[] RESERVE M J L N F J M 0 N G K H K L H F Y Y V0 V V W U W V J ITP_PM#0 ITP_PM# ITP_PM# ITP_PM# ITP_PM# ITP_PM# ITP_TK ITP_TI ITP_TO ITP_TMS ITP_TRST# HH_PROHOT# H_THERM H_THERM 0 PM_THRMTRIP# H_THERM T *P H_S# H_NR# H_PRI# H_EFER# H_RY# H_SY# H_R0# R./F_ H_IERR# +.0V H_INIT# H_LOK# H_RESET# H_RS#0 H_RS# H_RS# H_TRY# H_HIT# H_HITM# SYS_RST# R _ +.0V R *0_ H_PROHOT# H_THERM H_THERM PM_THRMTRIP#, LK_PU_LK LK_PU_LK# *P/0V_ H_THERM 0 NPO +.0V R */F_ Layout Note: Place R close to PU. H_RESET# Layout Note: Place voltage divider within 0." of GTLREF pin +.0V R K/F_ R.K/F_ H_#[0..] H_STN#0 H_STP#0 H_INV#0 H_#[0..] H_STN# H_STP# H_INV# R R PU_SEL0 PU_SEL PU_SEL H_#[0..] H_#[0..] H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_# H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_# H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_# H_#0 H_#,,,,,,0,,0,0, U F0 G [0]# E []# J []# H0 []# H []# G []# E []# L []# K []# N []# T0 [0]# M0 []# G []# M []# L []# K0 []# J STN[0]# P0 STP[0]# INV[0]# P V0 []# V []# []# R []# W [0]# N []# U []# []# 0 []# 0 []# []# []# Y0 []# Y []# T [0]# U []# W STN[]# R STP[]# INV[]# V_PU_GTLREF W *K/F_ PU_TEST E GTLREF *K/F_ PU_TEST 0 TEST PU_TEST TEST *0.U/0V_ PU_TEST E TEST PU_TEST Y0 TEST PU_TEST TEST TEST SEL[0] SEL[] SEL[] SL00,QJN T GROUP 0 T GROUP +.0V []# []# []# []# []# []# []# []# [0]# []# []# []# []# []# []# []# STN[]# STP[]# INV[]# T GROUP []# []# [0]# []# []# []# []# []# []# []# []# []# [0]# []# []# []# STN[]# STP[]# INV[]# T GROUP OMP[0] MIS OMP[] OMP[] OMP[] PRSTP# PSLP# PWR# PWRGOO SLP# PSI# P H_# R H_# H0 H_# F0 H_# J H_# G H_# F H_# H H_# M H_#0 N H_# M0 H_# K0 H_# G H_# P0 H_# N H_# L H_# K L J V H_# T H_# V0 H_#0 U H_# W H_# R H_# H_# H_# Y H_# T0 H_# H_# H_# H_#0 0 H_# H_# U H_# Y0 Y E E F G E 0 0 OMP0 OMP OMP OMP PM_PSI# R R R0 R H_#[0..] H_#[0..] H_PRSTP#, H_PSLP# H_PWR# H_PWRG H_PUSLP# T *P For two phase VORE only H_#[0..] 0 H_STN# H_STP# H_INV# H_#[0..] H_STN# H_STP# H_INV#./F_./F_./F_./F_ SL00,QJN +.0V () ITP_TI ITP_TMS ITP_TK ITP_TO ITP_TRST# H_RESET# ITP_TK R LK_PU_ITP# LK_PU_ITP Layout Note: Place couple 0.uF ecoupling caps with in 0." ITP connector. *P T0 *P T *P T *P T *P T /F_ ITP_TMS ITP_TI ITP_PM# R ITP_TK R0 ITP_TRST# R Populate ITP00Flex for bringup R R *0_ R R0 ON TI TMS TK TO TRST# *./F RESET# FO LKN LKP 0 GN0 GN GN 0 GN GN GN +.0V /F_ /F_ /F_ /F_ /F_ VTT0 VTT VTP R# # PM0# PM# PM# PM# PM# PM# N0 N GN_0 0 GN_ *ONN_ITP00Flex +.0V SYS_RST# ITP_PM#0 ITP_PM# ITP_PM# ITP_PM# ITP_PM# ITP_PM# *0.U/0V_ *0.U/0V_ Signal TI TMS TRST# TK TO ITP_EN SL00: JSLUT0 SL00: JSLUT0 SL00: JSLGEQUT0 SL00: JSLGEQUT00 SL00: J0QJNGUT00 SL00: J0QJNUT00 SU00: J0QJPQVT0 SU00: J0QJPQVT00 ITP disable guidelines Resistor Value 0 ohm +/- % onnect To Resistor Placement ohm +/- % VTT Within.0" of the ITP 0 ohm +/- % VTT Within.0" of the ITP ohm +/- % Open GN Within.0" of the ITP GN Within.0" of the ITP R epop VTT Within.0" of the ITP +VRUN lose to K0M Pin PU(P)PENRYN.G SL(FG)TOP/S PU(P)PENRYN.G SL(FG) PU(P)PENRYN.G SLGEQ(G)TOP/S PU(P)PENRYN.G SLGEQ(G) PU(P)SL00.G QJNG(FG)TOP /S PU(P)SL00.G QJN(FG)TOP /S PU(P)SU00.G QJPQ(G)TOP /S PU(P)SU00.G QJPQ(G) *P T PU_TEST *P T0 PU_TEST *P T PU_TEST For the purpose of testability, route these signals through a ground referenced Z0 = ohm trace that ends in a via that is near a GN via and is accessible through an oscilloscope connection. PROJET : FP Quanta omputer Inc. Size ocument Number Rev N ustom Penryn (HOST US) / ate: Monday, May, 00 Sheet of

5 +V_ORE 0U/.V_ 0U/.V_ 0 0U/.V_ 0U/.V_ +V_ORE 0 U/.V_ U/.V_ U/.V_ U/.V_ 0 0U/.V_ 0U/.V_ 0U/.V_ 0U/.V_ U/.V_ 0 U/.V_ U/.V_ U/.V_ +V_ORE 0U/.V_ 0U/.V_ 0U/.V_ 0 0U/.V_ 0U/.V_ 0U/.V_ 0U/.V_ 0U/.V_ 0U/.V_ 0U/.V_ 0U/.V_ 0 0U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ + *0U/.V/ESR +V 0U/.V_ 0U/.V_ 0U/.V_ 0U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ R.K/F_ R0.K/F_ SI- Q MEN00E +V_ORE U F G V[00] V[0] H V[00] V[0] J V[00] V[00] K V[00] V[0] L V[00] V[0] M V[00] V[0] N V[00] V[0] P V[00] V[0] R V[00] V[0] T V[00] V[0] U V[0] V[0] V V[0] V[0] W V[0] V[00] Y V[0] V[0] V[0] V[0] V[0] V[0] V[0] V[0] V[0] V[0] E V[0] V[0] F V[00] V[0] G V[0] V[0] H V[0] V[0] J V[0] V[00] K V[0] V[0] L V[0] V[0] M V[0] V[0] N V[0] V[0] P V[0] V[0] R V[0] V[0] T V[00] V[0] T V[0] V[0] U V[0] V[0] V V[0] V[00] Y V[0] V[0] VP_00 V[0] VP_00 V[0] VP_00 0 V[0] VP_00 V[0] VP_00 V[00] VP_00 0 V[0] VP_00 F0 V[0] VP_00 F V[0] VP_00 H0 V[0] VP_00 H V[0] VP_0 V[0] VP_0 F V[0] VP_0 H V[0] VP_0 K0 V[0] VP_0 K V[00] VP_0 M0 V[0] M V[0] V[0] K V[0] V[0] M V[0] P0 V[0] VI[0] P V[0] VI[] T0 V[0] VI[] T V[0] VI[] V0 V[0] VI[] V V[00] VI[] P V[0] VI[] T V[0] V V[0] Y0 V[0] VSENSE Y V[0] 0 V[0] V[0] SENSE SL00,QJN 0 Y F0 F H0 H F H K0 K M0 M P0 P K M P T0 T V0 V Y0 Y T V Y 0 0 J E G J K L N P R U V W E 0 Y +V_ORE VSENSE SENSE +.0V 0U/.V_ +V_PRO VI0 VI VI VI VI VI VI +V_ORE R0 00/F_ R 00/F_ MLK Q MEN00E MT SI- +V R *0_/S mils +V_LMV R 0K/F_ 0.U/0V_ U0 MLK_THM SLK V MT_THM S XP H_THERM LERT# XN 00P/0V_ PM_THRM_R# OVERT# GN H_THERM G0PU RESS: H SYS_SHN-# *0_/S R PM_THRM# PV- +.V U/0V_ 0U/.V_ V_SENSE _SENSE MLK_THM MLK_THM MT_THM MT_THM R *0_ SYS_SHN# *R0V-0 R *0_/S 0_RST# Q MMT0--F EPWROK,, R0V-0 R 0K/F_ +V PROJET : FP Quanta omputer Inc. Size ocument Number Rev N ustom Penryn & TH Monitor / ate: Monday, May, 00 Sheet of

6 0 +.0V +V_ORE +.0V +.0V Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET : FP N Penryn / ustom Monday, May, 00 Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET : FP N Penryn / ustom Monday, May, 00 Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET : FP N Penryn / ustom Monday, May, 00 U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ UE SL00,QJN UE SL00,QJN _ G _ G _ G _ J _ J _ J _0 L _ L _ L _ N _ N _ N _ R _ R _ R _ U _0 U _ U _ W _ W _ W 0 _ E _ E _ E _ G _ G _ G _ J _ J _ J _00 L _0 L _0 L _0 N _0 N _0 N _0 R _0 R _0 R _0 U _0 U _ U _ W _ W _ W 0 _ E _ E _ G _ G _ J _ J _ L _0 L _ N _ N _ R _ R _ U _ U _ W _ W 0 _ E _ E _ G _ G _ J _ J _ L _0 L _ N _ N _ R _ R _ U _ U _ W _ W 0 _ E _ G _ H0 _ M _ J _0 L _ N _ M0 _ T _ R _ U _ W _ T0 _ Y _0 Y0 _ 0 _ H _ E _ G _ J _ H0 _ M _0 L _ N _ R _ M0 _ T _ V _ W _ W _ Y _ U _00 W _0 T0 _0 _0 _0 _0 _0 _0 _0 _0 _0 E _ F _ G _ H _ K _ K _ M _ M _ P _ P _0 T _ T _ V _ V _ U _ Y _ Y 0 _ F _ F _ H _ H _ K _ K _ M _ M _ P _0 P _ T _ T _ U _ V _ U _ W _ Y _0 E _ G _ J _ L _ N _ R _0 U _ W _ E _ G _ J _ L _ N _ R _0 U _ W E _ G _ W _0 0 U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U SL00,QJN U SL00,QJN [0] M [] W [00] F [00] [00] [00] F [00] H [00] K [00] M [00] P [00] T [0] V [0] Y [0] [0] [0] F [0] H [0] K [0] M [0] P [00] Y [0] V [0] T [0] V [0] Y [0] [0] [0] [0] E [0] G [00] H [0] J [0] L [0] M [0] N [0] R [0] T [0] U [0] W [0] Y [00] [0] [0] [0] E [0] G [0] H [0] J [0] L [0] M [0] N [00] R [0] R [0] T [0] U [0] U [0] W [0] W [0] [0] [0] 0 [00] [0] [0] H [0] [0] K [0] M [0] M [0] P [0] T [0] V [00] T [0] Y [0] [0] [0] Y [0] [0] F [0] H [0] H [0] K [00] M [0] P [] E [] E [0] [] [] [] [] [] [] [] [] [] W [0] R [0] U [0] V [0] W [0] W [0] Y [0] T [00] V [0] [0] [0] [0] [0] [0] [0] [0] E [0] E [00] G [0] G [0] E [0] G [0] J [0] J [0] L [0] N [0] N [0] J [] L [] N [] R [] R [] U [] U [] R [] U [] W [0] W [] W [] [] [] [] [] [] [] E [] E [0] G [] G [] J [] J [] E [] G [] J [] L [] L [] N [0] N [] L [] N [] R [] R [] R [] U [0] L [00] [] W [0] U [] U [] E U/.V_ U/.V_ 0 U/.V_ 0 U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ UF SL00,QJN UF SL00,QJN V_0 V_0 V_0 V_0 V_0 V_0 V_0 V_0 F V_0 F V_0 H V_ H V_ K V_ K V_ M V_ M V_ P V_ P V_ T V_ T V_0 V V_ V V_ Y V_ Y V_ V_ V_ V_ V_ F V_ F V_0 H V_ H V_ K V_ K V_ M V_ M V_ P V_ P V_ T V_ T V_0 V V_ V V_ Y V_ Y V_ V_ V_ V_ V_ V_ V_0 0 V_ V_ V_ F V_ F V_ H V_ H V_ 0 V_ F0 V_ H0 V_0 K V_ K V_ M V_ M V_ K0 V_ M0 V_ P V_ P V_ T V_ T V_0 V V_ V V_ P0 V_ T0 V_ V0 V_ Y V_ Y V_ V_ V_ V_0 V_ Y0 V_ 0 V_ 0 V_ F V_ F V_ H V_ H V_ F0 V_ H0 V_0 K V_ K V_ M V_ M V_ P V_ P V_ K0 V_ M0 V_ P0 V_ T V_00 T V_0 V V_0 V V_0 Y V_0 Y V_0 T0 V_0 V0 V_0 Y0 V_0 V_0 V_0 V_ V_ 0 V_ 0 V_ M V_ P V_ T V_ V V_ Y V_ V_0 VP_00 K VP_0 L VP_0 N VP_0 P VP_0 VP_0 VP_0 VP_0 E VP_0 E VP_0 F VP_00 G VP_0 F VP_0 H VP_0 J VP_0 L VP_0 N VP_0 K VP_0 R VP_0 U VP_0 P VP_00 V VP_0 W VP_0 VP_0 VP_0 VP_0 E VP_0 G VP_0 J VP_0 F VP_0 L VP_00 N VP_0 K VP_0 P VP_0 VP_0 VP_0 VP_0 VP_0 VP_0 E VP_0 F VP_00 F VP_0 G VP_0 H VP_0 H VP_0 J VP_0 K VP_0 K VP_0 L VP_0 L VP_0 M VP_00 N VP_0 N VP_0 K0 VP_0 P VP_0 P VP_0 R VP_0 R VP_0 T VP_0 U VP_0 U VP_00 V VP_0 V VP_0 W VP_0 W VP_0 P0 VP_0 V0 VP_0 Y VP_0 VP_0 VP_0 VP_00 VP_0 VP_0 VP_0 VP_0 0 VP_0 E VP_0 E VP_0 F VP_0 F VP_0 G VP_00 G VP_0 H VP_0 J VP_0 J VP_0 F0 VP_0 K VP_0 K VP_0 L VP_0 L VP_0 N VP_0 N VP_ P VP_ R VP_ R VP_ K0 VP_ P0 VP_ U VP_ U VP_ L VP_ L VP_0 N VP_ N VP_ R VP_ R VP_ U VP_ U VP_ W VP_ W VP_ VP_ VP_0 VP_ VP_ E VP_ E VP_ G VP_ G VP_ J VP_ J VP_ L VP_ L VP_0 N VP_ N VP_ R VP_ R VP_ VP_ VP_0 G VP_0 J VP_0 F

7 0 +.0V R /F_ R 00/F_ R0./F_ H_ROMP H_SWING 0.U/0V_ Layout Note: H_ROMP trace should be 0-mil wide with 0-mil spacing. R K/F_ R K/F_ +.0V H_#[0..] H_RESET# H_PUSLP# H_VREF R *0_/S H_#[0..] H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_# H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_# H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_# H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_# H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_# H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_# H_#0 H_# H_# H_# H_SWING H_ROMP SI- *0_/S R 0.U/0V_ U J H H_#_0 L H_#_ J H_#_ H H_#_ G H_#_ K0 H_#_ K H_#_ L H_#_ M0 H_#_ M H_#_ N H_#_0 L H_#_ K H_#_ M H_#_ K H_#_ P H_#_ W H_#_ V H_#_ V H_#_ P0 H_#_ W H_#_0 N H_#_ P H_#_ U H_#_ V H_#_ U H_#_ W H_#_ V0 H_#_ U H_#_ W H_#_ U H_#_0 H_#_ H_#_ Y H_#_ Y0 H_#_ H_#_ H_#_ 0 H_#_ H_#_ H_#_ H_#_0 H_#_ H_#_ Y H_#_ 0 H_#_ H_#_ H_#_ H_#_ E H_#_ H_#_ H_#_0 E H_#_ G H_#_ G H_#_ E H_#_ K H_#_ F H_#_ J H_#_ H H_#_ F H_#_ H H_#_0 J H_#_ E H_#_ H_#_ H_SWING H_ROMP J G H_PURST# H_PUSLP# L K H_VREF H_VREF GS SL HOST H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_0 H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_0 H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_0 H_#_ H_#_ H_#_ H_#_ H_#_ H_S# H_ST#_0 H_ST#_ H_NR# H_PRI# H_REQ# H_EFER# H_SY# HPLL_LK HPLL_LK# H_PWR# H_RY# H_HIT# H_HITM# H_LOK# H_TRY# H_INV#_0 H_INV#_ H_INV#_ H_INV#_ H_STN#_0 H_STN#_ H_STN#_ H_STN#_ H_STP#_0 H_STP#_ H_STP#_ H_STP#_ H_REQ#_0 H_REQ#_ H_REQ#_ H_REQ#_ H_REQ#_ H_RS#_0 H_RS#_ H_RS#_ L F G J K F J J G J L L G 0 K F K0 F0 F 0 F0 E H0 J G H F L N G K N F L M Y F J L G G F F G H_# H_# H_# H_# H_# H_# H_# H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_# H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_# H_#0 H_# H_# H_# H_# H_# H_#[..] H_#[..] H_S# H_ST#0 H_ST# H_NR# H_PRI# H_R0# H_EFER# H_SY# LK_MH_LK LK_MH_LK# H_PWR# H_RY# H_HIT# H_HITM# H_LOK# H_TRY# H_INV#0 H_INV# H_INV# H_INV# H_STN#0 H_STN# H_STN# H_STN# H_STP#0 H_STP# H_STP# H_STP# H_REQ#0 H_REQ# H_REQ# H_REQ# H_REQ# H_RS#0 H_RS# H_RS# H_VREF SI- PROJET : FP Quanta omputer Inc. Size ocument Number Rev N ustom antiga hot ate: Thursday, May, 00 Sheet of

8 +V R 0K/F_ PM_EXTTS#0 R 0K/F_ PM_EXTTS# / FGs should use a.k resistor instead of.k. Layout Note: Location of all MH_FG strap resistors needs to be close to minmize stub. +V PM_SYN#, H_PRSTP#, PM_EXTTS#0 PM_EXTTS#, ELY_VR_PWRGOO PLT_RST-R#, PM_THRMTRIP#, PRSLPVR *P T *P T *P T *P T () MH_SEL0 MH_SEL MH_SEL *P T *P T R *.K/F_ *P T *P T *P T R0 *.K/F_ *PT *P T *PT0 *PT *PT *PT R0 *.K/F_ *PT *PT R *.0K/F R *.0K/F FG FG FG FG FG FG FG FG0 FG FG FG FG FG FG FG FG FG FG0 U J L RSV J RSV L RSV N RSV M0 RSV K0 RSV L RSV F RSV RSV 0 RSV RSV RSV N P ME_JTG_TK T ME_JTG_TI N ME_JTG_TO ME_JTG_TMS K G FG_0 G FG_ J FG_ L FG_ L FG_ F FG_ FG_ FG_ J FG_ FG_ FG_0 FG_ FG_ FG_ K FG_ FG_ L FG_ L FG_ K FG_ K FG_ FG_0 J F PM_SYN# J PM_PRSTP# L PM_EXT_TS#_0 Y PM_EXT_TS#_ R 00/F_ PWROK R *0_/SK RSTIN# R0 *0_/SK THERMTRIP# PRSLPVR SI- J W RSV0 0 E RSV F0 RSV F RSV RSV N_ N_ N_ N_ N_ G N_ E N_ H N_ K N_ K N_0 L N_ L N_ L N_ L N_ L N_ L N_ K N_ K N_ H N_ E N_0 G N_ N_ GS SL H MIS ME GRPHIS VI MI LK R LK/ ONTROL/OMPENSTION RSV FG PM N S_K_0 S_K_ S_K_0 S_K_ S_K#_0 S_K#_ S_K#_0 S_K#_ S_KE_0 S_KE_ S_KE_0 S_KE_ S_S#_0 S_S#_ S_S#_0 S_S#_ S_OT_0 S_OT_ S_OT_0 S_OT_ SM_ROMP SM_ROMP# SM_ROMP_VOH SM_ROMP_VOL SM_VREF SM_PWROK SM_REXT SM_RMRST# PLL_REF_LK PLL_REF_LK# PLL_REF_SSLK PLL_REF_SSLK# PEG_LK PEG_LK# MI_RXN_0 MI_RXN_ MI_RXN_ MI_RXN_ MI_RXP_0 MI_RXP_ MI_RXP_ MI_RXP_ MI_TXN_0 MI_TXN_ MI_TXN_ MI_TXN_ MI_TXP_0 MI_TXP_ MI_TXP_ MI_TXP_ GFX_VI_0 GFX_VI_ GFX_VI_ GFX_VI_ GFX_VI_ GFX_VR_EN L_LK L_T L_PWROK L_RST# L_VREF P_TRLLK P_TRLT SVO_TRLLK SVO_TRLT LKREQ# IH_SYN# TSTN# H_LK H_RST# H_SI H_SO H_SYN E E K K E M_LK_R M_LK_R# MI_TXN0 MI_TXN MI_TXN MI_TXN MI_TXP0 MI_TXP MI_TXP MI_TXP MI_RXN0 MI_RXN MI_RXN MI_RXN F0 MI_RXP0 H0 MI_RXP J MI_RXP G MI_RXP MH_LVREF 0 Z_SIN_R R_KE0,, T *P R_KE R_KE R_S0#,, T *P R_S# R_S# onnect UM H M_LK_R0,, M_LK_R M_LK_R M_LK_R#0,, M_LK_R# M_LK_R# J M_OT0,, J T *P M_OT E M_OT R L SMROMPP 0./F_ K SMROMPN R K SM_ROMP_VOH 0./F_ L SM_ROMP_VOL V_R_MH_REF_R Y SM_PWROK H0 R /F_ R_RST# 0 0 R P0 G L H L G K0 H L G J J G G G F F G G K K W0 L L F F K 0 REFLK REFLK# REFSSLK REFSSLK# LK_PIE_GPLL LK_PIE_GPLL# T T T0 L_LK0 L_T0 EPWROK,, L_RST#0 MI_TXN[:0] MI_TXP[:0] MI_RXN[:0] MI_RXP[:0] *P *P T *P SVO_LK SVO_T LK_MH_OE# MH_IH_SYN# R./F_ *P R0 _ +.0V MH_LVREF,,0,,,,,,,0,,,,,,,, +V,0,,,,, +.V_MEM,,,,,,0,,0,0, +.0V INT_PST_PWM INT_LVS_LON R L_LK L_T INT_ISP_ON +.V_MEM LK T HSYN_OM RT_ RT_G RT_R VSYN_OM 0.U/0V_ 0 +V TXLOUT0- TXLOUT- TXLOUT- TXLLKOUT- TXLLKOUT+ TXLOUT0+ TXLOUT+ TXLOUT+ R R +.0V Z_ITLK_MH Z_RST#_MH Z_SIN Z_SOUT_MH Z_SYN_MH M_LK_R# R0 K/F_ R /F_ R 00K/F_ R R R R TP 00K/F_ 0K/F_ L_TRL_LK 0K/F_ L_TRL_T TP TP INT_LVS_LON INT_ISP_ON /F_ /F_ /F_ R /F_ M_LK_R R R R.K/F_ LVS_IG LVS_VG 0/F_ 0/F_ 0/F_ L_TN L_TP SM_PWROK R 0K/F_ R *0K/F_ V_R_MH_REF_R 0.U/0V_ 0P/0V_ +.V_MEM R *0K/F_ SM_PWROK_U R 0_ U L_KLT_TRL K L_KLT_EN L_TRL_LK L J L_TRL_T L L LK L T F0 L_V_EN H LVS_IG P LVS_VG K LVS_VREFH LVS_VREFL LVS_LK# LVS_LK LVS_LK# LVS_LK G F LVS_T#_0 G LVS_T#_ LVS_T#_ LVS_T#_ F G LVS_T_0 F0 LVS_T_ LVS_T_ LVS_T_ 0 LVS_T#_0 F LVS_T#_ LVS_T#_ LVS_T#_ 0 LVS_T_0 G LVS_T_ LVS_T_ LVS_T_ J E TV_ G TV_ TV_ F J G F0 E TV_RTN TV_ONSEL_0 TV_ONSEL_ RT_LUE RT_GREEN RT_RE RT_IRTN RT LK R _ INT_RT_HSYN_R J RT T R.0K/F_ RTIREF RT_HSYN R _ INT_RT_VSYN_R G RT_TVO_IREF RT_VSYN R.K/F_ GS SL +V_R_MH_REF 0 0.U/0V_ +VSUS LVS +V_R_MH_REF, PI-EXPRESS GRPHIS TV VG R 0K/F_ SUS#, U MVHG0FTG R_POK R *.K/F_ L_LK L_T TXLOUT0- TXLOUT0+ TXLOUT- TXLOUT+ TXLOUT- TXLOUT+ TXLLKOUT- TXLLKOUT+ +V Level: 0.V HMI_HP# SM_ROMP_VOH 0.0U/0V_.U/.V_ SM_ROMP_VOL 0.0U/0V_ +.0V R./F_ U PEG_OMP PEG_OMPI PEG_OMPO T PEG_RX#_0 G PEG_RX#_ K PEG_RX#_ H0 PEG_RX#_ M PEG_RX#_ N PEG_RX#_ P PEG_RX#_ V PEG_RX#_ Y0 PEG_RX#_ V PEG_RX#_ W PEG_RX#_0 PEG_RX#_ PEG_RX#_ PEG_RX#_ E PEG_RX#_ F PEG_RX#_ E PEG_RX_0 F PEG_RX_ J PEG_RX_ J PEG_RX_ M PEG_RX_ M0 PEG_RX_ P PEG_RX_ U PEG_RX_ PEG_RX_ V PEG_RX_ V0 PEG_RX_0 PEG_RX_ PEG_RX_ PEG_RX_ 0 PEG_RX_ F PEG_RX_ R *0K/F_ Q *N00 L _PEG_TX#0 0.U/0V_ PEG_TX#_0 F _PEG_TX# 0.U/0V_ PEG_TX#_ P _PEG_TX# 0.U/0V_ PEG_TX#_ H _PEG_TX# 0.U/0V_ PEG_TX#_ L PEG_TX#_ T PEG_TX#_ R PEG_TX#_ U PEG_TX#_ T HMI_TXN PEG_TX#_ Y HMI_TXN PEG_TX#_ HMI_TXN0 PEG_TX#_0 W HMI_TXN PEG_TX#_ Y PEG_TX#_ PEG_TX#_ F PEG_TX#_ PEG_TX#_ J _PEG_TX0 0.U/0V_ PEG_TX_0 F _PEG_TX 0.U/0V_ PEG_TX_ N _PEG_TX 0.U/0V_ PEG_TX_ H _PEG_TX 0.U/0V_ PEG_TX_ L PEG_TX_ R PEG_TX_ R PEG_TX_ T0 PEG_TX_ T HMI_TXP PEG_TX_ W HMI_TXP PEG_TX_ HMI_TXP0 PEG_TX_0 W HMI_TXP PEG_TX_ Y PEG_TX_ 0 PEG_TX_ E PEG_TX_ PEG_TX_ HMI_HP_ON HMI_TXN HMI_TXN HMI_TXN0 HMI_TXN HMI_TXP HMI_TXP HMI_TXP0 HMI_TXP 0 HMI_HP_ON HMI_TXN HMI_TXN HMI_TXN0 HMI_TXN HMI_TXP HMI_TXP HMI_TXP0 HMI_TXP +.V_MEM PROJET : FP Quanta omputer Inc. Size ocument Number Rev N ustom antiga (VG/MI) ate: Friday, May, 00 Sheet of R0 *00K/F_.U/.V_ R0 0_ R K/F_ R.0K/F R K/F_

9 0, R [0..] U R 0 P R U S_Q_0 R T S_Q_ R U S_Q_ R R S_Q_ R N S_Q_ R V0 S_Q_ R P0 S_Q_ R W S_Q_ R 0 S_Q_ R 0 W S_Q_ R S_Q_0 R S_Q_ R V S_Q_ R S_Q_ R Y0 S_Q_ R F S_Q_ R S_Q_ R F0 S_Q_ R F S_Q_ R 0 S_Q_ R E S_Q_0 R S_Q_ R E S_Q_ R F S_Q_ R S_Q_ R F S_Q_ R F0 S_Q_ R 0 S_Q_ R E S_Q_ R 0 F S_Q_ R E S_Q_0 R S_Q_ R E S_Q_ R E S_Q_ R F S_Q_ R S_Q_ R S_Q_ R E S_Q_ R F S_Q_ R 0 F0 S_Q_ R S_Q_0 R F S_Q_ R G S_Q_ R S_Q_ R S_Q_ R S_Q_ R F S_Q_ R V S_Q_ R S_Q_ R 0 W S_Q_ R Y S_Q_0 R T0 S_Q_ R W S_Q_ R U S_Q_ R W S_Q_ R R S_Q_ R T S_Q_ R P S_Q_ R L S_Q_ R 0 R S_Q_ R T S_Q_0 R M S_Q_ R U S_Q_ S_Q_ GS SL R SYSTEM MEMORY S_S_0 S_S_ S_S_ S_RS# S_S# S_WE# S_M_0 S_M_ S_M_ S_M_ S_M_ S_M_ S_M_ S_M_ S_QS_0 S_QS_ S_QS_ S_QS_ S_QS_ S_QS_ S_QS_ S_QS_ S_QS#_0 S_QS#_ S_QS#_ S_QS#_ S_QS#_ S_QS#_ S_QS#_ S_QS#_ S_M_0 S_M_ S_M_ S_M_ S_M_ S_M_ S_M_ S_M_ S_M_ S_M_ S_M_0 S_M_ S_M_ S_M_ S_M_ J J H K0 L T0 0 E E V0 R R E 0 N R W N F E H J H F G H H E R S0 R S R S R RS# R S# R WE# R M0 R M R M R M R M R M R M R M R QS0 R QS R QS R QS R QS R QS R QS R QS R QS#0 R QS# R QS# R QS# R QS# R QS# R QS# R QS# R M0 R M R M R M R M R M R M R M R M R M R M0 R M R M R M R M R [0..] UE R 0 P J R S0 R S0,, R S0 R M S_Q_0 S_S_0 K R S R S,, R S R R S_Q_ S_S_ K R S R S,, R S R V S_Q_ S_S_ R M S_Q_ R RS#,, R N S_Q_ E R RS# R S#,, R RS# R T S_Q_ S_RS# H R S# R WE#,, R S# R U S_Q_ S_S# K R WE# R WE# R W S_Q_ S_WE# R Y S_Q_ R 0 S_Q_ R M[0..], R S_Q_0 R M[0..] R V S_Q_ P R M0 R W S_Q_ S_M_0 Y R M R S_Q_ S_M_ J R M R S_Q_ S_M_ J R M R F S_Q_ S_M_ H R M R E S_Q_ S_M_ R M R H S_Q_ S_M_ Y R M R K S_Q_ S_M_ J R M R QS[0..], R 0 E S_Q_ S_M_ R QS[0..] R H S_Q_0 R R QS0 R K S_Q_ S_QS_0 R QS R J S_Q_ S_QS_ H0 R QS R L S_Q_ S_QS_ K R QS R J S_Q_ S_QS_ H R QS R L S_Q_ S_QS_ R QS R H S_Q_ S_QS_ V R QS R QS#[0..], R H S_Q_ S_QS_ M R QS R QS#[0..] R K S_Q_ S_QS_ T R QS#0 R 0 K0 S_Q_ S_QS#_0 R QS# R J S_Q_0 S_QS#_ J R QS# R K0 S_Q_ S_QS#_ H R QS# R H0 S_Q_ S_QS#_ K R QS# R K S_Q_ S_QS#_ R QS# R H S_Q_ S_QS#_ W R QS# R J S_Q_ S_QS#_ N R QS# R M[0..],, R L S_Q_ S_QS#_ R M[0..] R G S_Q_ J R M0 R J S_Q_ S_M_0 J R M R 0 G S_Q_ S_M_ H R M R F S_Q_0 S_M_ R M R S_Q_ S_M_ F R M R S_Q_ S_M_ H R M R E S_Q_ S_M_ F R M R F S_Q_ S_M_ K R M R S_Q_ S_M_ J R M R Y S_Q_ S_M_ H0 R M R S_Q_ S_M_ H R M0 R P S_Q_ S_M_0 K R M R 0 U S_Q_ S_M_ H R M R T S_Q_0 S_M_ J R M R T S_Q_ S_M_ L R M R V S_Q_ S_M_ R U S_Q_ R R S_Q_ R N S_Q_ R P S_Q_ R L S_Q_ R J S_Q_ R 0 K S_Q_ R M S_Q_0 R H S_Q_ R K S_Q_ S_Q_ GS SL R SYSTEM MEMORY R M *P T PROJET : FP Quanta omputer Inc. Size ocument Number Rev N ustom antiga (R interface) ate: Thursday, May, 00 Sheet of

10 Ivcc_sm (R,.V,0MTs) -->0m UG +.V_MEM 0U_ USE HEIGHT =.mm IV_XG-->00m(GS) +.0V +.0V +.0V UF 0 0.U/0V_ +V_SM_ +V_SM_E E W W 0 K0 0.U/0V_ 0.U/0V_ H0 F0 0 0 W0 L J G E +V_SM_ Y K 0.U/0V_ H F L J G E Y W +V_SM_F F +V_SM_L L +V_SM_ +.0V 0.U/0V_ 0.U/0V_ W G E Y W H G E Y W H G E H G E Y W H W J H G E Y W M L J H G E M L J H +.0V Y W M R L *0_ +V_XG_SENSE G +_XG_SENSE E V_SM_ V_SM_ V_SM_ V_SM_ V_SM_ V_SM_ V_SM_ V_SM_ V_SM_ V_SM_0 V_SM_ V_SM_ V_SM_ V_SM_ V_SM_ V_SM_ V_SM_ V_SM_ V_SM_ V_SM_0 V_SM_ V_SM_ V_SM_ V_SM_ V_SM_ V_SM_ V_SM_ V_SM_ V_SM_ V_SM_0 V_SM_ V_SM_ V_SM_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_0 V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_0 V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_0 V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_0 V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_0 V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_0 V_XG_ V_XG_SENSE _XG_SENSE POWER V SM V GFX V GFX NTF V GFX V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_NTF_0 V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_NTF_0 V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_NTF_0 V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_NTF_0 V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_0 V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_0 V_SM_LF V_SM_LF V_SM_LF V_SM_LF V_SM_LF V_SM_LF V_SM_LF V SM LF T U T R U T R U U T R U T R U U T R U T R M L H G E W U M L J H G E Y W U T R J H U T R M L J H G E Y W U T U F E U L VSM_LF VSM_LF VSM_LF VSM_LF VSM_LF VSM_LF VSM_LF 0.U/0V_ +.0V +.V_MEM Layout Note: 0 mils from edge. + 0U/.V/ESR 0.U/0V_ 0.U/0V_ + 0 *0U/.V/ESR 0 0.U/V_ 0.U/0V/ + 0 0U/.V/ESR + *0U/.V/ESR 0.U/V_ Layout Note: Inside GMH cavity. Layout Note: 0 mils from edge. U/0V_ 0U/.V_ 0.U/0V/ 0 0U/.V_ 0U/.V_ 0 0U/.V_ U/0V_ 0U/.V_ U/0V_ 0.U/V_ 0.U/V_ 0 0.U/0V_ 0.U/0V_ 0.U/0V_ T R V_ N V_ J V_ H V_ V_ V_ Y V_ W V_ T0 V_ M0 V_0 L0 V_ V_ J0 H0 G0 E Y0 N M J H W M L J H G E Y W M L J H E M L J H M L M L J M L M L J M N V_ V_ V_ V_ V_ V_ V_ V_0 V_ V_ V_ V_ V_ V_ V_ V_ V_ V_0 V_ V_ V_ V_ V_ V_ V_ V_ V_ V_0 V_ V_ V_ V_ V_ V_ V_ V_ V_ V_0 V_ V_ V_ V_ V_ V_ V_ V_ V_ V_0 V_ GS SL V ORE POWER V NTF V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_0 V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_0 V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_0 V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ +.0V T R N M L G E Y W U T R T R N M L J H G E Y W U T R T R U T R U T R R *0_ GS SL render standby feature is not implemented can be left PROJET : FP Quanta omputer Inc. Size ocument Number Rev N ustom antiga (Vcc) Thursday, May, 00 ate: Sheet of

11 +.0V 0UH/0._0% L *0U/.V_0 +.0V 0UH/0._0% L *0U/.V_ V +.0V +.0V +.0V +.0V +.0V LM0 L LM0 L + *00U/.V/ 0U/.V_ + L LM0 +V.0M_MH_PLL L LMPSGPT R /F_ 0 0U/.V_ 0.U/0V_ V_PLL+V_PLL=.m 0.U/0V_ R +V LMGSN +V RT_ 0U/.V_ 0.0U/V_.U/.V_ R /F_ % 0U/.V_ 0.U/.V_ 0.U/.V/ +V.0M_PEGPLL +V 0.U/0V_ R LMGSN 0U/.V_ 0.U/0V_ 0.U/0V_ 0.U/0V_ 0.U/0V_ 0 0.U/0V_ V_MPLL:.m +.V +V G 0.0U/V_ +V.0M_PLL +V.0M_PLL +V.0M_HPLL +V.0M_MPLL +V._TXLVS 000P/0V_ 0.U/0V_ U/0V_ J J L F0 E +V.0M_PEGPLL H E UH V_RT_ L M V G G J G V_PLL V_PLL V_HPLL V_MPLL U U V_LVS V_LVS V _LVS V_PEG_G V_PEG_PLL W U V_SM_ W V_SM_ U V_SM_ U V_SM_ W0 V_SM_ U V_SM_ W V_SM_ U V_SM_ W V_SM_ U V_SM_0 T V_SM_ R V_SM_ U V_SM_ T V_SM_ R V_SM_ W V_SM_ V_SM_ T R V_SM_NTF_ T V_SM_NTF_ R V_SM_NTF_ T V_SM_NTF_ R V_SM_NTF_ T V_SM_NTF_ R V_SM_NTF_ T V_SM_NTF_ R V_SM_NTF_ V_SM_NTF_0 V_HPLL V_PEG_PLL M L V_LVS_ V_LVS_ GS SL RT PLL LVS PEG POWER SM U U V_SM_K_ U V_SM_K_ U V_SM_K_ T V_SM_K_ R V_SM_K_NTF_ T V_SM_K_NTF_ R V_SM_K_NTF_ T V_SM_K_NTF_ R V_SM_K_NTF_ T V_SM_K_NTF_ R V_SM_K_NTF_ V_SM_K_NTF_ LVS TV H TV/RT SM K MI XF HV PEG VTT V_TV_ VTTLF R VTT_ T VTT_ R VTT_ T0 VTT_ R VTT_ T VTT_ R VTT_ T VTT_ R VTT_ T VTT_0 R VTT_ T VTT_ R VTT_ V_H V_Q V_TV K0 N N M V_XF_ N V_XF_ M V_XF_ K V_SM_K_ L V_SM_K_ J V_SM_K_ K V_SM_K_ V_TX_LVS T V_HV_ V_HV_ V_PEG_ Y V_PEG_ V_PEG_ V_PEG_ M V_MI_ N V_MI_ L V_MI_ K VTTLF Y VTTLF P VTTLF +V TV_ +.V_TV +V_MI +VTTLF_P +VTTLF_P +VTTLF_P.U/.V/ V_Q 0.m +V.0M_XF +V._SM_K +V._TXLVS 0U/.V_ Ivcc_sm_ck(R,0 MTs)-->.m 0.U/0V_ 000P/0V_ 0 0.U/0V_ 0.U/0V/.U/.V_ 0.0U/0V_ 0 H=0. 0U/.V_ 0 +.0V +VP_GMH U/0V_ R /F_ 0.U/0V/ 0.U/0V/ 0 0U/.V_ +V_H 0 0U/.V_ +V.S_HV L UH/00M_0% 0.U/0V/ R *0_/S SI- 0.U/.V_ SI- +.V_MEM +.V_SUS SI- R0 *0_/S.U/.V_ +.0V *0.U/0V_ L H0KF-T 0.U/0V_ R UH/00M_0% L *0_/S +.0V 0 0U/.V_ + *0U/.V_0 R *0_ +.0V +V +.V +.V R0V-0 R 0_ + 0 *0U/.V_ V 0 +.V_SUS R *0_/S SI- +V._LVS U/0V_ +V V_TV_ m +.V V_TV m R 0_ 0.0U/V_ +V TV_ 0.U/0V_ R 0_ 0 0.U/0V_ +.V_TV 0 0.0U/V_ PROJET : FP Quanta omputer Inc. Size ocument Number Rev N ustom antiga (Power) ate: Thursday, May, 00 Sheet 0 of

12 Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET : FP N antiga (Vss) ustom Thursday, May, 00 Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET : FP N antiga (Vss) ustom Thursday, May, 00 Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET : FP N antiga (Vss) ustom Thursday, May, 00 NTF S UJ GS SL NTF S UJ GS SL _ N _00 G _0 E _0 _0 Y _0 E _0 _0 _0 N _0 L _0 G _ E _ N _ Y _ W _ H _0 G _ Y _ N _ G _ E _ M _ E 0 G _ Y _ M _ E N _ H _ L _ G _ Y _0 M _ E N _ G _ E _ Y _ W _ N _0 H _ G _ Y _ L _0 H E _ M _ R N L _NTF_ J _NTF_ H _NTF NTF NTF_ T _NTF_ R _NTF_ T _NTF_ R _NTF_ U _NTF_0 R _NTF_ T _NTF_ R _NTF_ T _NTF_ R _NTF_ T _S_ L _S_ L _S S S S U W _0 _ L _ N _ N _ N0 _ N _ G _ Y _ U _0 H _ Y R _ J _ W _0 U _NTF_ R _NTF_ N _NTF_ J _NTF NTF_0 Y _NTF_ T _NTF_ R _NTF_ N H _ E _ U _ E W _0 R _ L _ G W _ N _ J _ N _0 N0 _ N _ M _ 0 _ H0 _S M _ E _ V _ P _ M _ K 0 V _ P _ H _ G _ G _ E _ 0 _ Y0 _ P0 _ H0 _0 L _ G _ E Y _ V _ T _ P _00 M _0 K W _ U _ N _0 L _ J _ G _0 H _0 F _0 _0 _0 Y _0 V _0 P _0 M _0 K _ H _ J _ E _ F _ W _ U _ R _0 N _ L _ J _ G _ E L _ 0 _ N UI GS SL UI GS SL N _ U _ N _ J _ E U _ N 0 G _ J _ E U _ N _ J _ G _ K _0 G W _ U _ R _ N _ L _ J _ G _ E _0 W _ U _ R _ N _ L _ J _ G 0 K0 _ M0 _ K0 _ G _ E Y _ V _0 T _ P _ M _ K _ H _ F _ Y _ V _0 T _ P _ M _ K _ H _ L _ G _ E _0 _ Y _ M _ K _ H _ G _ E _ W _0 R _ N _ E _ V _ K _ H _ R _00 _0 _0 _0 H _0 G _0 Y _0 U _0 M _0 L _0 G _0 E R _ M _ E _ 0 _ U0 _ R0 _ N0 _ W0 _0 U0 _ T0 _ R0 _ K0 _ H0 _ L _ G E 0 U _ H _ G _ U _ M _ E W _0 H _ L _ G _ Y _ U _ L _ G _ E Y _0 M _ E _ U _ N _ H _ L _ G _ Y _0 E U _ N _ G Y _ F 0 K _ H _ L _ G _ Y _ R _ W _ E 0 G _ N _ E _ N0 _ N _ M _ W _ H _ J _ Y _ E _ H0 _ J _0 _ M _ Y _ W _ H _ F _ N _0 J _ M _ F N _ M _ H _ J _ Y _ U

13 00 00 Reserve ES by NV request SM_MEM US RESS SO-IMM SO-IMM MEM delay circuit deleted by G-0-00-V US_ GT_SM GLK_SM GLK_SM GT_SM IMM0_S0 IMM0_S R M0 R M R M R M R M R M R M R M R M R M R M R M0 R M R M R M R S R S R S0 MEM HOT# R M R M R M R M R M R M0 R M R M R QS# R QS# R QS# R QS# R QS# R QS#0 R QS0 R QS# R QS# R QS R QS R QS R QS R QS R QS R QS M_OT M_OT R S# R RS# R WE# R_S# R_S# M_LK_R# M_LK_R M_LK_R# M_LK_R R_KE R_KE R R R R R 0 R R R R R R R R R R R R R R R R R 0 R R R R 0 R R R R R R R R R 0 R R R R R R R R R R R R R R R R 0 R R R R 0 R R R R 0 R R R R R R [0..] R M[0..] R S[0..] R_S_RST#, PM_EXTTS#0, R M[0..] R QS[:0] R QS#[:0] M_OT M_OT GLK_SM, GT_SM, R RS# R S# R WE# R_S# R_S# M_LK_R M_LK_R# M_LK_R M_LK_R# R_KE R_KE +R_VREF_IMM +V +.V_MEM +.V_MEM +.V_MEM +.V_MEM +V +0.V_R_VTT +V +.V_MEM +R_VREF_IMM Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET : FP N R SO-IMM(00P) ustom Thursday, May, 00 Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET : FP N R SO-IMM(00P) ustom Thursday, May, 00 Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET : FP N R SO-IMM(00P) ustom Thursday, May, 00 R 0_ R 0_.U/0V_.U/0V_.U/0V_.U/0V_.U/0V_.U/0V_ P00 R SRM SO-IMM (0P) JIM R-IMM0 P00 R SRM SO-IMM (0P) JIM R-IMM0 V V V V V V V V V V0 00 V 0 V 0 V V V V V V VSP N N NTEST EVENT# RESET# 0 VREF_Q VREF_ VTT 0 VTT 0 GN 0 GN 0.U/0V_.U/0V_ R 0K/F_ R 0K/F_.U/.V_.U/.V_.U/0V_.U/0V_ 00 0U/.V_/S 00 0U/.V_/S.U/0V_.U/0V_.U/0V_.U/0V_ 0.U/0V_ 0.U/0V_ ES *SRV0-.TT ES *SRV0-.TT 0U/.V_/S 0U/.V_/S U/.V_ U/.V_ R 0K/F_ R 0K/F_.U/0V_.U/0V_.U/0V_.U/0V_.U/0V_.U/0V_ P00 R SRM SO-IMM (0P) JIM R-IMM0 P00 R SRM SO-IMM (0P) JIM R-IMM /P 0 /# S0# S# K0 0 K0# 0 K 0 K# 0 KE0 KE S# RS# 0 WE# S0 S 0 SL 0 S 00 OT0 OT 0 M0 M M M M M M 0 M QS0 QS QS QS QS QS QS QS QS#0 0 QS# QS# QS# QS# QS# QS# QS# Q0 Q Q Q Q Q Q Q Q Q Q0 Q Q Q Q Q Q Q Q Q Q0 0 Q Q 0 Q Q Q Q Q Q Q Q0 Q 0 Q Q Q Q Q 0 Q Q 0 Q Q0 Q Q Q Q Q Q Q 0 Q Q Q0 Q Q Q Q Q Q Q Q Q Q0 0 Q Q Q.U/0V_.U/0V_.U/0V_.U/0V_ 0U/.V_/S 0U/.V_/S U/.V_ U/.V_.U/.V_.U/.V_.U/0V_.U/0V_.U/0V_.U/0V_.U/0V_.U/0V_ 0U/.V_/S 0U/.V_/S 0 U/.V_ 0 U/.V_

14 +.V_MEM +.V_MEM,, R WE#,, R RS#,, R S#,, R_S0#,, M_OT0,, M_LK_R#0,, M_LK_R0,, R_KE0,, R M[0..],, R S[0..], R M[0..], R QS[0..], R QS#[0..] R WE# R RS# R S# R_S0# M_OT0 M_LK_R#0 M_LK_R0 R_KE0 R [0..], R M0 R M R M R M R M R M R M R M R M R M R M0 R M R M R M R S0 R S R S R_KE0 M_OT0 R WE# R RS# R S# K L L K L L M M N M H M K N J K J G G H F G 0 0/P /# 0 KE OT WE RS S VQ VQ E VQ VQ E V K V M V V G V V G V V K V M N F N H N OT MEM0 N J N N N F N H E E E G F E J N R R R R R R R R 0 R QS0 R QS#0 R M0 M_LK_R#0 M_LK_R0 VREFQ VREF R_S_RST# R M0 R M R M R M R M R M R M R M R M R M R M0 R M R M R M R S0 R S R S R_KE0 M_OT0 R WE# R RS# R S# K L L K L L M M N M H M K N J K J G G H F G 0 0/P /# 0 KE OT WE RS S VQ VQ E VQ VQ E V K V M V V G V V G V V K V M N F N H N N J OT MEM N N N F N H Q0 Q Q Q NF,Q NF,Q NF,Q NF,Q QS QS# M,M/TQS NF,NF/TQS# LK- LK+ VREFQ VREF RESET# Q0 Q Q Q NF,Q NF,Q NF,Q NF,Q QS QS# M,M/TQS NF,NF/TQS# LK- LK+ VREFQ VREF RESET# E E E G F E J N R R R R R 0 R R R R QS R QS# R M M_LK_R#0 M_LK_R0 VREFQ VREF R_S_RST# R_S0# H S Q Q Q Q Q ZQ H R_ZQ R 0/F_ 0.U/0V_ 0.U/0V_ R_S0# H S Q Q Q Q Q ZQ H R_ZQ R 0/F_ 0.U/0V_ 0.U/0V_ J L N F F J L N +.V_MEM J L N F F J L N R_RST# R_RST# R 0_ R_S_RST# U R Gb R_S_RST#, +V_R_MH_REF R *K/F_ +R_VREF_IMM R0 0_ U R Gb VREFQ VREFQ, +V_R_MH_REF +V_R_MH_REF +.V_MEM R 0_ R *K/F_ R 0_ VREF VREF +.V_MEM +.VSUS For TOP_ ecoupling Ps U/0V_ 0.U/0V_ 0.U/0V_ 0.U/0V_ 0.U/0V_ 0.U/0V_ +.VSUS For TOP_ ecoupling Ps 0 0U/.V_/S 0.U/0V_ 0.U/0V_ 0.U/0V_ 0.U/0V_ +.VSUS For OT_ ecoupling Ps R M0 R M R M R M R M R M R M R M R M R M R M0 R M R M R M R S0 R S R S R_KE0 M_OT0 R WE# R RS# R S# K L L K L L M M N M H M K N J K J G G H F G 0 0/P /# 0 KE OT WE RS S VQ VQ E VQ VQ E V K V M V V G V V G V V K V M N F N H N Top MEM N J N N N F N H Q0 Q Q Q NF,Q NF,Q NF,Q NF,Q QS QS# M,M/TQS NF,NF/TQS# VREFQ VREF E E E G F E J R R R 0 R R R R R R QS R QS# R M M_LK_R#0 M_LK_R0 VREFQ VREF R_S_RST# R M0 R M R M R M R M R M R M R M R M R M R M0 R M R M R M R S0 R S R S R_KE0 M_OT0 R WE# R RS# R S# Top MEM R R R R R R R R 0 R QS R QS# R M M_LK_R#0 M_LK_R0 VREFQ VREF R_S_RST# R_S0# H S R_ZQ R 0/F_ ZQ H R_S0# H H R_ZQ S ZQ 0.U/0V_ 0.U/0V_ R 0/F_ 0.U/0V_ 0.U/0V_ J L N F F J L N Q Q Q Q Q RESET# N K L L K L L M M N M H M K N J K J G G H F G 0 0/P /# 0 KE OT WE RS S VQ VQ E VQ VQ E V K V M V V G V V G V V K V M N F N H N N J N N N F N H LK- LK+ Q0 Q Q Q NF,Q NF,Q NF,Q NF,Q QS QS# M,M/TQS NF,NF/TQS# LK- LK+ VREFQ VREF RESET# E E E G F E J N J L N F F J L N Q Q Q Q Q U/.V_/S 0.U/0V_ 0.U/0V_ 0.U/0V_ 0.U/0V_ +.V_MEM +.V_MEM U R Gb U R Gb For OT_ ecoupling Ps 0 0U/.V_/S 0.U/0V_ 0.U/0V_ 0.U/0V_ 0.U/0V_ 0.U/0V_ 0 0.U/0V_ 0.U/0V_ 0.U/0V_ for layer change return path in SI PROJET : FP Quanta omputer Inc. Size ocument Number Rev N ustom R RNK0 Thursday, May, 00 ate: Sheet of

15 ,, R WE#,, R RS#,, R S# R WE# R RS# R S# +.V_MEM +.V_MEM,, R_S0# R_S0#,, M_OT0,, M_LK_R0,, M_LK_R#0,, R_KE0,, R M[0..],, R S[0..], R M[0..], R QS[0..], R QS#[0..], R_S_RST# VREFQ VREF M_OT0 M_LK_R0 M_LK_R#0 R_KE0 R [0..], R_S_RST# VREFQ VREF R M0 R M R M R M R M R M R M R M R M R M R M0 R M R M R M R S0 R S R S R_KE0 M_OT0 R WE# R RS# R S# K L L K L L M M N M H M K N J K J G G H F G 0 0/P /# 0 KE OT WE RS S VQ VQ E VQ VQ E V K V M V V G V V G V V K V M N F N H N OT MEM N J N N N F N H R R R R R R R R R QS R QS# R M M_LK_R#0 M_LK_R0 VREFQ VREF R_S_RST# R M0 R M R M R M R M R M R M R M R M R M R M0 R M R M R M R S0 R S R S R_KE0 M_OT0 R WE# R RS# R S# OT MEM R R R R R R 0 R R R QS R QS# R M M_LK_R#0 M_LK_R0 VREFQ VREF R_S_RST# +.V_MEM R_S0# 0.U/0V_ 0.U/0V_ R_S0# For OT_ ecoupling Ps 00 0 U0 Samsung G +.V_MEM +.V_MEM +.V_MEM For OT_ ecoupling Ps R M0 R M R M R M R M R M R M R M R M R M R M0 R M R M R M R S0 R S R S R_KE0 M_OT0 R WE# R RS# R S# TOP MEM R R R R R R R 0 R R QS R QS# R M M_LK_R#0 M_LK_R0 VREFQ VREF R_S_RST# 0 R M0 R M R M R M R M R M R M R M R M R M R M0 R M R M R M R S0 R S R S R_KE0 M_OT0 R WE# R RS# R S# K L L K L L M M N M H M K N J K J G G H F G 0 0/P /# 0 KE OT WE RS S VQ VQ E VQ VQ E V K V M V V G V V G V V K V M N F N H N TOP MEM Q0 Q Q Q NF,Q NF,Q NF,Q NF,Q QS QS# M,M/TQS NF,NF/TQS# LK- LK+ VREFQ VREF RESET# E E E G F E J N R R R 0 R R R R R R QS R QS# R M M_LK_R#0 M_LK_R0 VREFQ VREF R_S_RST# R_S0# 0.U/0V_ 0.U/0V_ R_S0# H S J L N F F J L N Q Q Q Q Q E E E G F E J N 0 K L L K L L M M N M H M K N J K J G G H F G 0 0/P /# 0 KE OT WE RS S VQ VQ E VQ VQ E V K V M V V G V V G V V K V M N F N H N N J N N N F N H Q0 Q Q Q NF,Q NF,Q NF,Q NF,Q QS QS# M,M/TQS NF,NF/TQS# LK- LK+ VREFQ VREF RESET# Q0 Q Q Q NF,Q NF,Q NF,Q NF,Q QS QS# M,M/TQS NF,NF/TQS# LK- LK+ VREFQ VREF RESET# E E E G F E J N H S Q Q Q Q Q ZQ H R_ZQ R 0/F_ H S Q Q Q Q Q ZQ H R_ZQ 0.U/0V_ R0 0/F_ 0.U/0V_ J L N F F J L N J L N F F J L N U Samsung G 0U/.V_/S 0.U/0V_ 0.U/0V_ 0.U/0V_ 0.U/0V_ 0 0U/.V_/S 0.U/0V_ 0.U/0V_ 0.U/0V_ 0.U/0V_ +.V_MEM For TOP_ ecoupling Ps 0U/.V_/S 0.U/0V_ 0.U/0V_ 0.U/0V_ 0.U/0V_ +.V_MEM For TOP_ ecoupling Ps 0 0 K L L K L L M M N M H M K N J K J G G H F G 0 0/P /# 0 KE OT WE RS S VQ VQ E VQ VQ E V K V M V V G V V G V V K V M N F N H N N J Q0 Q Q Q NF,Q NF,Q NF,Q NF,Q QS QS# M,M/TQS NF,NF/TQS# LK- LK+ VREFQ VREF RESET# E E E G F E J N N J N N N F N H 0 H S R_ZQ R 0/F_ ZQ H R_ZQ R 0/F_ 0.U/0V_ 0.U/0V_ J L N F F J L N Q Q Q Q Q N N N F N H 0.U/0V_ 0.U/0V_ 0.U/0V_ 0.U/0V_ 0.U/0V_ ZQ H U Samsung G U Samsung G PROJET : FP Quanta omputer Inc. Size ocument Number Rev N ustom R RNK Thursday, May, 00 ate: Sheet of

16 ,, R M[0..],, R S[0..] +0.V_R_VTT +0.V_R_VTT R M R M R M R M X RN lose to R-Pack termination as possible 0 0,, R RS#,, R S#,, R_KE0 R RS# R S# R_KE0 X RN 0U/.V_/S 0.U/0V_ 0U/.V_/S 0.U/0V_ 0.U/0V_ 0.U/0V_ 0.U/0V_ 0.U/0V_ 0.U/0V_ 0.U/0V_,, M_OT0,, R WE#,, R_S0# M_OT0 R WE# R M0 R_S0# X RN change footprint to 00 R S R S0 R M R M0 X RN R M R M R S R M R M R M R M R M X RN X RN U E0 V E W# E SL S *T0N-SH-T R *0_ +V *0.u/0V_ GLK_SM, GT_SM, +V,, M_LK_R0 M_LK_R0 Place at end Unstuff U R 00/F_ 0 0.0U/0V_ 0.P/V_ R 0./F_ R 0./F_ 0.U/0V_ MLK_THM MT_THM, PM_EXTTS#0 PM_EXTTS# R *0_ SLK S LERT# OVERT# G-P V XP XN GN +V+_R_LM R_THERM 00P/0V_ R_THERM Q MMT0--F,, M_LK_R#0 M_LK_R#0 PROJET : FP Quanta omputer Inc. Size ocument Number Rev N R Ter RES ate: Thursday, May, 00 Sheet of

17 Request by HP RF(Px) acklight ontrol(ls) P/0V_ +V_LV P/0V_ +V_LV LE Panel(LS) R 00K/F_ P/0V_ R00V-0 PN_LON ISPON R K/F_ +VPU INT_LVS_LON R0 K/F_ R00V-0 LI_E#, R 00K/F_ HWPG,,0, *R0V-0 L_K Q TEU *0P/0V_ IGITL_T_L IGITL_LK_L 0P/0V_.U/.V_ +.V_M.0U/V_ 000P/0V_ +VIN +V L.0U/V_ USP- USP+ USP- USP+ L_LK L_T TXLOUT0- TXLOUT0+ TXLOUT- TXLOUT+ TXLOUT- TXLOUT+ TXLLKOUT- TXLLKOUT+ *WM0-0 PY00T-0Y-N +VIN_LIGHT L IGITL_T_L IGITL_LK_L VJ ISPON +VIN_LIGHT N L ONN L POWER SWITH SI- 0 : el R, dd R 0.0U/0V_ lose to L onnector.u/v_ +VIN R 0K/F_ +V mil INT_PST_PWM PWM_VJ R 0_ R *K/F_ P/0V_ VJ IGITL_ IGITL_LK R 0_ R 0_ IGITL_T_L IGITL_LK_L INT_ISP_ON Q PTTT R 00K/F_ +VPU LONG R 00K/F_ Q N00E LON# 0.0U/0V_ Q O0 LV mil +V_LV L 0_ mil R.U/0V_.0U/V_ 0U/.V_S _ LISHG LV :. (Rush current), 0. (max), 0.(Typ) Q N00E U/.V_ +V MER POWER U VIN SHN GN TH-.KER VOUT SET REG_VSET R *0_ R R +V R0 *K/F_ R *00K/F_ +.V_M.U/.V_ Vout=.(+R/R) PROJET : FP Quanta omputer Inc. Size ocument Number Rev N ustom LE Panel / amera Monday, May, 00 ate: Sheet of

18 +VPU +VRT SI build R00V-0 U/.V_ P/0V_,,,,,,,0,,,, +VPU 0 +VRT,,,0,,,,,,0,,,,,,,, +V,0,,0,, +.V,,,,,,,0,0,0, +.0V,,0,, +VS 0MIL +VRT_ R K/F_ +VRT_T N0 RT ONN update footprint (00) 0 R00V-0 SI build ST_LE# HP Request T_OMO_EN# R *K/F_ R0 R0 T *T_ONN U/.V_ +V 0K/F_ M/F_ R 0.U/0V_ ST H 0K/F_ G *SHORT_ P R0 0K/F_ U/.V_ IH_ST_LE# U MVHG0FTG ST_RXN0 ST_RXP0 ST_TXN0 ST_TXP0 +.V P/0V_ R Z_SIN0 Z_SIN TP TP TP TP TP TP TP TP TP Y.KHZ G *SHORT_ P./F_ TP0 0.0U/0V_ 0.0U/0V_ 0.0U/0V_ 0.0U/0V_ R 0M_ RT_RST# SRT_RST SM_INTRUER# LN_RX0 LN_RX LN_RX LN_TX0 LN_TX LN_TX GLN_OMP Z_LK Z_SYN Z_RST# RT_X RT_X IH_INTVRMEN LN00_SLP GLN_LK LN_RSTSYN GPIO Z_SOUT T_OMO_EN# IH_ST_LE# ST_RXN0_ ST_RXP0_ ST_TXN0_ ST_TXP0_ U F G RTX RTX G RTRST# SRTRST# INTRUER# E INTVRMEN LN00_SLP G GLN_LK LN_RSTSYN LN_RX0 LN_RX LN_RX LN_TX0 LN_TX LN_TX E H_IT_LK H_SYN H_RST# E H_SIN0 H_SIN H_SIN H_SIN GPIO H H GLN_OMPI GLN_OMPO H_SOUT RT LP LN / GLN PU IH H_OK_EN#/GPIO H_OK_RST#/GPIO STLE# E ST0RXN ST0RXP ST0TXN ST0TXP STRXN STRXP STTXN STTXP M0IUX SLN ST FWH0/L0 FWH/L FWH/L FWH/L FWH/LFRME# LRQ0# LRQ#/GPIO 0GTE 0M# PRSTP# PSLP# FERR# PUPWRG IGNNE# INIT# INTR RIN# NMI SMI# STPLK# THRMTRIP# TP STRXN STRXP STTXN STTXP STRXN STRXP STTXN STTXP ST_LKN ST_LKP STRIS# STRIS H J K L J H J N E E E E L IH_RQ#0 IH_RQ# GTE0 RIN# IH_TP 0 ST_RIS_PN E0 LP_L0, LP_L, LP_L, LP_L, LP_LFRME#, TP TP H_THERMTRIP_R R E 0 0 TP GTE0 H_0M# H_PWRG H_IGNNE# H_INIT# H_INTR RIN# H_NMI H_SMI# H_STPLK#./F_ R *./F_ LK_PIE_ST# LK_PIE_ST R./F_ +.0V R *./F_ +.0V Z_RST# For H udio Z_SOUT R _ Z_SYN R R./F_ H_PRSTP#, H_PSLP#./F_ +.0V PM_THRMTRIP#, R _ R _ GTE0 RIN# R./F_ H_FERR# R.K/F_ +V R 0K/F_ +V Z_RST#_UIO Z_SOUT_UIO Z_SYN_UIO Z_LK R _ IT_LK_UIO S Strap IH-M Internal VR Enable strap (Internal VR for Vccsus_0,VccSus_ and VccL_) IH-M LN00_SLP Strap (Internal VR for VccLN_0 and VccL.0) Low = Internal VR disable Low = Internal VR disable INTVRMEN High = Internal VR LN00_SLP High = Internal VR enable(efault) enable(efault) +VRT R K/F_ +VRT R K/F_ XOR hain Entrance Strap IH_TP 0 0 H_SOUT 0 0 escription RSV Enter XOR hain Normal opration(efault) Set PIE port config bit +V R *K/F_ IH oot IOS select STRP PI_GNT0# SPI_S# SPI 0 PI 0 LP (default) *K/F_ R GNT0# *K/F_ R IH_SPI_S#_R swap override strap Low = swap override enabled PI_GNT# Hi = efault No Reboot Strap Z_SPKR R *K/F_ +V Low: efault Hi: No reboot TPM physical presence IH_GPIO Low: efault Z_SPKR, Z_RST# Z_SOUT Z_SYN Z_LK *0P/0V_ *0P/0V_ *0P/0V_ onnect UM H R _ R0 _ R _ R _ Z_RST#_MH Z_SOUT_MH Z_SYN_MH Z_ITLK_MH IH_INTVRMEN R *0_ LN00_SLP R *0_ R Z_SOUT IH_TP *K/F_ R GNT# +VS R *0K/F_ *0P/0V_ *0P/0V_ *0P/0V_ *K/F_ R 00K/F_ IH_GPIO PROJET : FP Quanta omputer Inc. Size ocument Number Rev N ustom IH (ST/PU) ate: Thursday, May, 00 Sheet of

19 +V +V +V +VS PERR# IRY# TRY# INT# EVSEL# REQ# REQ# LOK# INTH# INTE# INTF# REQ0# US_O# US_O# US_O# US_O#0 SI- US_O#0 US_O# US_O# US_O# PI_PME# Place TX blocking caps close IH. U T WLN PIE_RXN0 MI_RXN0 T PERN MI0RXN V PIE_RXP0 MI_RXP0 0 0.U/0V_ 0 PIE_TXN0_ R PERP MI0RXP V PIE_TXN0 MI_TXN0 0 0.U/0V_ 0 PIE_TXP0_ R PETN MI0TXN U PIE_TXP0 PETP MI0TXP U MI_TXP0 P PIE_RXN_LN MI_RXN P PERN MIRXN W PIE_RXP_LN MI_RXP 0.U/0V_ 0 PIE_TXN_ P PERP MIRXP W PIE_TXN_LN MI_TXN 0.U/0V_ 0 PIE_TXP_ P PETN MITXN V PIE_TXP_LN PETP MITXP V MI_TXP RP 0 0PR-.K RP 0 0PR-.K RP 0 0PR-.K RP 0 0PR-.K R0 R0 R00 R R PIE_RXN PIE_RXP PIE_TXN PIE_TXP.K/F_.K/F_.K/F_.K/F_ 0K/F_ INT# SERR# INTG# INT# FRME# STOP# INT# REQ# US_O# US_O# US_O# US_O# +VS +VS 0.U/0V_ 0 0.U/0V_ 0 IH_SPI_S#_R +V +V +V +VS T T T T *P *P *P *P R delete PIE_TXN_ PIE_TXP_ R./F INT# INT# INT# INT# N N PERN M PERP M PETN PETP M M PERN L PERP L PETN PETP M0IUX SLN PI-Express SPI irect Media Interface MIRXN Y MIRXP Y MITXN Y MITXP Y MIRXN MIRXP MITXN MITXP K K PERN MI_LKN T K PERP MI_LKP T K PETN PETP MI_ZOMP H MI_IROMP H PERN/GLN_RXN J PERP/GLN_RXP USP0N E J PETN/GLN_TXN USP0P PETP/GLN_TXP USPN USPP E USPN E SPI_LK IH_SPI_S#_R USPP F SPI_S0# SPI_S#/GPIO/LGPIO USPN USPP F USPN G SPI_MOSI SPI_MISO USPP US_O#0 P USPN US_O# N O0#/GPIO USPP US_O# N O#/GPIO0 USPN US Y US_O# P O#/GPIO USPP Y US_O# P O#/GPIO USPN W US_O# P O#/GPIO USPP W US_O# M O#/GPIO USPN V US_O# M O#/GPIO0 USPP V US_O# P O#/GPIO USPN Y US_O# R O#/GPIO USPP Y US_O#0 O#/GPIO USP0N U R US_O# USP0P U R O0#/GPIO O#/GPIO USPN V USRIS_PN E USPP V USRIS USRIS# U 0 0 E0 E 0 0 F E E E J H 0 PI Interrupt I/F F F PIRQ# F PIRQ# PIRQ# PIRQ# M0IUX SLN G REQ0# E GNT0# REQ#/GPIO0 E GNT#/GPIO REQ#/GPIO 0 GNT#/GPIO REQ#/GPIO GNT#/GPIO 0 /E0# /E# E /E# /E# IRY# PR T PIRST# EVSEL# PERR# PLOK# H SERR# STOP# TRY# FRME# PLTRST# PILK T PME# G PIRQE#/GPIO G PIRQF#/GPIO F PIRQG#/GPIO H PIRQH#/GPIO REQ0# GNT0# REQ# GNT# REQ# GNT# REQ# GNT# IRY# EVSEL# PERR# LOK# SERR# STOP# TRY# FRME# PI_PME# INTE# INTF# INTG# INTH# MI_RXN MI_RXP MI_TXN MI_TXP MI_RXN MI_RXP MI_TXN MI_TXP LK_PIE_IH# LK_PIE_IH MI_IROMP_R USP0- USP0+ USP- USP+ USP- USP+ USP- USP+ USP- USP+ USP- USP+ USP- USP+ USP- USP+ GNT0# TP TP GNT# SERR# PLT_RST-R# PLK_IH US onnector US onnector US onnector arama US ard reader WLN Min-ard LUETOOTH WWN +.V R./F_ R 00K/F_ U *MVHG0FTG PLT_RST-R# US0 US US US US US US port US US US US US0 US R +VS SI- *0_/S ssignment function US onnector US onnector US onnector US amera module US ard reader Reserve for Mini ard luetooth WWN N N N N *0.U/0V_ R *00K/F_ PLTRST#,, PROJET : FP Quanta omputer Inc. Size ocument Number Rev N ustom IH (US/PIE/MI) ate: Thursday, May, 00 Sheet of

20 PIE_WKE# LK_WWN_OE# XPRESS_INFO?? PLK_SM PT_SM SYS_RST# PM_SYN# PM_STPPI# PM_STPPU# LKRUN#, PIE_WKE# SERIRQ PM_THRM# *00P/0V_ WWN_ET# KSMI# SI# SWI# WWN_PWON# WWN_OFF# L_K IH_GPIO RF_OFF# LK_ST_OE# Q MEN00E IH_GPIO, Z_SPKR MH_IH_SYN# IH_TP R *0_/S IH_GPIO# PV- U SMLK SM_LINK_LERT# SMT SM_LK_ME E LINKLERT#/GPIO0/LGPIO SM_T_ME SMLINK0 SMLINK PM_RI# 0 RI# TP PM_SUS_STT# T SUS_STT#/LPP# SYS_RESET# L PMSYN#/GPIO0 SM_LERT# SMLERT#/GPIO PM_STPPI# PM_STPPU# 0 STP_PI#/GPIO STP_PU#/GPIO M LKRUN#/GPIO L WKE# 0 SERIRQ THRM# VR_PWRGO_LKEN VRMPWRG TP TP E E GPIO GPIO GPIO WWN_PWON# GPIO TP _S_RST# 0 GPIO OR_I E GPIO WWN_PWOFF# K GPIO GPIO OR_I GPIO0 SLOK/GPIO E0 GPIO LK_ST_OE# M GPIO IH_GPIO# STLKREQ#/GPIO MFG_MOE SLO/GPIO TP R_SV_ET_R STOUT0/GPIO TP MI_TERM_SEL 0 STOUT/GPIO TP GPIO GPIO/LGPIO TP TP TP IH_TP IH_TP IH_TP0 K 0 SPKR MH_SYN# TP TP TP TP0 M0IUX SLN SM ST GPIO locks SYS GPIO Power MGT MIS GPIO ontroller Link ST0GP/GPIO STGP/GPIO STGP/GPIO STGP/GPIO LK LK SUSLK SLP_S# SLP_S# SLP_S# S_STTE#/GPIO PWROK PRSLPVR/GPIO TLOW# PWRTN# LN_RST# RSMRST# K_PWRG LPWROK SLP_M# L_LK0 L_LK L_T0 L_T L_VREF0 L_VREF L_RST0# L_RST# MEM_LE/GPIO GPIO0/SUS_PWR_K GPIO/_PRESENT WOL_EN/GPIO E E0 0 K R 0 E M U U T E F E +V OR_I OR_I0 OR_I OR_I SUSLK SLP_S# S_STTE# PM_IH_PWROK IH_SLP_M# L_VREF0_IH L_VREF_IH SUS_PWR_K _PRESENT IH_WOL_EN LK_M_IH LK_M_US TP TP0 TP TP TP TP TP0 TP R SUS# SUS#, PRSLPVR, PM_TLOW# EPWROK L_LK0 L_T0 L_RST#0 T_OFF# 00K/F_ NSWON# RSMRST# K_PWG 0 *0.U/0V_ R *.K/F_ R */F_ +VS 0.0V SWI# R PM_RI# R0 SM_LK_ME R SM_T_ME R NSWON# R PLK_SM R PT_SM R SM_LERT# R PIE_WKE# R PM_TLOW# R SM_LINK_LERT# R SYS_RST# R T_OFF# R +V 0.U/0V_ R.K/F_ R /F_ +VS 0K/F_ 0K/F_ 0K/F_ 0K/F_ 0K/F_.K/F_.K/F_ 0K/F_ 0K/F_.K/F_ 0K/F_ 0K/F_ 0K/F_ +V PR K/F_ VR_PWRGO_LKEN Q S0--F VR_PWRG_K0# R 00K/F_ +V +VSUS 0 R.K/F_ U, ELY_VR_PWRGOO,, EPWROK *MVHG0FTG R *0_/S SI- *0.U/0V_ PM_IH_PWROK R0 0K/F_ R0 0_ 0P/0V_ LK_M_US LK_M_IH +V R *_ *0P/0V_ Sam G R 0K/F_ OR_I0 Sam M R *0K/F_ OR_I R0 L00 R0 L00 R U00 R IH_TP PM_THRM# SERIRQ LKRUN# KSMI# SI# SUS_PWR_K RSMRST# *0K/F_ OR_I *0K/F_ OR_I *0K/F_ OR_I *0K/F_ OR_I R R R R R R R0 R R R0 R R R R *0K/F_.K/F_ 0K/F_.K/F_ 0K/F_ 0K/F_ 0K/F_ 0K/F_ *0K/F_ 0K/F_ 0K/F_ 0K/F_ 0K/F_ 0K/F_ oard I 0 oard I oard I oard I oard I oard I PV Update oard I table oard I table oard I 0 oard I oard I oard I oard I oard I GPIO GPIO GPIO GPIO GPIO GPIO RESERVE Samsung G Samsung M RESERVE L00.G L00.G U00.G PROJET : FP Quanta omputer Inc. Size ocument Number Rev N ustom IH (PM/GPIO) ate: Thursday, May, 00 Sheet of

21 0uH+-0%_00m F_0ohm+-%_00mHz_._0.0 ohm / Follow G 0 VccSusH;m VREF: m VREF_Sus:m Vcc_: 0m VccSus_: m VccH:m VccGLN_: m VccGLN_: 0m VccLN_: m VccGLNPLL: m VccLan_0+ VccL_0+ Vcc_0 -->. Vcc :. VccUSPLL: m Vcc : m VccSTPLL: m VccMI: m VccMIPLL: m V_PU_IO: m VccL_: m SI- SI- SI- SI- PV- PV- PV- PV- PV- PV- +VREF +V.S_IH_VMIPLL TP_VSUS.0_ TP_VSUS.0_ TP_VSUS._ TP_VSUS._ +VL_ +VL_ +.V_PIE_IH +V._US_IH TP_VL.0 TP_VL.0 +V.0S_IH_IO +V.S_MI_IH +.V_PIE_IH +V.0S_IH_MI +V.S_PI_IH +V._IH VLN_0_INT_IH +.V_PLL_IH +.V_ST_IH +V.S_IH_GLNPLL_R_L +V.S_US_IH +V.M_IH +V.S_GLN_IH +VH +VSUSH +V.S_ST_IH +V.S_VPORE_IH +IH_VREF_SUS +V.0S_IH +V +V +V +.V_PIE_IH +V +V +V +V +VS +VS +VRT +.V +.V +.V +.0V +.0V +.0V +.0V +.V +.V +VS +VS Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET : FP N IH (POWER/GN) ustom 0 Thursday, May, 00 Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET : FP N IH (POWER/GN) ustom 0 Thursday, May, 00 Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET : FP N IH (POWER/GN) ustom 0 Thursday, May, 00 0.U/0V_ 0.U/0V_ 0.U/0V_ 0.U/0V_ SMK00L--F SMK00L--F L 0UH/0._0% L 0UH/0._0% 0.U/0V_ 0.U/0V_ R *0_/S R *0_/S 0.U/0V_ 0.U/0V_ 0U/.V_ 0U/.V_ L LMPGSN L LMPGSN 0 0.0U/V_ 0 0.0U/V_ 0.U/0V_ 0.U/0V_ R 00/F_ R 00/F_ 0 0.U/0V_ 0 0.U/0V_ R *0_/S R *0_/S *0.U/0V_ *0.U/0V_ R *0_/S R *0_/S 0 0.U/0V_ 0 0.U/0V_ T *P T *P 0 0U/.V_ 0 0U/.V_ 0.U/0V_ 0.U/0V_ 0.U/0V_ 0.U/0V_ SMK00L--F SMK00L--F 0 T T/R 0 T T/R 0 0.U/0V_ 0 0.U/0V_ L0 UH/00M_0% L0 UH/00M_0% R *0_/S R *0_/S ORE VGP TX RX US ORE PI GLN POWER VP_ORE VPSUS VPUS UF M0IUX SLN ORE VGP TX RX US ORE PI GLN POWER VP_ORE VPSUS VPUS UF M0IUX SLN VREF G VREF_SUS U V [0] J V [0] K V [0] K V [0] L V [0] L V [0] M V [0] M V [0] N V [0] N V [0] P V [] R V [] T V [] T V [] U V [] U V_[0] V VMIPLL P V [0] U V [0] V V [0] W VSTPLL W V_[0] E V [0] U V [0] V VUSPLL U VLN_0[] G VLN_0[] H V_0[0] L V_0[0] L V_0[0] L V_0[0] L V_0[0] L V_0[0] M V_0[0] M V_0[0] N V_0[0] N V_0[0] P V_0[] P V_0[] R V_0[] R V_0[] R V_0[] R V_0[] R VLN_[] G VLN_[] H VH VSUSH V0 V_PU_IO[] V V_PU_IO[] U V_[0] H V_[0] H VRT G VSUS_[0] G VSUS_[0] G VSUS_[0] H VSUS_[0] J VSUS_[0] J VSUS_[0] K VSUS_[0] K VSUS_[0] L VSUS_[0] L VSUS_[] M VSUS_[] M VSUS_[] N VSUS_[] N VSUS_[] P VSUS_[] P VSUS_0[] T VSUS_0[] H V [] H V [] V V [] U VSUS_[0] W V_[0] G VGLN_[] J VGLN_[] H VGLN_ K VGLNPLL J V_[0] VSUS_[] H VSUS_[] V V_MI[] U V_MI[] T VL_0 G VL_[] K VL_[] J VL_ H V [0] W V_[0] V V_[0] W V [0] W V [] G V [0] V V [0] U V [0] W0 V [] T V [] U 0U/.V_ 0U/.V_ U/V_ U/V_.U/.V_.U/.V_ 0.U/0V_ 0.U/0V_ 0.U/0V_ 0.U/0V_ 0.U/0V_ 0.U/0V_ U/.V_ U/.V_ 0.U/0V_ 0.U/0V_ 0 0.0U/0V_ 0 0.0U/0V_ R *0_/S R *0_/S T *P T *P R0 *0_/S R0 *0_/S R *0_/S R *0_/S R *0_/S R *0_/S T *P T *P T *P T *P 0.U/0V_ 0.U/0V_ U/.V_ U/.V_ 0.U/.V_ 0.U/.V_ 0.U/0V_ 0.U/0V_ T *P T *P 0.U/0V_ 0.U/0V_ 0 0U/.V_ 0 0U/.V_ 0 0.U/0V_ 0 0.U/0V_ 0.U/0V_ 0.U/0V_ R *0_/S R *0_/S L UH/00M_0% L UH/00M_0% U/0V_ U/0V_ R *0_/S R *0_/S R *0_/S R *0_/S 0.0U/V_ 0.0U/V_ R *0_/S R *0_/S R H0KF-T_ R H0KF-T_ R *0_/S R *0_/S 0 0U/.V_ 0 0U/.V_ R *0_/S R *0_/S R 0_ R 0_ 0.U/0V_ 0.U/0V_ 0.U/0V_ 0.U/0V_ UE M0IUX SLN UE M0IUX SLN [00] [00] [00] 0 [00] [00] [00] [00] [00] [00] [00] E [0] E [0] E [0] E [0] E [0] E [0] E [0] E [0] E [0] F [00] G [0] G [0] G0 [0] G [0] G [0] G [0] G [0] H0 [0] H [0] H [00] H [0] J [0] J [0] J0 [0] J [0] J [0] J [0] J [0] J [0] J [00] J [0] K [0] K [0] K0 [0] K [0] K [0] K [0] K [0] K [0] K [00] L [0] L [0] L0 [0] L [0] L [0] L [0] L [0] L [0] M [0] M0 [00] M [0] M [0] M [0] M [0] M [0] M [0] N [0] N [0] N [0] N0 [00] N [0] N [0] N [0] N [0] N [0] N [0] N [0] N [0] P [0] P0 [00] P [0] P [0] P [0] P [0] P [0] P [0] R [0] R [0] R [0] R [00] R0 [0] R [0] R [0] R [0] R [0] R [0] R [0] T [0] T0 [00] T [0] T [0] T [0] T [0] T [0] T [0] T [0] U [0] U0 [0] W [0] U [] W [] U [] U [] U [] V [] V [] V [] V [] W [0] W [] W [] W [] W [] W [] W [] W [] W [] W [] Y [0] Y [] [] [] [] [] [] [] [] [] [0] [] [] [] [] [] [] [] [] [] [0] [] [] 0 [] [] [] [] [] [] [] [0] [] E [] E [] E [] E [] E _NTF[0] _NTF[0] _NTF[0] E _NTF[0] E [0] T [] V [] E [] V [] J

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