KL9A Intel Huron River Platform with AMD Discrete GFX

Transcription

1 KL Intel Huron River Platform with M iscrete GFX MHz RIII-SOIMM H. RIII-SOIMM H. PG PG ual hannel R /.V R SYSTEM MEMORY PG,,, <MH Process> Sandyridge. rpg FI FIX MI MIX PI-E Graphics Interfaces PI-Express M Robson ST- PG,,,,, FN / THERML EM- PG HMI ON PG RT PG L ONN PG REGULTOR (R).VSUS,.VSMR_VTERM,.V.V_GPU,.V_PU PG REGULTOR.V_VTT,.V PG ST-S PG ST - H ST M ST M FI MI / VPU, VPU, V PU ore PG PG Speaker PG udio Jack (External MI) PG udio Jack (Headphone) PG PG ST - -ROM PG UIO OE L PG ST M ME FW PG IH.KHz MHz SPI ougarpoint. PH PG,,,,, LP.KHz US. Port, Port US. Ports X luetooth PG PG PI-E LN Intel (//G LN) WGLM PGE MHz Port Finger Print PG ard Reader RTS-GR PG -IN- ard Reader ONN Port anera PG US. VI VL Port Mini PI-E WLN PG PGE VG ore iscrete Port Mini PI-E WWN PG PG SPI Flash PG E IT PGE PG US./. ONN PGE Option K/ PG T/P PG attery PG harger PG PROJET : KL Quanta omputer Inc. Size ocument Number Rev ustom LOK IGRM ate: Wednesday, January, Sheet of

2 P IN T harger ircuit ISL VPU MXETJ VPU a HWPG(/VPU) VPU S_ON VPU O VPU O V_S V_S SYS_PWROK HWPG(ll Power GOO) PM_RM_PWRG H_PWRGOO PLTRST# Huron River VTTPWRGOO SM_RMPWROK UNOREPWRGOO RSTIN# GPU_RST# Madison GPU_RST# VPU WRST_# R K.U NSWON# HWPG(ll Power GOO) WRST# E ITE- ELY ms a b RSMST# SIO_PWRTN# PM_SLP_S# PM_SLP_S# EPWROK RSMRST# PWRTN# PLTRST# RMPWROK PH GPIO SYS_PWROK PWROK MEPWROK GPIO GPIO GPU_HOL_RST# SYS_PWROK a GPU_PWR_EN# GFXPG_R IMVP_PWRG VPU VTM VTS VR_REY VRON R ohm V_ORE V_GFX a VRON a HWPG(/VPU) a HWPG(.VSUS) a SUSON TPSREGR a.v_sus b.v_vtt LO d.vsmr_vterm OZ b HWPG(.V_VTT) VPU c.vpu_pg b._ph HWPG(ll Power GOO) O a VSUS OZ b HWPG(.V_VTT) VPU b.v O a VSUS OZ b HWPG(.V) b MINON b.v a GPU_PWR_EN# b c MX b GFXPG_V_EN a GFX_ORE.VSUS LO RT a V_GFX_PIE OZ VPU ON VPU b b b HWPG(.V) V V ON b V_PIE_PG V O.VSUS TP-H.V O a.v_ely a.v_gpu a HWPG.V_GPU elay b GPU_PWROK GFXPG_R.VSUS O.VSUS O b b.v.vpu elay c.vpu_pg PROJET : KL Quanta omputer <Project Inc. Name> Size ocument Number Rev POWER SEQUENE IGRM ate: Thursday, November, Sheet of

3 LK Gen(LK) / EL for Pre-ES PU_LK select(lk) / EL for Pre-ES PU_SEL PU/=MHz (default) PU/=MHz PROJET : KL Quanta omputer Inc. Size ocument Number Rev lock Generator ate: Thursday, November, Sheet of

4 () () () () () () () () () () () () () () () () () () () () () () () () () () () () () () () () MI_TXN MI_TXN MI_TXN MI_TXN MI_TXP MI_TXP MI_TXP MI_TXP MI_RXN MI_RXN MI_RXN MI_RXN MI_RXP MI_RXP MI_RXP MI_RXP FI_TXN FI_TXN FI_TXN FI_TXN FI_TXN FI_TXN FI_TXN FI_TXN FI_TXP FI_TXP FI_TXP FI_TXP FI_TXP FI_TXP FI_TXP FI_TXP () FI_FSYN () FI_FSYN () FI_INT () FI_LSYN () FI_LSYN ep_omp Sandy ridge Processor (MI,PEG,FI) INT_eP_HP_Q ep_omp connect to PIN W:mils/S:mils/L: mils. ep_omp connect to PIN W:mils/S:mils/L: mils. U MI_RX#[] MI_RX#[] MI_RX#[] MI_RX#[] MI_RX[] MI_RX[] MI_RX[] MI_RX[] G MI_TX#[] E MI_TX#[] F MI_TX#[] MI_TX#[] G MI_TX[] MI_TX[] F MI_TX[] MI_TX[] FI_TX#[] H FI_TX#[] E FI_TX#[] F FI_TX#[] FI_TX#[] FI_TX#[] FI_TX#[] E FI_TX#[] FI_TX[] G FI_TX[] E FI_TX[] G FI_TX[] FI_TX[] FI_TX[] FI_TX[] F FI_TX[] J FI_FSYN J FI_FSYN H FI_INT J FI_LSYN H FI_LSYN ep_ompio ep_iompo ep_hp ep_ux ep_ux# ep_tx[] F ep_tx[] ep_tx[] G ep_tx[] ep_tx#[] E ep_tx#[] ep_tx#[] F ep_tx#[] PU-P-rPG MI Intel(R) FI ep PI EXPRESS* - GRPHIS PEG_IOMPI J PEG_IOMPO J PEG_ROMPO H PEG_RX#[] K PEG_RX#[] M PEG_RX#[] L PEG_RX#[] J PEG_RX#[] J PEG_RX#[] H PEG_RX#[] H PEG_RX#[] G PEG_RX#[] G PEG_RX#[] F PEG_RX#[] E PEG_RX#[] E PEG_RX#[] PEG_RX#[] PEG_RX#[] PEG_RX#[] PEG_RX[] J PEG_RX[] L PEG_RX[] K PEG_RX[] H PEG_RX[] H PEG_RX[] G PEG_RX[] G PEG_RX[] F PEG_RX[] F PEG_RX[] E PEG_RX[] E PEG_RX[] F PEG_RX[] PEG_RX[] E PEG_RX[] PEG_RX[] PEG_TX#[] M PEG_TX#[] M PEG_TX#[] M PEG_TX#[] L PEG_TX#[] L PEG_TX#[] K PEG_TX#[] K PEG_TX#[] J PEG_TX#[] J PEG_TX#[] H PEG_TX#[] G PEG_TX#[] E PEG_TX#[] F PEG_TX#[] PEG_TX#[] F PEG_TX#[] E PEG_TX[] M PEG_TX[] M PEG_TX[] M PEG_TX[] L PEG_TX[] L PEG_TX[] K PEG_TX[] K PEG_TX[] J PEG_TX[] J PEG_TX[] H PEG_TX[] G PEG_TX[] E PEG_TX[] F PEG_TX[] PEG_TX[] E PEG_TX[] PEG_RXN PEG_RXN PEG_RXN PEG_RXN PEG_RXN PEG_RXN PEG_RXN PEG_RXN PEG_RXN PEG_RXN PEG_RXN PEG_RXN PEG_RXN PEG_RXN PEG_RXN PEG_RXN PEG_RXP PEG_RXP PEG_RXP PEG_RXP PEG_RXP PEG_RXP PEG_RXP PEG_RXP PEG_RXP PEG_RXP PEG_RXP PEG_RXP PEG_RXP PEG_RXP PEG_RXP PEG_RXP PEG_OMP PEG_TXN_ PEG_TXN_ PEG_TXN_ PEG_TXN_ PEG_TXN_ PEG_TXN_ PEG_TXN_ PEG_TXN_ PEG_TXN_ PEG_TXN_ PEG_TXN_ PEG_TXN_ PEG_TXN_ PEG_TXN_ PEG_TXN_ PEG_TXN_ PEG_TXP_ PEG_TXP_ PEG_TXP_ PEG_TXP_ PEG_TXP_ PEG_TXP_ PEG_TXP_ PEG_TXP_ PEG_TXP_ PEG_TXP_ PEG_TXP_ PEG_TXP_ PEG_TXP_ PEG_TXP_ PEG_TXP_ PEG_TXP_ PEG_OMP connect to PIN H&J W:mils/S:mils/L: mils. PEG_OMP connect to PIN J W:mils/S:mils/L: mils. PEG_RXN[..] () PEG_RXP[..] () (,,,,) PLTRST# () () () PM_SYN () H_PWRGOO H_SN_IV# E_PEI (,) H_PROHOT# () PM_THRMTRIP# U N V IN GNOUT LVGGW E-QV-.V_PH PU_PLTRST# V_S SN_IV# N. at SN ES #.v R.U/V_ PU_PLTRST# R R E-- R R R TP TP /J_ SKTO# TP_TERR# H_PROHOT#_R *SHORT_ PM_SYN_R *SHORT_ H_PWRGOO_R *.U/V_ K/J_ /J_ PM_RM_PWRG_R (,) SYS_PWROK () PM_RM_PWRG PM_RM_PWRG_Q Sandy ridge Processor (LK,MIS,JTG) RV *EG- N L N L N M P V U PRO_SELET# SKTO# TERR# PEI PROHOT# THERMTRIP# PM_SYN UNOREPWRGOO SM_RMPWROK /J_ PU_PLTRST#_R R RESET# PU-P-rPG E-- R R /J_ R */J_ *K/F_ MIS THERML PWR MNGEMENT V_S LOKS R MIS JTG & PM U *.U/V_ *HG LK LK# PLL_REF_LK PLL_REF_LK# SM_RMRST# SM_ROMP[] K SM_ROMP[] SM_ROMP[] PM_RM_PWRG_Q R R PRY# P PREQ# P TK R TMS R TRST# P TI R TO P R# L PM#[] T PM#[] R PM#[] R PM#[] T PM#[] P PM#[] R PM#[] T PM#[] R /J_.VPU LK_PU_LKP_R LK_PU_LKN_R LK_PLL_SSLKP_R LK_PLL_SSLKN_R SM_ROMP_ R SM_ROMP_ R SM_ROMP_ R XP_PRY# XP_PREQ# XP_TLK XP_TMS XP_TRST# XP_TI_R XP_TO XP_RST# Rb Rc E-- Ra PU_RMRST# () SM_ROMP[] W:mils/S:mils/L: mils, SM_ROMP[] W:mils/S:mils/L: mils, SM_ROMP[] W:mils/S:mils/L: mils, R /F_ R Q NK R R /F_ R R /J_ /J_ R *X /F_./F_ /F_ TP TP TP TP TP TP TP K/F_ K/F_ LK_PU_LKN *P/V_ LK_PLL_SSLKN_R *P/V_ PM_RM_PWRG_R E-QV- MINON# () E-- XP_RST# () LK_PU_LKP () LK_PU_LKN () LK_PLL_SSLKP () LK_PLL_SSLKN () Ra Rb Rc E-- IS N K ohm K ohm E-- LK_PU_LKP *P/V_ LK_PLL_SSLKP_R *P/V_ RF reserved UM ohm N N FI Enable R IS@K/F_ R R R R *IS@K/F_ IS@/J_ IS@/J_ IS@/J_ FI_INT FI_FSYN FI_FSYN FI_LSYN FI_LSYN FI_FSYN can gang all these signals together and tie them with only one K resistor to GN (G V. h..). PEG x (UM Non-stuff) PEG_TXP_ PEG_TXP_ PEG_TXP_ PEG_TXP_ PEG_TXP_ PEG_TXP_ PEG_TXP_ PEG_TXP_ PEG_TXP_ PEG_TXP_ PEG_TXP_ PEG_TXP_ PEG_TXP_ PEG_TXP_ PEG_TXP_ PEG_TXP_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_ PEG_TXP PEG_TXP PEG_TXP PEG_TXP PEG_TXP PEG_TXP PEG_TXP PEG_TXP PEG_TXP PEG_TXP PEG_TXP PEG_TXP PEG_TXP PEG_TXP PEG_TXP PEG_TXP PEG_TXP[..] () PEG_TXN_ PEG_TXN_ PEG_TXN_ PEG_TXN_ PEG_TXN_ PEG_TXN_ PEG_TXN_ PEG_TXN_ PEG_TXN_ PEG_TXN_ PEG_TXN_ PEG_TXN_ PEG_TXN_ PEG_TXN_ PEG_TXN_ PEG_TXN_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_ PEG_TXN PEG_TXN PEG_TXN PEG_TXN PEG_TXN PEG_TXN PEG_TXN PEG_TXN PEG_TXN PEG_TXN PEG_TXN PEG_TXN PEG_TXN PEG_TXN PEG_TXN PEG_TXN PEG_TXN[..] () P & PEG ompensation.v_ph.v_ph.v_ph R./F_ PEG_OMP PEG_IOMPI and ROMPO signals should be routed within mils typical impedance = mohms PEG_IOMPO signals should be routed within mils typical impedance =. mohms R R K_ INT_eP_HP_Q./F_ ep_omp ep_ompio and IOMPO signals should be shorted near balls and routed with typical impedance < mohms Processor pull-up(pu) H_PROHOT# R XP_TO R XP_TMS R XP_TI_R XP_PREQ# XP_TLK R R R XP_TRST# R /F_ /J_ /J_ /J_ */J_ /J_ /J_.V_PH PROJET : KL Quanta omputer Inc. Size ocument Number Rev Sandy ridge / ate: Tuesday, January, Sheet of

5 Sandy ridge Processor (R) U U () M Q[:] () M S# () M S# () M S# () M S# () M RS# () M WE# M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q F F G G F F G G K K K J J J J K M N N N M M N M G G K K H H J J J K J K H H L L P N L M M L P N J H L K L K J H E F V E F S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_S[] S_S[] S_S[] S_S# S_RS# S_WE# R SYSTEM MEMORY S_LK[] S_LK#[] S_KE[] S_LK[] S_LK#[] S_KE[] RSV_TP[] RSV_TP[] RSV_TP[] RSV_TP[] RSV_TP[] RSV_TP[] S_S#[] S_S#[] RSV_TP[] RSV_TP[] S_OT[] S_OT[] RSV_TP[] RSV_TP[] S_QS#[] S_QS#[] S_QS#[] S_QS#[] S_QS#[] S_QS#[] S_QS#[] S_QS#[] S_QS[] S_QS[] S_QS[] S_QS[] S_QS[] S_QS[] S_QS[] S_QS[] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[] V V W W K L G H H G G H G J M L M R M F K N L M R M W W W V V W W V W V W F V V M QSN M QSN M QSN M QSN M QSN M QSN M QSN M QSN M QSP M QSP M QSP M QSP M QSP M QSP M QSP M QSP M M M M M M M M M M M M M M M M M LKP () M LKN () M KE () M LKP () M LKN () M KE () M S# () M S# () M OT () M OT () M QSN[:] () M QSP[:] () M [:] () () M Q[:] () M S# () M S# () M S# () M S# () M RS# () M WE# M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q G F F G G F F G J J K K J J K K M N N N M N M M M M R P N N N P P N T T P N R R R J T T H R J H T N R T T N R T R S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_S[] S_S[] S_S[] S_S# S_RS# S_WE# R SYSTEM MEMORY S_LK[] S_LK#[] S_KE[] S_LK[] S_LK#[] S_KE[] RSV_TP[] RSV_TP[] RSV_TP[] RSV_TP[] RSV_TP[] RSV_TP[] S_S#[] S_S#[] RSV_TP[] RSV_TP[] S_OT[] S_OT[] RSV_TP[] RSV_TP[] S_QS#[] S_QS#[] S_QS#[] S_QS#[] S_QS#[] S_QS#[] S_QS#[] S_QS#[] S_QS[] S_QS[] S_QS[] S_QS[] S_QS[] S_QS[] S_QS[] S_QS[] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[] E R E R T T E E E E F K N N P K P G J M N P K P T R T T T T R T R R T R R M QSN M QSN M QSN M QSN M QSN M QSN M QSN M QSN M QSP M QSP M QSP M QSP M QSP M QSP M QSP M QSP M M M M M M M M M M M M M M M M M LKP () M LKN () M KE () M LKP () M LKN () M KE () M S# () M S# () M OT () M OT () M QSN[:] () M QSP[:] () M [:] () PU-P-rPG PU-P-rPG.V_SUS (,) R_RMRST# R K/F_ PU_RMRST#_R R K/F_ R */J_ PU_RMRST# () () RMRST_NTRL_PH R *SHORT_ E-- Q NK.U/V_ R.K/F_ PROJET : KL Quanta omputer Inc. Size ocument Number Rev Sandy ridge / ate: Tuesday, January, Sheet of

6 U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ Reserved *U/.V_ PU ore Power SN W: uf x uf x (Non-stuff) U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ *U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ *U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ Sandy ridge Processor (POWER) V_ORE UF G V G V G V G V G V G V G V G V G V G V F V F V F V F V F V F V F V F V F V F V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V Y V Y V Y V Y V Y V Y V Y V Y V Y V Y V V V V V V V V V V V V V V V V V V V V V U V U V U V U V U V U V U V U V U V U V R V R V R V R V R V R V R V R V R V R V P V P V P V P V P V P V P V P V P V P V POWER ORE SUPPLY SENSE LINES SVI PEG N R VIO H VIO H VIO G VIO Y VIO VIO U P VIO L VIO VIO J VIO J VIO J VIO J VIO H VIO H H VIO G VIO VIO G G VIO VIO F VIO F VIO F VIO F VIO E VIO E J VILERT# VISLK J J VISOUT V_SENSE J VSS_SENSE J VIO_SENSE VSSIO_SENSE E VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO J.V_PH.V_VTT_ H_PU_SVILRT# H_PU_SVILK H_PU_SVIT PU VTT SN W:. uf x uf x (Non-stuff) U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ *U/.V_ *U/.V_ U/.V_ U/.V_ U/.V_ *U/.V_ VTT_SENSE () TP uf (Reserved) *U/.V_ R */short_ R R *U/.V_ /J_ /J_ (,,) SMR_VREF *U/.V_.V_PH PU VPL SN W: uf/mohm x uf x uf x U/.V_ U/.V_ V_ORE V_SENSE () VSS_SENSE () R.V PU VGT SN W: uf x uf x (Reserved) V_GFX */J_ R VR_REF_PU Ra IS Ra ohm E-- *U/.V_ *U/.V_ *U/.V_ *U/.V_ /J_ U/.V_ Sandy ridge Processor (GRPHI POWER) *U/.V_ *U/.V_ *U/.V_ *U/.V_ *U/.V_ *U/.V_ *U/.V_ *U/.V_ U/.V_ *U/.V_ *U/.V_ *U/.V_ *U/.V_ SW N U/.V_ Layout note: need routing together and LERT need between LK and T H_PU_SVILK Place PU resistor close to PU H_PU_SVIT *U/V_ R.V_PH R /F_ E-- UG T VXG T VXG T VXG T VXG T VXG T VXG R VXG R VXG R VXG R VXG R VXG R VXG P VXG P VXG P VXG P VXG P VXG P VXG N VXG N VXG N VXG N VXG N VXG N VXG M VXG M VXG M VXG M VXG M VXG M VXG L VXG L VXG L VXG L VXG L VXG L VXG K VXG K VXG K VXG K VXG K VXG K VXG J VXG J VXG J VXG J VXG J VXG J VXG H VXG H VXG H VXG H VXG H VXG H VXG VPLL VPLL VPLL PU-P-rPG *SHORT_ E-- R Place PU resistor close to PU *SHORT_ POWER GRPHIS.V RIL.V_PH.V_PH SENSE LINES S RIL R -.V RILS VREF MIS SVI LK lose to VR R./F_ VR_SVI_LK () SVI T lose to VR R /F_ VXG_SENSE K VSSXG_SENSE K E-- SM_VREF VR_SVI_T () SVI LERT L VQ F VQ F VQ F VQ VQ VQ VQ Y Y VQ VQ Y U VQ VQ U VQ U VQ P VQ P VQ P M VS M VS L VS J VS J VS J VS H VS H VS VS_SENSE H TP TP VR_REF_PU H_F_ R F_ VS_VI VR_REF_PU Note: VR_REF_PU should have mil trace width U/.V_ E-- R R U/.V_ K/J_ */J_ */J_ VUS_SENSE () VS_SEL () E-- V_GFX V_XG_SENSE () VSS_XG_SENSE () PU MH SN W: uf/mohm x uf x U/.V_ *U/V_ U/.V_ U/.V_ U/.V_ R U/.V_ K/J_ U/.V_ U/.V_ U/.V_.V.VPU uf (Reserved) *U/.V_ PU S SN W: uf/mohm x uf x U/.V_.V_PH PU-P-rPG (,) MINON_V Q NK R K/J_ H_PU_SVILRT# R /J_ R /J_ E-- R *SHORT_ VR_SVI_LERT# () PROJET : KL Quanta omputer Inc. Size ocument Number Rev Sandy ridge / ate: Tuesday, January, Sheet of

7 T T T T T T T T T T T T T R R R R R R R R R P P P P P P P P P P P P N N N N N N N N N N M M M M M M M M M M M M L L L L L L L L L L L L K K K K K K K K K K K J UH VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS Sandy ridge Processor (GN) VSS UI VSS J VSS J VSS J T VSS VSS J T VSS VSS J T VSS VSS J T VSS VSS J T VSS VSS J T VSS VSS J T VSS VSS J T VSS VSS H T VSS VSS H T VSS VSS H P VSS VSS H P VSS VSS H P VSS VSS H P VSS VSS H P VSS VSS H P VSS VSS H N VSS VSS H N VSS VSS H N VSS VSS H N VSS VSS H N VSS VSS G N VSS VSS G N VSS VSS G N VSS VSS F N VSS VSS F N VSS VSS F M VSS VSS F L VSS VSS E L VSS VSS E L VSS VSS E L VSS VSS E L VSS VSS E L VSS VSS E L VSS VSS E L VSS VSS E L VSS VSS E L VSS VSS E L VSS VSS E K VSS VSS K VSS VSS K VSS VSS K VSS VSS J VSS VSS J VSS VSS H VSS VSS H VSS VSS H VSS VSS H VSS VSS H VSS VSS H VSS VSS H VSS VSS H VSS VSS H VSS VSS H VSS VSS H VSS VSS H VSS VSS Y H VSS VSS Y H VSS VSS Y H VSS VSS Y H VSS VSS Y H VSS VSS Y H VSS VSS W G VSS VSS W G VSS VSS W G VSS VSS W G VSS VSS W G VSS VSS W G VSS VSS W G VSS VSS W G VSS VSS W F VSS VSS W F VSS VSS U F VSS VSS U VSS U VSS U VSS U VSS U VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS F F E E E E E E E E E E E E E E E E E () SMR_VREF_Q_M () SMR_VREF_Q_M TP TP TP FG FG FG FG FG FG SMR_VREF_Q_M SMR_VREF_Q_M Sandy ridge Processor (RESERVE, FG) R *K/J_ / dd for Pre-ES TP R *K/J_ K K L L K L L M M M M M N N N M K N J H J H J F F F G G E J J UE FG[] FG[] FG[] FG[] FG[] FG[] FG[] FG[] FG[] FG[] FG[] FG[] FG[] FG[] FG[] FG[] FG[] FG[] VXG_VL_SENSE VSSXG_VL_SENSE V_VL_SENSE VSS_VL_SENSE RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV VIO_SEL RSV PU-P-rPG RESERVE RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV V_IE_SENSE RSV RSV RSV RSV RSV KEY L G E K W T M J T J H G R T T P R J K H N M T T R Reserved for Intel ebug For rpg socket, RSV pin should be left N TP TP PU-P-rPG PU-P-rPG Processor Strapping FG (PEG Static Lane Reversal) The FG signals have a default value of '' if not terminated on the board. Normal Operation Lane Reversed FG FG FG R R R K/F_ *K/F_ *K/F_ FG FG R R *K/F_ *K/F_ FG[:] (PIE Port ifurcation Straps) : (efault) x - evice functions and disabled : x, x - evice function enabled ; function disabled : Reserved - (evice function disabled ; function enabled) : x,x,x - evice functions and enabled FG (P Presence Strap) FG (PEG efer Training) isable; No physical P attached to ep PEG train immediately following xxreset de assertion Enable; n ext P device is connected to ep PEG wait for IOS training PROJET : KL Quanta omputer Inc. Size ocument Number Rev Sandy ridge / ate: Tuesday, January, Sheet of

8 E-QV- () SUS_PWR_K_R E_PWROK_R XP_RST# PIE_WKE# () XP_RST# K SYS_RESET# WKE# PIE_WKE# (,) () SYS_PWROK *U/V_ () PM_RM_PWRG RSMRST# () SUS_PWR_K () SIO_PWRTN# () _PRESENT () () () () () () () () () () () () () () () () E_PWROK E--.V_PH MI_RXN MI_RXN MI_RXN MI_RXN MI_RXP MI_RXP MI_RXP MI_RXP MI_TXN MI_TXN MI_TXN MI_TXN MI_TXP MI_TXP MI_TXP MI_TXP R R RV R R R R R R./F_ MI_OMP /F_ MI_RIS E-- E-- R *EG- *_ *SHORT_ *SHORT_ *SHORT_ E_PWROK_R PWROK_R PM_RM_PWRG RSMRST# SUS_PWR_K_R *SHORT PRESENT_R E-- PM_TLOW# PM_RI# ougar Point (MI,FI,PM) U E G G E J J W W V Y Y Y U J G H *SHORT_SYS_PWROK_R P */J_ L L K E H E MIRXN MIRXN MIRXN MIRXN MIRXP MIRXP MIRXP MIRXP MITXN MITXN MITXN MITXN MITXP MITXP MITXP MITXP MI_ZOMP MI_IROMP MIRIS SUSK# SYS_PWROK PWROK PWROK RMPWROK RSMRST# MI System Power Management V V_S V_S V_S SW V_S V_S FI SUSWRN#/SUSPWRNK/GPIO PWRTN# PRESENT / GPIO TLOW# / GPIO RI# ougarpoint_rp FI_RXN FI_RXN FI_RXN FI_RXN FI_RXN FI_RXN FI_RXN FI_RXN FI_RXP FI_RXP FI_RXP FI_RXP FI_RXP FI_RXP FI_RXP FI_RXP V_S FI_INT FI_FSYN FI_FSYN FI_LSYN FI_LSYN SWVRMEN PWROK LKRUN# / GPIO SUS_STT# / GPIO SUSLK / GPIO SLP_S# / GPIO SLP_S# SLP_S# SLP_# SLP_SUS# PMSYNH SLP_LN# / GPIO J Y E H J G G G F G E G J H W V V E N G N H F G G P K SWVREN R LKRUN# LP_P# SLP_LN# E-- *SHORT_ PH_SUSLK SLP_S# SLP_# R PWROK T T FI_TXN () FI_TXN () FI_TXN () FI_TXN () FI_TXN () FI_TXN () FI_TXN () FI_TXN () FI_TXP () FI_TXP () FI_TXP () FI_TXP () FI_TXP () FI_TXP () FI_TXP () FI_TXP () *SHORT_ T T T FI_INT () FI_FSYN () FI_FSYN () FI_LSYN () FI_LSYN () RSMRST# LKRUN# () PM_SLP_S# () SIO_SLP_S# () T PM_SYN () SLP_LN# () () INT_LVS_LON () INT_LVS_VEN () INT_EILK () INT_EIT () INT_TXLLKOUTN () INT_TXLLKOUTP E-- () INT_RT_HSYN () INT_RT_VSYN R place close to PH RF reserved close to PH E-- R R R /F_ /F_ *P/V_ R R *.U/V_ *.U/V_ /F_ *P/V_ INT_RT_LU INT_RT_GRE INT_RT_RE E-- () LVS_RIGHT_PWM V () INT_TXLOUTN () INT_TXLOUTN () INT_TXLOUTN () INT_TXLOUTP () INT_TXLOUTP () INT_TXLOUTP () INT_RT_LU () INT_RT_GRE () INT_RT_RE () INT_LK () INT_T R R /J_ /J_ R R *P/V_ R R *P/V_ R /J_ /J_ /J_ /J_ /J_ /J_ ohm for SW; ohm for UM R R.K/F_ INT_EILK_R INT_EIT_R T LV_IG INT_TXLLKOUTN_R INT_TXLLKOUTP_R INT_TXLOUTN INT_TXLOUTN INT_TXLOUTN INT_TXLOUTP INT_TXLOUTP INT_TXLOUTP INT_EILK_R INT_EIT_R INT_TXLLKOUTN_R INT_TXLLKOUTP_R RF reserved INT_RT_LU INT_RT_GRE INT_RT_RE INT_RT_HSYN_R INT_RT_VSYN_R _IREF R K/F_.K/J_.K/J_ eep sleep option SUS_PWR_K PWROK SLP_SUS J M P T K T P F F E E K K N M K J N M K J F F H H F F H H F F N P T T M M M T T ougar Point (LVS,I) U L_KLTEN L_V_EN L_KLTTL L LK L T L_TRL_LK L_TRL_T LV_IG LV_VG LV_VREFH LV_VREFL LVS_LK# LVS_LK LVS_T# LVS_T# LVS_T# LVS_T# LVS_T LVS_T LVS_T LVS_T LVS_LK# LVS_LK LVS_T# LVS_T# LVS_T# LVS_T# LVS_T LVS_T LVS_T LVS_T RT_LUE RT_GREEN RT_RE RT LK RT T RT_HSYN RT_VSYN _IREF RT_IRTN ougarpoint_rp Support To PH SUSK# (Pop R) SWPWRG (Pop Q, R, Q, R) E LVS RT igital isplay Interface SVO_TVLKINN SVO_TVLKINP SVO_STLLN SVO_STLLP SVO_INTN SVO_INTP SVO_TRLLK SVO_TRLT P_UXN P_UXP P_HP Not support E or N (Non-pop R) RSMRST (Pop R) N P_N P_P P_N P_P P_N P_P P_N P_P P_TRLLK P_TRLT P_UXN P_UXP P_HP P_N P_P P_N P_P P_N P_P P_N P_P P_TRLLK P_TRLT P_UXN P_UXP P_HP P_N P_P P_N P_P P_N P_P P_N P_P P P M M P P P M E-- R R T T T INT_HMI_HP_Q V V V V U U V V P P P P T Y Y Y Y M M T T H F E F E J G P_HP_PU P_HP_PU INT_HMI_HP_Q RF reserved close to PH /J_ /J_ *.U/V_ V R *K/J_ *.U/V_ Q NK INT_HMI_SL () INT_HMI_S () INT_HMI_TXN () INT_HMI_TXP () INT_HMI_TXN () INT_HMI_TXP () INT_HMI_TXN () INT_HMI_TXP () INT_HMI_TXN () INT_HMI_TXP () R K/J_ INT. HMI INT_HMI_HP () PH Pull-high/low(LG) V V_S System PWR_OK(LG) V_S V_RT PWROK FOR SW VPU VPU P_HP_PU P_HP_PU R R K/J_ K/J_ V LKRUN# XP_RST# RSMRST# SYS_PWROK R R R R R E-QV-.K/J_ K/J_ *K/J_ K/J_ K/J_ PM_RI# PM_TLOW# PIE_WKE# SLP_LN# SUS_PWR_K R R R R R K/J_.K/J_ K/J_ *K/J_ K/J PRESENT R K/J_ PM_RM_PWRG R */F_ / hange topology; ohm PU to V_S (,) SYS_PWROK SYS_PWROK U TSH *.U/V_ IMVP_PWRG () E_PWROK R K/J_ R K/J_ SWVREN R *K/J_ On ie SW VR Enable High = Enable (efault) Low = isable V_S VPU V_SW R *K_ *RV- *RV- Q *PTEU R *K_ Q *N PWROK *.U/V_ add cap to timing tune INT_EILK INT_EIT Follow PG ep disable guide PROJET : KL Quanta omputer Inc. Size ocument Number Rev ougar Point / R R.K/J_.K/J_ ate: Tuesday, January, Sheet of

9 RT ircuitry(rt) V_SW V_RT_ () Z_ITLK () () mils VPU E-QV- H us(lg) Z_SYN Z_RST# R R () Z_SOUT R K/J_ MIL T T_ONN */J_ *SHORT_V_RT_ MIL R R V_S V_RT_ PH JTG ebug (LG) R */F_ R R R */F_ /J_ V_RT Z_ITLK_R /J_Z_SYN_OE /J_ /J_ T Z_RST#_R Z_SOUT_R R */F_ E-- R mils R U/.V_ K/J_ K/J_ U/.V_ U/.V_ Z_SYN_OE RT_RST# SRT_RST# To Separate odec Sync by P R M/J_ Q J *SHORT_ P J *SHORT_ P E-QV- V Z_SYN_R N PH(LG) E-QV- Z_ITLK_R RF reserved P/V_ P/V_ E-- V_RT *P/V_ Y XTL_.KHZ R () () SPKR Z_SIN () INTEL_T_SW# R M/J_ M/J_ TP TP TP TP RT_X RT_X RT_RST# SRT_RST# SM_INTRUER# PH_INVRMEN Z_SYN_R SPKR Z_RST#_R TP Z_SOUT_R TP PH_JTG_TK_R PH_JTG_TMS_R PH_JTG_TI_R PH_JTG_TO_R ougar Point (H,JTG,ST) G K N L T K E G N J H K H U RTX RTX RTRST# SRTRST# INTRUER# INTVRMEN H_LK H_SYN SPKR H_RST# H_SIN H_SIN H_SIN H_SIN H_SO RT IH H_OK_EN# / GPIO H_OK_RST# / GPIO JTG_TK JTG_TMS JTG_TI JTG_TO JTG ST LP ST G V V V_S FWH / L FWH / L FWH / L FWH / L FWH / LFRME# LRQ# LRQ# / GPIO SERIRQ STRXN STRXP STTXN STTXP STRXN STRXP STTXN STTXP STRXN STRXP STTXN STTXP STRXN STRXP STTXN STTXP STRXN STRXP STTXN STTXP STRXN STRXP STTXN STTXP STIOMPO STIOMPI STROMPO STOMPI E LP_RQ# K L_K_OFF V M M P P ST_TXN_ ST_TXP_ M M P ST_TXN_ P ST_TXP_ H H F ST_TXN_ F ST_TXP_ Y Y Y Y Y Y ST_OMP ST_OMP R R LP_L (,) LP_L (,) LP_L (,) LP_L (,) LP_LFRME# (,) LP_RQ# () L_K_OFF# () IRQ_SERIRQ (,).U/V_.U/V_.U/V_.U/V_.U/V_.U/V_./F_./F_.V_PH ST_RXN () ST_RXP () ST_TXN () ST_TXP () ST_RXN () ST_RXP () ST_TXN () ST_TXP () ST_RXN () ST_RXP () ST_TXN () ST_TXP () IRQ_SERIRQ O_PRSNT# L_K_OFF# ST_T# INTEL_T_SW# SS H(Mini card) / add SS ST ST H ST O R R R R R.K/J_ *K/J_ K_ K_ K/J_ V R */F_ R */F_ PH_JTG_TMS_R PH_JTG_TI_R PH_JTG_TO_R PH_JTG_TK_R R */F_ R */J_ PH Strap Table () PH_SPI_LK () PH_SPI_S# VPU R *K/J_ () PH_SPI_SI () PH_SPI_SO PH_SPI_LK PH_SPI_S# PH_SPI_S# PH_SPI_SI PH_SPI_SO T SPI_LK Y SPI_S# T SPI_S# V SPI_MOSI U SPI_MISO ougarpoint_rp SPI V V STRIS STLE# STGP / GPIO STGP / GPIO H P V P ST_RIS S_IT R /F_ ST_T# () O_PRSNT# () PH ual SPI (LG) PH_SPI_S# PH_SPI_LK PH_SPI_SI PH_SPI_SO R R R V_PH_SPI /J_ /J_ /J_ R PH_SPI_LK_R PH_SPI_SI_R PH_SPI_SO_R *P/V_.K/J_ Mbit (M yte), SPI U E# V SK SI SO HOL# R WP# VSS WQVSSIG.K/J_ V_PH_SPI.U/V_ Winbon KEPN Pin Name Strap description Sampled onfiguration SPKR No reboot mode setting PWROK = efault (weak pull-down K) = Setting to No-Reboot mode GNT# / GPIO GNT# / GPIO GPIO Top-lock Swap Override oot IOS Selection [bit-] oot IOS Selection [bit-] PWROK PWROK PWROK = "top-block swap" mode = efault (weak pull-up K) INTVRMEN Integrated.V VRM enable LWYS Should be always pull-up H_SO Flash escriptor Security RSMRST GNT# GNT# LP = Override = efault (weak pull-up K) oot Location SPI * V V_RT V_S R R R *K/J_ K/J_ SPKR PI_GNT# () PH_INVRMEN efault weak pull-up on GNT/# [Need external pull-down for LP IOS] R R R *K/J_ *K/J_ *K/J_ *K/J_ S_IT () S_IT Z_SOUT_R E-QV- V_S V R R *R *SHORT_ V_PH_SPI F_TVS GPIO MI/FI Termination voltage On-die PLL Voltage Regulator PWROK RSMRST# H_SYN On-ie PLL VR Voltage Select RSMRST = Set to Vss = Set to Vcc (weak pull-down K) = isable = Enable (efault) = Support by.v (weak pull-down) = Support by.v R R R V_S *K/J_ R.K/J_.K/J_ K/J_.V F_TVS () H_SN_IV# () PLL_OVR_EN (,) Z_SYN_R GPIO Integrated lock hip Enable RSMRST# Should be pull-down (weak pull-up K) SPI_MOSI itpm function isable PWROK = efault (weak pull-down K) = Enable V R *K/J_ PH_SPI_SI NV_LE Intel nti-theft H protection PWROK = isable (Internal pull-down kohm) PROJET : KL Quanta omputer Inc. Size ocument Number Rev ougar Point / ate: Tuesday, January, Sheet of

10 ougar Point-M (PI,US,NVRM) ougar Point-M (PI-E,SMUS,LK) U () LK_LP_EUG () LK_PI_ E-- (,) E P/V/G_ () () () () () () O_M# LK_PI_F OR_I RF_ON OR_I S_IT T_IS PI_GNT# TP E-- TP TP E R R R P/V/G_ PI_PIRQ# PI_PIRQ# PI_PIRQ# PI_PIRQ# OR_I OR_I S_IT T_IS PI_GNT# MP_PWR_TRL# EXTTS_SNI_RV_PH EXTTS_SNI_RV_PH PI_PLTRST# LK_LP_TPM_ /J_ LK_PI_F_R /J_ LK_PI_LP_R /J_ LK_PI_E_R G J H J G H H K K N H H M M Y K L M Y G E E J E F G V U Y U Y V W K K H G E E F G G K H H J K H E-- UE TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP LK_PI_F *P/V_ PIRQ# PIRQ# PIRQ# PIRQ# REQ# / GPIO V REQ# / GPIO V REQ# / GPIO V GNT# / GPIO V GNT# / GPIO V GNT# / GPIO V PIRQE# / GPIO V PIRQF# / GPIO V PIRQG# / GPIO V PIRQH# / GPIO V PME# PLTRST# LKOUT_PI LKOUT_PI LKOUT_PI LKOUT_PI LKOUT_PI ougarpoint_rp RF reserved RSV PI US V_S V_S V_S V_S V_S V_S V_S V_S RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV USPN USPP USPN USPP USPN USPP USPN USPP USPN USPP USPN USPP USPN USPP USPN USPP USPN USPP USPN USPP USPN USPP USPN USPP USPN USPP USPN USPP USRIS# USRIS O# / GPIO O# / GPIO O# / GPIO O# / GPIO O# / GPIO O# / GPIO O# / GPIO O# / GPIO Y V U G T U T T T Y T V V E F V V T Y T F K H E N M L K G E L K G E K L NV_LE USP- USP USP- USP USP- USP USP- USP USP- USP USP- USP US_IS US_O# US_O# US_O# US_O# US_O# US_O# US_O# US_O# R TP USP- () USP () USP- () USP () USP- () USP () USP- () USP () USP- () USP () USP- () USP () USP- () USP () USP- () USP () USP- () USP () USP- () USP () USP- () USP () USP- () USP ()./F_ US_O# () US_O# () US_O# () US_O# () US_EXT_SMI# () US#/eST ombo #(Phoenix debug) US#-> (External L side/ios debug) WLN WWN luetooth US # Reserved) US# (External R side&ios debug) ard Reader Figer Print WiMax USIM EHI EHI US_O# -->US Port# EST O pin US_O# -->US Port# O pin US_O# -->Reserved US_O# -->US Port # O pin E-- LN WLN US. () PIE_RXN_LN () PIE_RXP_LN () PIE_TXN_LN () PIE_TXP_LN () PIE_RXN () PIE_RXP () PIE_TXN () PIE_TXP () PIE_RXN () PIE_RXP () PIE_TXN () PIE_TXP E-- LN WLN US. PIE_TXN_LN_ PIE_TXP_LN_ PIE_TXN_ PIE_TXP_ WWN only use US interface. E--.U/V_PIE_TXN_.U/V_PIE_TXP_ PIELKRQ# LKOUT_PIEN LKOUT_PIEP PIELKRQ# LKOUT_PIEN LKOUT_PIEP PIELKRQ# WWN only use US interface. E-- E-- E-- E-- TP TP.U/V_.U/V_.U/V_.U/V_ LKOUT_PIEN LKOUT_PIEP PIELKRQ# PIELKRQ# PIELKRQ# PIELKRQ# PIELKRQ# LK_PH_ITPN_R LK_PH_ITPP_R G J V U E F Y G J V U F E Y G H Y J G U V G J Y E W Y Y Y J M V Y Y Y Y L V V L E V V T V V K K K PERN PERP PETN PETP PERN PERP PETN PETP PERN PERP PETN PETP PERN PERP PETN PETP PERN PERP PETN PETP PERN PERP PETN PETP PERN PERP PETN PETP PERN PERP PETN PETP LKOUT_PIEN LKOUT_PIEP LKOUT_PIEN LKOUT_PIEP LKOUT_PIEN LKOUT_PIEP LKOUT_PIEN LKOUT_PIEP LKOUT_PIEN LKOUT_PIEP LKOUT_PIEN LKOUT_PIEP PI-E* PIELKRQ# / GPIO PIELKRQ# / GPIO PIELKRQ# / GPIO PIELKRQ# / GPIO PIELKRQ# / GPIO PIELKRQ# / GPIO V_S V_S V V LOKS SMUS ontroller V_S V_S V_S LKOUT_PEG N LKOUT_PEG P PEG LKRQ# / GPIO V_S LKOUT_PIEN LKOUT_PIEP PIELKRQ# / GPIO LKOUT_PIEN LKOUT_PIEP PIELKRQ# / GPIO LKOUT_ITPXP_N LKOUT_ITPXP_P ougarpoint_rp V_S V_S V_S V_S V_S SMLLERT# / PHHOT# / GPIO V_S SMLLK / GPIO V_S SMLT / GPIO Link V FLEX LOKS V V V SMLERT# / GPIO SMLK SMT SMLLERT# / GPIO SMLLK SMLT L_LK L_T L_RST# PEG LKRQ# / GPIO LKOUT_PEG N LKOUT_PEG P LKOUT_MI_N LKOUT_MI_P LKOUT_P_N LKOUT_P_P LKIN_MI_N LKIN_MI_P LKIN_GN_N LKIN_GN_P LKIN_OT_N LKIN_OT_P LKIN_ST_N LKIN_ST_P REFLKIN LKIN_PILOOPK XTL_IN XTL_OUT XLK_ROMP LKOUTFLEX / GPIO LKOUTFLEX / GPIO LKOUTFLEX / GPIO LKOUTFLEX / GPIO E H G E M M T P M V U M M F E J G G E K K K H V V Y K F H K SMLERT# SM_PH_LK SM_PH_T RMRST_NTRL_PH SM_LK_ME SM_T_ME SMLLERT#_R SM_ME_LK SM_ME_T L_LK L_T L_RST# LKOUT_PEG N LKOUT_PEG P LK_UF_PIE_GPLLN LK_UF_PIE_GPLLP LK_UF_LKN LK_UF_LKP LK_UF_REFLKN LK_UF_REFLKP LK_UF_REFSSLKN LK_UF_REFSSLKP LK_PH_M LK_PI_F XTL_IN XTL_OUT XLK_ROMP LK_M_VG_ LK_M LK_M_R_ R TP For E PEG_LKREQ# RMRST_NTRL_PH () SM_LK_ME () SM_T_ME ().V_PH SM_PH_LK SM_LK_ME SM_ME_LK RF reserved LK_PU_LKN () LK_PU_LKP () Mz support IS only R TP TP./F_ LK_PLL_SSLKN () LK_PLL_SSLKP () LK_M_VG () LK_M_R () For LN E-- TP Reserve to cost down crystal. TP *_ R _ R M/J_ Y MHz *P/V_ *P/V_ *P/V_ P/V_ P/V_ E-- E-- SMus(LK) V R.K/J_ SM_PH_T SM_RUN_T SM_RUN_T (,) Q NK V R.K/J_ SM_PH_LK SM_RUN_LK SM_RUN_LK (,) Q NK PI/USO# Pull-up(LG) PLTRST#(LG) PI_PLTRST# R V_S R US_O# US_O# US_O# US_O# US_O# US_O# US_O# US_O# V_S KX V R EXTTS_SNI_RV_PH.U/V_ MP_PWR_TRL# EXTTS_SNI_RV_PH T_IS () GPU_PWR_EN# GPU_PWR_EN# O_M# PLTRST# KX U TSHFU R V K/J_ PI_PIRQ# R.K/J_ PI_PIRQ# R.K/J_ PI_PIRQ# R.K/J_ PI_PIRQ# R.K/J_ *_ PLTRST# PLTRST# (,,,,) E-- LN WLN US. () () () () () () () () PIE_LKREQ_LN# () () LK_PIE_LNP LK_PIE_LNN LK_PIE_WLNN LK_PIE_WLNP PIE_LKREQ_WLN# LK_PIE_USN LK_PIE_USP PIE_LKREQ_US# LK_PIE_VGN LK_PIE_VGP IS:Stuff UM:Non-stuff MP Switch ontrol MP_PWR_TRL# MP_PWR_TRL# R LKOUT_PEG N LKOUT_PEG P LKOUT_PIEP LKOUT_PIEN PIELKRQ# LKOUT_PIEN LKOUT_PIEP PIELKRQ# LKOUT_PIEN LKOUT_PIEP PIELKRQ# Low = MP ON High = MP OFF (efault) R R R _ R R _ R SW@X SW@X SW@X R _ SW@X *K/J_ UM:Ra IS:Rb LK_REQ/Strap Pin(LG) V_S PEG_LKREQ# LK_UF_LKN LK_UF_LKP LK_UF_PIE_GPLLN LK_UF_PIE_GPLLP LK_UF_REFLKN LK_UF_REFLKP LK_UF_REFSSLKN LK_UF_REFSSLKP LK_PH_M V R R R R R R R Ra PIELKRQ# PIELKRQ# PIELKRQ# PIELKRQ# PIELKRQ# PIE_LKREQ_US# PEG_LKREQ# Rb LOK TERMINTION for FIM R R K/J_ K/J_ K/J_ K/J_ K/J_ K/J_ *K/J_ K/J_ K/J_ R R R R R R R R R R K/J_ PIE_LKREQ_WLN# PIE_LKREQ_LN# K/J_ K/J_ K/J_ K/J_ K/J_ K/J_ K/J_ K/J_ K/J_ E-- SMus/Pull-up(LG) V_S (,,) M_LK SM_ME_LK V_S (,,) M_T SM_ME_T Q NK V_S R K/J_ RMRST_NTRL_PH R K/J_ SMLERT# R.K/J_ SM_PH_LK R.K/J_ SM_PH_T R K/J_ SMLLERT#_R R.K/J_ Q NK R.K/J_ PROJET : KL Quanta omputer Inc. Size ocument Number Rev ougar Point / ate: Sheet of Tuesday, January,

11 (,) V PLL_OVR_EN (,) () E_EXT_SMI# () E_EXT_SI# () LN_ISLE# Follow MR, need check R *K Need check R () */J_ T_ON# () GPU_PWR_EN# E-- E-- E-- TEMP_LERT# S_GPIO GPU_PWROK E_EXT_SMI# OR_I E_EXT_SI# () WLN_OFF# IOS_RE () S SS GPIO PLL_OVR_EN_R () WWN_OFF# STP_PI# T_ON# MFG_MOE FI_OVRVLTG TEST_SET_UP SV_ET R _ E-- SYSTEM_I LN_ISLE# HOST_LERT#_R GPU_PWROK ougar Point (GPIO,VSS_NTF,RSV) S SS T H E G U T E E P K K V M N M V V UF MUSY# / GPIO TH / GPIO TH / GPIO TH / GPIO GPIO V_S V_S SW V V V V LN_PHY_PWR_TRL / GPIO GPIO STGP / GPIO TH / GPIO SLOK / GPIO GPIO / MEM_LE GPIO GPIO V V V_S STP_PI# / GPIO GPIO V STGP / GPIO STGP / GPIO SLO / GPIO V_S V V_S V V V V STOUT / GPIO STOUT / GPIO STGP / GPIO GPIO VSS_NTF_ VSS_NTF_ VSS_NTF_ V V V GPIO V V V V V_S PU/MIS TH / GPIO TH / GPIO TH / GPIO TH / GPIO GTE PEI RIN# PROPWRG THRMTRIP# INIT_V# F_TVS TS_VSS TS_VSS TS_VSS TS_VSS N_ VSS_NTF_ VSS_NTF_ VSS_NTF_ VSS_NTF_ VSS_NTF_ VSS_NTF_ VSS_NTF_ P U P Y Y T Y H K H K P G G H H J J J OR_I OR_I E_RIN# PH_THRMTRIP# TP E-- R T /J_ / onnected to GN G rev. SS_ETET# () KL KL KL KL KL E_GTE () E_RIN# () H_PWRGOO () PM_THRMTRIP# () F_TVS () GPIO Pull-up/Pull-down(LG) LN_ISLE# E_EXT_SMI# E_EXT_SI# SS_ETET# STP_PI# E_GTE E_RIN# TEMP_LERT# T_ON# GPU_PWROK WLN_OFF# GPIO GPIO GPIO GPIO OR_I OR_I OR_I E-- R R R R R R R R R R R R E-- R R R R R OR_I OR_I OR_I OR_I OR_I R K/J_ SYSTEM_I R *K/J_ () OR_I () OR_I K/J_ K/J_ K/J_ K/J_ K/J_ K/J_ K/J_ K/J_ K/J_ K/J_ K/J_ K/J_ *K/J_ K/J_ *K/J_ K/J_ K/J_ V_S V OR_I OR_I R R R R R K/J_ *K/J_ K/J_ *K/J_ *K/J_ V VSS_NTF_ VSS_NTF_ VSS_NTF_ VSS_NTF_ NTF VSS_NTF_ VSS_NTF_ VSS_NTF_ VSS_NTF_ J J J SV_SET_UP High = Strong (efault) V_S R E-QV- *K/J_ SV_ET R K/J_ VSS_NTF_ VSS_NTF_ VSS_NTF_ VSS_NTF_ VSS_NTF_ VSS_NTF_ TEST_SET_UP R R K/J_ */J_ V E VSS_NTF_ VSS_NTF_ E E VSS_NTF_ VSS_NTF_ E F F VSS_NTF_ VSS_NTF_ ougarpoint_rp VSS_NTF_ VSS_NTF_ F F SGPIO S_GPIO R R K/J_ */J_ V HOST_LERT#_R R K/J_ V_S Intel ME rypto Transport Layer Security (TLS) cipher suite Low = isable (efault) V V V High = Enable R FI TERMINTION VOLTGE OVERRIE K/J_ FI_OVRVLTG R *K/F_ S SS R *K/F_ IOS_RE LOW - Tx, Rx terminated to same voltage MI TERMINTION VOLTGE OVERRIE Low = Tx, Rx terminated to same voltage ( oupling Mode) (EFULT) R R IOS REOVERY K/J_ */J_ High = isable (efault) Low = Enable MFG-TEST MFG_MOE R R V K/J_ */J_ PROJET : KL Quanta omputer Inc. Size ocument Number Rev ougar Point / ate: Tuesday, January, Sheet of

12 PH(LG).V_PH E--.V_PH.V_PH.V_PH E--.V_PH_V VccORE =. (mils) R _ R L.V_PH_VPLL_EXP.V_VPLL_EXP E--.V_VIO VccIO =. (mils) R _.V *SHORT_ *uh/m_ R V.V_PH E--.V_PH U/.V_ *U/.V_ U/.V_ R E-- U/.V_ U/.V_ U/.V_ *SHORT_ V_V_EXP VFI_VRM R U/.V_ VFI_VRM */J_.V_VPLL_FI *SHORT_.V_VPLL_FI E--.V_PH R R LMPGSN(,.)_ VFI_VRM */J_ U/.V_ U/.V_.U/V_ U/.V_ OUGR POINT (POWER) VVRM:.V (estop) / del for Pre-ES.V (Mobile) *U/V_ E-- UG VORE[] VORE[] VORE[] VORE[] F VORE[] F VORE[] G VORE[] G VORE[] G VORE[] G VORE[] G VORE[] G VORE[] J VORE[] J VORE[] J VORE[] J VORE[] J VORE[] N J N N N N N P P P P T N N H P G P U VIO[] VPLLEXP VIO[] VIO[] VIO[] VIO[] VIO[] VIO[] VIO[] VIO[] VIO[] VIO[] VIO[] VIO[] V_[] VVRM[] VccFIPLL VIO[] VMI[] ougarpoint_rp POWER V ORE VIO FI RT LVS FT / SPI MI HVMOS V VSS VLVS VSSLVS VTX_LVS[] VTX_LVS[] VTX_LVS[] VTX_LVS[] V_[] V_[] VVRM[] VMI[] VLKMI VFTERM[] VFTERM[] VFTERM[] VFTERM[] VSPI U U K K M M P P V V T T G G J J V R */J_ VFI_VRM V Vcc =m(mils) L VLVS V VccLVS=m(mils) R */J_ V_TX_LVS VccTX_LVS=m(mils) L V_V_GIO U/.V_.U/V_ VP_NN V_VME_SPI E-- R.U/V_ VFI_VRM.V_V_MI_I *U/.V_ R.U/V_ U/.V_.U/V_.U/V_ E-- *SHORT_ L E-- R R *SHORT_.U/V_ V.V */J_.V_V_MI V_MI_I V V_S Ra Rb Ra Rb IS R R VMI = m(mils) *SHORT_ R R U/.V_ *uh_ U/.V_.V_PH V.V UM R L VSPI = m(mils).v_ph VLKMI = m(mils) R R R E-- ohm/ /J_ *.uh_ /J_ *SHORT_ E-- U/.V_ */F_ *SHORT_ VPNN = m(mils).v_ph.v_ph.v_ph L.V_PH VRT<m(mils) V_RT V_S V_SW VPLL_PY_PH VME(.V) =??(??mils) E-- R _ E-- R R R R *uh/m_ E--.V_PH m(mils) R *SHORT_.V_PH VSW_= m E--.V_VEPW VccSW =. (mils) *SHORT_ *SHORT_ *SHORT_ */J_ R R U/.V_ *U/.V_.U/.V_ U/.V_ /J_ */J_.V_PH *U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ R U/.V_.U/V_.U/V_.U/V_ R U/.V_ U/.V_ VLK VPSW PH_VSW VSUS.U/V_ VRTEXT VFI_VRM m(mils) m(mils) VFI_VRM VIFFLK VIFFLKN VIFFLKN= m(mils) VSS= m(mils) V.V_SSV */J_.U/V_ VSST.U/V_.U/V_.U/V_ *U/.V_ V.M_VSUS VTT_VPPU ougar Point-M (POWER) T V H *SHORT_ VPLL_PY L L W W W W W W W N Y UJ PSUSYP VSW[] VSW[] VSW[] VSW[] VSW[] VSW[] VSW[] VSW[] VSW[] VSW[] VSW[].V_V PL VPLL.V_V PL F VPLL POWER lock and Miscellaneous F VIO[] F VIFFLKN[] F VIFFLKN[] G VIFFLKN[] G V T PSUS[] V PSUS[] J VLK VSW_ V_SUS_LKF T V_[] VPLLMI VIO[] PSUS[] VSW[] VSW[] VSW[] VSW[] VSW[] VSW[] VSW[] VSW[] VSW[] PRT VVRM[] VSS PSST V_PRO_IO VRT ougarpoint_rp PU RT ST PI/GPIO/LP US MIS H VIO[] VIO[] VIO[] VIO[] VIO[] VSUS_[] VSUS_[] VSUS_[] VSUS_[] VSUS_[] VIO[] VREF_SUS PSUS[] VSUS_[] VREF VSUS_[] VSUS_[] VSUS_[] VSUS_[] V_[] V_[] V_[] V_[] VIO[] VIO[] VIO[] VIO[] V_VPUS V_VUG VUPLL V_PH_VREFSUS V_USSUS V_VPSUS V_PH_VREF V_VPSUS V_VPORE V.U/V_ V.S_ST V.LN_VPLL VPLLST K VVRM= m(mils) VVRM[] VIO[] VIO[] VIO[] VSW[] VSW[] VSW[] VSUSH N P P T T T T V V P T M N N P N N P P W T J F H H F F T V T P VFI_VRM.V_VIO U/.V_ V._._H_IO.V_VUSORE E-- *U/.V_ L R E-- V U/.V_ E-- U/.V_ E-- E--.V_PH VREFSUS=m??m(??mils) *uh/m_.v_ph.v_vepw VME =.(mils) *U/.V_ R.U/V_ *U/.V_ R R R R *SHORT_ R.U/V_.U/V_.U/V_.V_PH.V_SUS.V_PH V_S VREF= m VPORE = m(mils).u/v_ V_S V_S V V V_S VSUS_ = m(mils) U/V_ E--.U/V_ U/V_ R *SHORT_ */J_ /J_ R R R R V.V_PH VSUS_ = m(mils) *SHORT_ *SHORT_ *SHORT_ E-- E-- /F_ RV- /F_ RV- *SHORT_ *SHORT_ *SHORT_ V_S VSUSH= m(mils).v_ph L uh/m.v_v PL V U/.V_ U/.V_ R R */J_ /F_ V_SUS_LKF_R L uh/m_ V_SUS_LKF L uh/m.v_v PL U/.V_ U/V_ U/.V_ U/.V_ PROJET : KL Quanta omputer Inc. Size ocument Number Rev ougar Point / ate: Friday, November, Sheet of

13 Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET : KL ougar Point / Thursday, November, Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET : KL ougar Point / Thursday, November, Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET : KL ougar Point / Thursday, November, IEX PEK-M (GN) PH(LG) UI ougarpoint_rp UI ougarpoint_rp VSS[] Y VSS[] Y VSS[] Y VSS[] Y VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] E VSS[] E VSS[] E VSS[] F VSS[] F VSS[] F VSS[] F VSS[] F VSS[] F VSS[] F VSS[] F VSS[] VSS[] F VSS[] F VSS[] F VSS[] F VSS[] G VSS[] G VSS[] G VSS[] G VSS[] G VSS[] H VSS[] H VSS[] H VSS[] H VSS[] H VSS[] H VSS[] H VSS[] H VSS[] H VSS[] H VSS[] H VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] K VSS[] L VSS[] L VSS[] L VSS[] L VSS[] L VSS[] L VSS[] L VSS[] M VSS[] P VSS[] M VSS[] M VSS[] M VSS[] M VSS[] M VSS[] M VSS[] M VSS[] M VSS[] M VSS[] M VSS[] M VSS[] N VSS[] P VSS[] P VSS[] P VSS[] T VSS[] P VSS[] P VSS[] P VSS[] P VSS[] R VSS[] R VSS[] T VSS[] T VSS[] T VSS[] T VSS[] W VSS[] T VSS[] T VSS[] T VSS[] V VSS[] V VSS[] V VSS[] V VSS[] V VSS[] V VSS[] V VSS[] V VSS[] V VSS[] V VSS[] W VSS[] W VSS[] VSS[] VSS[] VSS[] VSS[] E VSS[] E VSS[] G VSS[] G VSS[] G VSS[] G VSS[] G VSS[] G VSS[] H VSS[] H VSS[] W VSS[] W VSS[] W VSS[] Y VSS[] Y VSS[] Y VSS[] Y VSS[] Y VSS[] Y VSS[] G VSS[] N VSS[] J VSS[] N VSS[] H VSS[] H VSS[] H VSS[] H VSS[] H VSS[] H VSS[] F VSS[] K VSS[] K VSS[] H VSS[] K VSS[] K VSS[] VSS[] VSS[] E VSS[] G VSS[] G VSS[] H VSS[] T VSS[] G VSS[] G VSS[] VSS[] P VSS[] F VSS[] H VSS[] M VSS[] P VSS[] P VSS[] E VSS[] VSS[] G VSS[] J UH ougarpoint_rp UH ougarpoint_rp VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] F VSS[] F VSS[] VSS[] F VSS[] F VSS[] F VSS[] F VSS[] F VSS[] F VSS[] F VSS[] F VSS[] F VSS[] F VSS[] F VSS[] F VSS[] F VSS[] G VSS[] G VSS[] G VSS[] G VSS[] H VSS[] H VSS[] H VSS[] H VSS[] H VSS[] H VSS[] H VSS[] H VSS[] J VSS[] J VSS[] J VSS[] K VSS[] K VSS[] K VSS[] K VSS[] K VSS[] K VSS[] K VSS[] L VSS[] L VSS[] L VSS[] L VSS[] L VSS[] L VSS[] L VSS[] L VSS[] L VSS[] L VSS[] M VSS[] M VSS[] M VSS[] M VSS[] M VSS[] M VSS[] M VSS[] N VSS[] N VSS[] N VSS[] N VSS[] P VSS[] P VSS[] P VSS[] P VSS[] P VSS[] P VSS[] P VSS[] P VSS[] P VSS[] R VSS[] R VSS[] T VSS[] T VSS[] T VSS[] T VSS[] T VSS[] T VSS[] T VSS[] T VSS[] T VSS[] T VSS[] T VSS[] U VSS[] U VSS[] V VSS[] V VSS[] V VSS[] V VSS[] V VSS[] V VSS[] V VSS[] V VSS[] W VSS[] W VSS[] W VSS[] W VSS[] W VSS[] W VSS[] W VSS[] W VSS[] W VSS[] W VSS[] W VSS[] V VSS[] Y VSS[] Y VSS[] Y VSS[] VSS[] E VSS[] VSS[] P VSS[] H VSS[] F VSS[] VSS[] VSS[] J VSS[] J VSS[] E VSS[] T VSS[] T VSS[] M VSS[] L VSS[] L

14 M M Q M Q M Q M Q M Q SMR_VREF_Q_M SMR_VREF_Q_M M M QSP M QSP M QSP M QSP M QSP M QSP M QSP M QSN IMM_S M M QSN M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M M Q M QSN M Q M Q M M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M M QSN M Q M M Q M Q M Q M Q M M M QSN M Q M M Q M M QSN SMR_VREF_Q_M M Q M M QSP M SMR_VREF_Q M QSN M M Q M QSN IMM_S M M M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M [:] () M S# () M S# () M S# () M S# () M S# () M LKP () M LKN () M LKP () M LKN () M KE () M KE () M S# () M RS# () M WE# () M QSP[:] () M QSN[:] () M OT () M OT () M Q[:] () R_RMRST# (,) PM_EXTTS# () SM_RUN_LK (,) SM_RUN_T (,) SMR_VREF_Q_M () SMR_VREF (,,).V_SUS V.V_R_VTT SMR_VREF_IMM V V SMR_VREF_IMM V.V_SUS.V_R_VTT SMR_VREF_Q.V_SUS Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET KL RIII SO-IMM- ustom Tuesday, January, Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET KL RIII SO-IMM- ustom Tuesday, January, Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET KL RIII SO-IMM- ustom Tuesday, January, GMK GMK GMK ST H GMK ST H FOX LTK SUY MLX Standard H type:r---p- R_RVS(R) VREF Q M Solution VREF Q M Solution / Remove M Solution by MOW Place these aps near So-imm.. / Remove ohm to GN E-- R K/F_ R K/F_.U/.V_.U/.V_ U/.V_ U/.V_ P R SRM SO-IMM (P) JIM R-IMM_H=_ST_MLX P R SRM SO-IMM (P) JIM R-IMM_H=_ST_MLX /P /# S# S# K K# K K# KE KE S# RS# WE# S S SL S OT OT M M M M M M M M QS QS QS QS QS QS QS QS QS# QS# QS# QS# QS# QS# QS# QS# Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q.u/V_.u/V_ R */J_ R */J_ U/.V_ U/.V_ U/.V_ U/.V_ U/V_ U/V_ u/.v_ u/.v_.u/v_.u/v_ R K/F_ R K/F_ P/V/XR_ P/V/XR_ U/V_ U/V_.U/.V_.U/.V_ *U/.V_ *U/.V_ R K/J_ R K/J_ U/.V_ U/.V_ R K/J_ R K/J_ P R SRM SO-IMM (P) JIM R-IMM_H=_ST_MLX P R SRM SO-IMM (P) JIM R-IMM_H=_ST_MLX V V V V V V V V V V V V V V V V V V VSP N N NTEST EVENT# RESET# VREF_Q VREF_ VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VTT VTT GN GN.u/V_.u/V_ U/.V_ U/.V_ U/.V_ U/.V_.u/V_.u/V_ R /J_ R /J_.U/.V_.U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ R */J_ R */J_ U/V_ U/V_ R K/J_ R K/J_ U/.V_ U/.V_ U/V_ U/V_ *U/.V_ *U/.V_ U/.V_ U/.V_ U/.V_ U/.V_

15 M M M M M M M M M M M M M M M M QSP M QSP M QSP M QSP M QSP M QSP M QSP M QSP M QSN M QSN M QSN M QSN M QSN M QSN M QSN M QSN M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q IMM_S IMM_S M M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q SMR_VREF SMR_VREF_Q_M SMR_VREF_IMM SMR_VREF_IMM SMR_VREF_Q PM_EXTTS# SMR_VREF_Q_M SMR_VREF_Q_M M [:] () M S# () M S# () M S# () M S# () M S# () M LKP () M LKN () M LKP () M LKN () M KE () M KE () M S# () M RS# () M WE# () M QSP[:] () M QSN[:] () M OT () M OT () M Q[:] () SM_RUN_LK (,) SM_RUN_T (,) SMR_VREF (,,) R_RMRST# (,) SMR_VREF_Q_M () PM_EXTTS# ().V_SUS.V_SUS V.V_R_VTT.V_SUS V V.V_R_VTT.V_SUS SMR_VREF_Q SMR_VREF_IMM Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET KL RIII SO-IMM- Tuesday, January, Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET KL RIII SO-IMM- Tuesday, January, Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET KL RIII SO-IMM- Tuesday, January, / Remove ohm to GN R_RVS(R) VREF Q M Solution. GMK GMK GMK ST H GMK ST H FOX LTK SUY MLX Standard H type:r---p Place these aps near So-imm. *U/.V_ *U/.V_ U/.V_ U/.V_ R */J_ R */J_ U/V_ U/V_.U/.V_.U/.V_ U/.V_ U/.V_.u/V_.u/V_ R K/F_ R K/F_ u/.v_ u/.v_ U/V_ U/V_ U/.V_ U/.V_ R K/J_ R K/J_ R */J_ R */J_ R K/F_ R K/F_ U/.V_ U/.V_ U/V_ U/V_.u/V_.u/V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ P R SRM SO-IMM (P) JIM R-IMM_H=_ST_LTS P R SRM SO-IMM (P) JIM R-IMM_H=_ST_LTS V V V V V V V V V V V V V V V V V V VSP N N NTEST EVENT# RESET# VREF_Q VREF_ VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VTT VTT GN GN U/V_ U/V_ P R SRM SO-IMM (P) JIM R-IMM_H=_ST_LTS P R SRM SO-IMM (P) JIM R-IMM_H=_ST_LTS /P /# S# S# K K# K K# KE KE S# RS# WE# S S SL S OT OT M M M M M M M M QS QS QS QS QS QS QS QS QS# QS# QS# QS# QS# QS# QS# QS# Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q *U/.V_ *U/.V_ R */J_ R */J_ R K/J_ R K/J_ U/.V_ U/.V_ R /J_ R /J_.u/V_.u/V_ R K/J_ R K/J_.U/.V_.U/.V_ U/V_ U/V_ U/.V_ U/.V_ P/V_ P/V_ U/.V_ U/.V_ R K/J_ R K/J_.U/.V_.U/.V_.u/V_.u/V_ R K/J_ R K/J_ U/.V_ U/.V_

16 .GT/s bit rate U POWER PIE_VR=.V V_MEM.V=.V VG_ORE=.~.V.V_PE_V G G UG P E/F POWER PE_V# PE_V# P / POWER N_P_V# N_P_V# E F.V_P_V () () PEG_TXP PEG_TXN PEG_TXP PEG_TXN F E PIE_RXP PIE_RXN PIE_TXP PIE_TXN H G _PEG_RXP _PEG_RXN.U/V_.U/V_ PEG_RXP () PEG_RXN ().V_PE_V G G PE_V# PE_V# P_V# P_V# F F.V_P_V () () () () PEG_TXP PEG_TXN PEG_TXP PEG_TXN PEG_TXP PEG_TXN PEG_TXP PEG_TXN E PIE_RXP PIE_RXN PIE_RXP PIE_RXN PIE_TXP PIE_TXN PIE_TXP PIE_TXN G F F F _PEG_RXP _PEG_RXN _PEG_RXP _PEG_RXN.U/V_.U/V_.U/V_.U/V_ PEG_RXP () PEG_RXN () PEG_RXP () PEG_RXN () G H M M M PE_VSSR# PE_VSSR# PE_VSSR# PE_VSSR# PE_VSSR# P_VSSR# P_VSSR# P_VSSR# P_VSSR# P_VSSR# E E G G H () () () () () () () () () () () () () () () () () () () () PEG_TXP PEG_TXN PEG_TXP PEG_TXN PEG_TXP PEG_TXN PEG_TXP PEG_TXN PEG_TXP PEG_TXN PEG_TXP PEG_TXN PEG_TXP PEG_TXN PEG_TXP PEG_TXN PEG_TXP PEG_TXN PEG_TXP PEG_TXN PEG_TXP PEG_TXN PEG_TXP PEG_TXN PEG_TXP PEG_TXN PEG_TXP PEG_TXN PEG_TXP PEG_TXN PEG_TXP PEG_TXN PEG_TXP PEG_TXN PEG_TXP PEG_TXN PEG_TXP PEG_TXN PEG_TXP PEG_TXN Y Y W W V V U U T T R R P P N PIE_RXP PIE_RXN PIE_RXP PIE_RXN PIE_RXP PIE_RXN PIE_RXP PIE_RXN PIE_RXP PIE_RXN PIE_RXP PIE_RXN PIE_RXP PIE_RXN PIE_RXP PIE_RXN PIE_RXP PIE_RXN PIE_RXP PIE_RXN PIE_TXP PIE_TXN PIE_TXP PIE_TXN PIE_TXP PIE_TXN PIE_TXP PIE_TXN PIE_TXP PIE_TXN PIE_TXP PIE_TXN PIE_TXP PIE_TXN PIE_TXP PIE_TXN PIE_TXP PIE_TXN PIE_TXP PIE_TXN PI EXPRESS INTERFE Y Y Y Y W W V U U U T T T T _PEG_RXP _PEG_RXN _PEG_RXP _PEG_RXN _PEG_RXP _PEG_RXN _PEG_RXP _PEG_RXN _PEG_RXP _PEG_RXN _PEG_RXP _PEG_RXN _PEG_RXP _PEG_RXN _PEG_RXP _PEG_RXN _PEG_RXP _PEG_RXN _PEG_RXP _PEG_RXN.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_ PEG_RXP () PEG_RXN () PEG_RXP () PEG_RXN () PEG_RXP () PEG_RXN () PEG_RXP () PEG_RXN () PEG_RXP () PEG_RXN () PEG_RXP () PEG_RXN () PEG_RXP () PEG_RXN () PEG_RXP () PEG_RXN () PEG_RXP () PEG_RXN () PEG_RXP () PEG_RXN ().V_PE_V.V_PE_V R.V_PE_PV.V_PF_PV /F_ PEF_LR.V_PE_PV G F R _ M-S--N PRK-S--install F G F G F G M M M F G F PF_V# PF_V# PF_V# PF_V# PF_VSSR# PF_VSSR# PF_VSSR# PF_VSSR# PF_VSSR# PEF_LR PE_PV PE_PVSS N_PF_PV N_PF_PVSS PRK N_P_V# N_P_V# P_V# P_V# P_VSSR# P_VSSR# P_VSSR# P_VSSR# P_VSSR# P_LR P PLL POWER P_PV P_PVSS P_PV P_PVSS E.V_P_V F LMPGSN(,.)_.V_P_V L.V_GPU F.V(S,m) F.U/V_ U/.V_S U/V_ F G H M M E P_LR R /F_ G.V_P_PV.V_P_PV G G.V_P_PV.V_P_PV G () () () () () () PEG_TXP PEG_TXN PEG_TXP PEG_TXN PEG_TXP PEG_TXN PEG_TXP PEG_TXN PEG_TXP PEG_TXN PEG_TXP PEG_TXN N M M L L K PIE_RXP PIE_RXN PIE_RXP PIE_RXN PIE_RXP PIE_RXN PIE_TXP PIE_TXN PIE_TXP PIE_TXN PIE_TXP PIE_TXN P P P P M N _PEG_RXP _PEG_RXN _PEG_RXP _PEG_RXN _PEG_RXP _PEG_RXN.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_ PEG_RXP () PEG_RXN () PEG_RXP () PEG_RXN () PEG_RXP () PEG_RXN ().V_PE_V.V_PE_V.U/V_ U/V_ (Park-S:m@.V) (MX-S/S:m@.V) L.V_GPU LMPGSN(,.)_ U/.V_S.V_P_V.V_P_V U/V_.U/V_.V(m) L.V_GPU LMPGSN(,.)_ U/.V_S M-S--N PRK-S--install () () LK_PIE_VGP LK_PIE_VGN M-S--N PRK-S--install K/F_ R K K N LOK PIE_REFLKP PIE_REFLKN N_PWRGOO LIRTION PIE_LRP PIE_LRN Y M_PIE_LRP M_PIE_LRN R R.K/F_ K/F_.V_GPU.U/V_.V_PE_V U/V_.V -(m) L.V_GPU LMPGSN(,.)_ U/.V_S.V_P_PV.V_P_PV.U/V_ U/V_.V(m) L.V_GPU LMPGSN(,.)_ U/.V_S (,,,,) PLTRST# MHz (/-ppm) input frequency, -.V single-ended swing L PERST PRK.V_PF_PV.V_PF_PV.U/V_ U/V_.V(m) L.V_GPU LMPGSN(,.)_ U/.V_S.V_PE_PV.V_PE_PV.U/V_ U/V_.V(m) L.V_GPU LMPGSN(,.)_ U/.V_S VG ore VG ore PP V M-S--N PRK-S--install.V.V.V V_VG PIE_VR PIE_PV VR VR ms ms Quanta omputer Inc. PROJET : M/R Size ocument Number Rev Robson_PIE_Interface ate: Tuesday, January, Sheet of

17 MEM_I[:] R R R R Table : V_OPT VI GFX_ORE_NTRL Vendor Samsung Hynix Samsung Hynix Type M*-MHZ M* -MHZ x MHz x MHz GFX_ORE_NTRL V_GFX_ORE.V.V.V.V Vendor P/N KWG-H HTQGFR- KWGE-H HTQGFR-.V_GPU.V_GPU M-S--N PRK-S--install.V_GPU Project KL/KL KL/KL KL only KL only L VR R R R R Memory I T T T T T T T T T T T T *K/F_ MEM_I *K/F_ MEM_I *K/F_ MEM_I *K/F_ MEM_I LMPGSN(,.)_.V(m P_PV).V_P_PV L U/.V_S U/V_.U/V_ LMPGSN(,.)_.V_P_V.V(m P_V) U/.V_S U/V_.U/V_ LMPGSN(,.)_.V(m P_V).V_P_V L U/.V_S U/V_.U/V_ U M-S/M-S TXP_PP E VNTL_/ VPT_ TXM_PN L VNTL_ / N N VNTL_ / N TXP_PP E VT_ / VPT_ P TXM_PN VT_ / VPT_ VT_ / VPT_ TXP_PP VT_ / VPT_ TXM_PN VT_ / VPT_ VT_ / VPNTL_ TXP_PP VT_ / VPT_ TXM_PN VT_ / VPT_ VT_ VPT_ TXP_PP TXM_PN VO VT_ / VPT_ TXP_PP VT_ / VPT_ TXM_PN Y VT_ / VPT_ P Y VT_ / VPT_ TXP_PP TXM_PN TXP_PP TXM_PN M-S/M-S W P_PV / VPT_ V GN# M-S/M-S VPT_/TXP_PP VPNTL_/TXM_PN P_V#/VPT P_V#/VPT VPT_ / TXP_PP VPT_ / TXM_PN VPNTL_MV / TXP_PP P_V#/VPT VPT_ / TXM_PN P_V#/VPT VPT_ / TXP_PP VPNTL_ / TXM_PN U P_VSSR# / VPLK VR / P_LR W P_VSSR# / VPT U GN# Y GN# P_VSSR#/ VPNTL_MV P F F G G H H K K K M K M J H K L V U W V Y W Y R TXP_PP () TXM_PN () TXP_PP () TXM_PN () TXP_PP () TXM_PN () TXP_PP () TXM_PN () */F_@N For M-S: Use Ohms Pull own For M-S: Use R to VR For Park-S: N HMI.V_V_Q.V_V_Q V.V_V_Q.U/V_.V_V_Q.U/V_.V(m VI) V.U/V_ U/V_ U/V_ U/V_.V(m) L LMPGSN(,.)_ U/.V_S.V(m) L LMPGSN(,.)_ U/.V_S L.V_GPU.V_GPU PRK-- Install M-- N LMPGSN(,.)_ U/.V_S.V_GPU V_V.U/V_ U/V_.V(m) L V LMPGSN(,.)_ U/.V_S.V_ELY R R R R.V_ELY.V_ELY Reserved () LK_M_VG Y L=PF MHZ R R K/F_ K/F_ P/V_ P/V_ *K/F_ *K/F_ GPIO_TK K/F_ TEMP_FIL K/F_ GPIO_TRST GPIO_TI GPIO_TMS GPIO_TO GPIO GPIO(ROMS#) P without external VIOS ROM R R R *K/F_ GPIO_LON *K/F_ GPIO LKREQb EVG-XTLI R M_ R EVG-XTLO K/F_ M MV dded M Suggestion.V_GPU *K/F_.V_GPU.V@m.V@m For Int lk Mhz : M modify.v_ely L.V_GPU TESTEN R K/F_ LMPGSN(,.)_ LMPGSN(,.)_ L R *K/F_.V(m PLL_V) U/.V_S L TESTEN () LVS.V(mPLL_PV) U/V_ U/.V_S LMPGSN(,.)_ () ROSON_LVS_LK () ROSON_LVS_T () GPIO () GPIO () GPIO () PNEL_KEN () GPIO () GPIO T () GPIO () GPIO () GPIO TEMP_FIL () GFX_ORE_NTRL T () GPIO.U/V_ U/V_ U/.V_S U/V_.V(m TSV) T T T () GFX_ORE_NTRL T ROSON_LVS_LK ROSON_LVS_T GPIO GPIO GPIO GPIO U U T U GPIO U GPIO T T GPIO_LON GPIO T P GPIO P GPIO P GPIO N GPIO GPIO N N Y GFX_ORE_NTRL N GPIO VG_LERT M R W TEMP_FIL M GFX_ORE_NTRL P _EN P GPIO N GPIO LKREQb N GPIO_TRST T L GPIO_TI T L GPIO_TK T L GPIO_TMS T L GPIO_TO T K TESTEN R *SHORT_ TESTEN_R F R add for Robson co-layout PRK, M---->Install Robson >Uninstall W GENERI () GENERI W W OHM () P_HP.V_GPU.VR(R)=.V/=.V R /F_.U/V_.U/V_ *K/F_ R R /F_.U/V_ TMS_HP.V_PLL_PV.V_PLL_V.V_M_VREFG EVG-XTLI EVG-XTLO R _ R _ PRK-- Install M-- N M_THERM# SYS_SHN# (,,) Q N.V_ELY R RThermal Sensor.K_.K_ -_V R /F_.V_ELY U.U/V_ SMLK V VGTHRM SMT XP K/F_VG_LERT -LT XN P/V_ w/s / GN -OVT VGTHRM- LMIMM I RESS: H M_THERM# R K/F_.V_ELY.V_ELY VGTHRM VGTHRM-.V_TSV R R F E M K T T R SL S I GENERL PURPOSE I/O GPIO_ GPIO_ GPIO_ GPIO SMT GPIO SMLK GPIO TT GPIO_ GPIO LON GPIO ROMSO GPIO ROMSI GPIO ROMSK GPIO_ GPIO_ GPIO_ GPIO HP GPIO PWRNTL_ GPIO SSIN GPIO THERML_INT GPIO HP GPIO TF GPIO PWRNTL_ GPIO EN GPIO ROMS GPIO LKREQ JTG_TRST JTG_TI JTG_TK JTG_TMS JTG_TO TESTEN GENERI GENERI GENERI GENERI GENERIE_HP HP VREFG PLL/LOK PLL_PV PLL_PVSS PLL_V XTLIN XTLOUT N# N# PLUS THERML MINUS TS_FO TSV TSVSS R R G G HSYN VSYN RSET V VSSQ VI VSSI M-S/M-S R / N R / N G / N G / N / N / N / N Y / N OMP / N HSYN VSYN VI / N VSSI / N V / N VQ / N VSSQ RSET / N /UX LK T UXP UXN LK T UXP UXN LK_UXP T_UXN LK T LK_UXP T_UXN M K L J H G H J G E E M K L J K L H M J V L _VSY_R J _HSY_R E E E G E E E R R /F_ R _ R _ R _ R _ R _.V_V_Q /F_ V R _ R _ R R R.V_V_Q E- _VSY () _HSY ().V_V_Q PRK-- Install M-- N P_LK () P_T () *K/F_ *K/F_ /F_ /F_ /F_ R R V ROSON_RT_LK () ROSON_RT_T () (,,) M_LK (,,) M_T.V_ELY RT ROSON_RT_RE () ROSON_RT_GRN () ROSON_RT_LU () ROSON_RT_HSYN (,) ROSON_RT_VSYN (,) R R R R R R R *.U/V_ Robson SM SM SM SM SM SM SM V_V E-- Seymour No SM No SM No SM No SM No SM No SM No SM Q N.V_ELY.V_ELY Q N R RT L.V_ELY V LMPGSN(,.)_.U/V/XR_ U/V_ U/.V_S (,,,,,,,,) MINON R *Short_@N GFX_RUN_ON ().V_ELY PRK ROSON_LVS_LK ROSON_LVS_T R R.K_.K_ Quanta omputer Inc. PROJET : M/R Size ocument Number Rev Robson_MIN ate: Tuesday, January, Sheet of

18 E F G H K K L M N N P P R T T U U V W W W Y Y M N N N N N N P P R R R R T T T T T U U U U V V V Y Y Y Y UE PIE_VSS# PIE_VSS# PIE_VSS# PIE_VSS# PIE_VSS# PIE_VSS# PIE_VSS# PIE_VSS# PIE_VSS# PIE_VSS# PIE_VSS# PIE_VSS# PIE_VSS# PIE_VSS# PIE_VSS# PIE_VSS# PIE_VSS# PIE_VSS# PIE_VSS# PIE_VSS# PIE_VSS# PIE_VSS# PIE_VSS# PIE_VSS# PIE_VSS# PIE_VSS# PIE_VSS# PIE_VSS# PIE_VSS# PIE_VSS# PIE_VSS# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# PRK GN GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GPIO_ GPIO_ VSS_MEH# VSS_MEH# VSS_MEH# E G H H E F F F F F F F F F F F F G G G G H H H H H J J K K K K T R M M UF LVS ONTROL VRY_L IGON TXLK_UP_PFP TXLK_UN_PFN TXOUT_UP_PFP TXOUT_UN_PFN TXOUT_UP_PFP TXOUT_UN_PFN TXOUT_UP_PFP TXOUT_UN_PFN TXOUT_UP TXOUT_UN LVTMP TXLK_LP_PEP TXLK_LN_PEN TXOUT_LP_PEP TXOUT_LN_PEN TXOUT_LP_PEP TXOUT_LN_PEN TXOUT_LP_PEP TXOUT_LN_PEN TXOUT_LP TXOUT_LN PRK () GPIO () GPIO () GPIO () GPIO (,) ROSON_RT_HSYN (,) ROSON_RT_VSYN () GENERI () _VSY () _HSY () GPIO H J L K H J L K K J L K H J L K H J L K GPIO GPIO GPIO GPIO R R GPIO K/F_ K/F_ M_I_PWM () M_ENV () Signal Link ROSON_LVS_LK () ROSON_LVS_LK- () ROSON_LVS_ () ROSON_LVS_- () ROSON_LVS_ () ROSON_LVS_- () ROSON_LVS_ () ROSON_LVS_- () R R R R R R R R R R *K/F_ *K/F_ *K/F_ *K/F_ K/F_ K/F_ *K/F_ *K/F_ *K/F_ *K/F_.V_ELY LLOW FOR PULLUP PS FOR THESE STRPS N IF THESE GPIOS RE USE, THEY MUST NOT ONFLIT URING RESET TX_PWRS_EN TX_EEMPH_EN IF_GEN_EN_ RSV IF_VG_IS RSV VIP_EVIE_STRP_EN RSV U[] U[] STRPS IOS_ROM_EN ROMIFG(:) HSYN ONFIGURTION STRPS PIN GPIO GPIO GPIO GPIO GPIO GPIO GPIO ROMS GPIO[:] VSYN GENERI HSYN VSYN GENERI ESRIPTION OF EFULT SETTINGS Transmitter Power Savings Enable : % Tx output swing for mobile mode : full Tx output swing (efault setting for esktop) PI Express Transmitter e-emphasis Enable : Tx de-emphasis disabled for mobile mode : Tx de-emphasis enabled (efault setting for esktop) Enable LKREQ# Power Management - LKREQ# power management capability is disabled - LKREQ# power management capability is enabled VG ENLE ENLE EXTERNL IOS ROM SERIL ROM TYPE OR MEMORY PERTURE SIZE SELET IGNORE VIP EVIE STRPS U[] U[] No audio function udio for isplayport and HMI if dongle is detected udio for isplayport only udio for both isplayport and HMI M RESERVE ONFIGURTION STRPS LLOW FOR PULLUP PS FOR THESE STRPS N IF THESE GPIOS RE USE, THEY MUST NOT ONFLIT URING RESET PULLUP PS RE NOT REQUIRE FOR THESE STRPS UT IF THESE GPIOS RE USE, THEY MUST NOT ONFLIT URING RESET REOMMENE SETTINGS = O NOT INSTLL RESISTOR = INSTLL K RESISTOR X = ESIGN EPENNT N = NOT PPLILE Memory perture size GPIO EN () () () () GPIO GPIO GPIO GPIO GPIO GPIO GPIO GPIO R R R R.V_ELY *K/F_ *K/F_ *K/F_ K/F_ GPIO IOSROM M M M M M G G G GPIO GPIO GPIO ROMIFG ROMIFG ROMIFG It is a shared pin strap with ONFIG[:] if IOS_ROM_EN is set to. Quanta omputer Inc. PROJET : M/R Size ocument Number Rev Robson_GN / LVS /Straps ate: Friday, November, Sheet of

19 .V_GPU V_T -- Level translation between core and I/O, excluding memory receivers.. V ± %.V_GPU U/V_.V_GPU Reserve for PRK L U/V_ U/.V_S U/.V_S L U/V_.V(m V_T).V(m MPV) U/V_ LMPGSN(,.)_ U/V_.V_GPU MPV.V ( R, MVQ =.V@.) U/V_ U/V_ U/.V_S U/.V_S U/.V_S.U/V_ LMPGSN(,.)_ L.V_ELY.V_GPU.V_V_T VR LMPGSN(,.)_.V(m VR).V(m PIE_PV).V_V_T.V~.V(m SPV) L LMPGSN(,.)_.V_GPU MV U/V_.U/V_ U/V_ U/.V_S L U/V_.U/V_ U/V_ U/V_ VGPU_ORE./.V m U/V_ U/V_ LMPGSN(,.)_.U/V_.U/V_ U/V_ U/.V_S U/V_ U/V_ U/V_ U/V_.U/V_ U/.V_S U/.V_S U/V_ U/V_ U/V_ U/V_.U/V_ U/.V_S TP.U/V_ R _ PIE_PV VG_ORE_SPV.U/V_ U/V_.U/V_ TP MPV SPV U/V_ H H H J J J J K K K K L L L L L L V Y U Y V U L L M L H H J M M U MEM I/O VR# VR# VR# VR# VR# VR# VR# VR# VR# VR# VR# VR# VR# VR# VR# VR# VR# LEVEL TRNSLTION V_T# V_T# V_T# V_T# M-S/M-S VR# VR# VR# VR# I/O VR# / VR VR# VR# / VR N# / VR VLK / VR N# / VR N# / VR MEM LK VRH VSSRH PLL PIE_PV N_MPV N_SPV SPV SPVSS K IS P# P# PRK.V_PIE_V POWER PIE PIE_VR# PIE_VR# PIE_VR# PIE_VR# E PIE_VR# E PIE_VR# E PIE_VR# F PIE_VR# G PIE_V# L PIE_V# L PIE_V# L PIE_V# L PIE_V# M PIE_V# N PIE_V# N PIE_V# N PIE_V# R PIE_V# T PIE_V# U PIE_V# V ORE V# V# N V# N V# R V# R V# R V# R V# T V# T V# T V# T V# U V# U V# U V# U V# V V# V V# V V# V V# Y V# Y V# Y V# Y ISOLTE ORE I/O VI# M VI# M VI# M VI# M VI# M VI# M VI# M VI# N.V_PIE_VR PIE_VR--PI-E I/O power.. V ± %.V_PIE_VR.U/V_.V_PIE_V U/V_ U/V_.V_PIE_VR VVI.~.V( peak )( Ripple <.mv) U/V_ U/V_ U/V_ U/V_.U/V_ U/V_ U/V_.V~.V( VI) U/V_ U/V_ U/V_ U/V_ U/V_ U/V_ U/V_ U/V_ VI--Isolated (clean) core power for the l/o logic. Voltage level should match that of V. POWER Same as V.V(m).V_PIE_V.V(.) U/V_ U/V_ U/V_ U/V_ U/V_ U/V_ VGPU_ORE U/V_ U/V_ U/V_ VI U/V_ U/V_ U/V_ U/V_ LMPGSN(,.)_ L LMPGSN(,M,)_ U/V_ V--edicated core power, provides power to the internal logic.. V -. V (± %).V_GPU.V_GPU M MV,for meet transient SPE add, and del U/V_ LMSGTN(,M,)_ L VGPU_ORE U/V_ U/V_ L U/.V_S U/V_ U/V_ U/.V_ U/.V_S U/.V_S U/.V_ U/.V_S U/.V_S U/.V_S U/.V_S U/.V_S U/.V_S U/.V_S.V_GPU L U/V_.V(m SPV).U/V_ LMPGSN(,.)_ SPV U/V_.U/V_ U/V_ PIE_V--PI-E igital Power Supply (Either. V or. V). V -% to. V % U/V_.U/V_ VGPU_ORE (,,) Quanta omputer Inc. PROJET : M/R Size ocument Number Rev Robson_Power_and_N ate: Tuesday, January, Sheet of

20 () () () () () () () () VM_S# VM_S# VM_LK VM_LK# VM_LK VM_LK# () VM_WQS[..] () VM_RQS[..] () VM_M[..] () VM_Q[..] () VM_M[..] () () () VM_OT VM_OT () VM_RS# () VM_RS# () VM_S# () VM_S# () () () () Rd VM_WE# VM_WE# VM_KE VM_KE VM_ VM_ VM_ MVREF TO.V (Rd) MVREF TO GN (Re).V_GPU VM_OT VM_OT VM_RS# VM_RS# VM_S# VM_S# VM_WE# VM_WE# VM_S# VM_S# VM_KE VM_KE VM_LK VM_LK# VM_LK VM_LK# VM_WQS[..] VM_RQS[..] VM_M[..] VM_Q[..] VM_M[..] VM_ VM_ VM_ support Gbit VRM ( M X ) IVIER RESISTORS ROSON R./F_ PLE MVREF IVIERS N PS LOSE TO SI MVREFS VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q MVREF K J.V_GPU.V_GPU Note R _ J R Re Note () TESTEN K /F_ R.K Rd.U/V_ R R /F_ Note J./F_ R _Note K.U/V_ Re.R R R /F_.U/V_ R./F_ RM_RST L LKTEST LKTEST.U/V_ R./F_ K J H H G F F F F E G F E E F F E F F E F F E F F E F E E G G G G J J J J K L U Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q_ PRK route ohms single-ended/ohms diff and keep short For PRK-S only MVREF MVREFS MEM_LRN N/TESTEN# MEMORY INTERFE MEM_LRP/P_LR N_MEM_LRP RM_RST LKTEST LKTEST M_ M_ M_ M_ M_ M_ M_ M_ M_ M_ M_ M_ M_ M_/ M_/ M_/ QM_ QM_ QM_ QM_ QM_ QM_ QM_ QM_ RQS_ RQS_ RQS_ RQS_ RQS_ RQS_ RQS_ RQS_ WQS_ WQS_ WQS_ WQS_ WQS_ WQS_ WQS_ WQS_ OT OT LK LK LK LK RS RS S S S_ S_ S_ S_ KE KE WE WE PX_EN RSV# RSV# RM_RST Ra K J H G G H J K J K J J H G J L E E E E F H E E G H E H L K H H G H G G G G H J G K K J G H G G R *K/F_ VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_ VM_ VM_ VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_RQS VM_RQS VM_RQS VM_RQS VM_RQS VM_RQS VM_RQS VM_RQS VM_WQS VM_WQS VM_WQS VM_WQS VM_WQS VM_WQS VM_WQS VM_WQS VM_OT VM_OT VM_LK VM_LK# VM_LK VM_LK# VM_RS# VM_RS# VM_S# VM_S# VM_S# VM_S# VM_KE VM_KE VM_WE# VM_WE# Rb R _ VM_M.V_GPU Rc R.K_ P/V_ a For PRK-S only For MX-S/S with R: this pin is not in use. MEM_RST () Ra Rb Rc Rd Place all these components very close to GPU (Within mm) and keep all component close to each Other (within mm) except Rser This basic topology should be used for RM_RST for R/GR.These apacitors and Resistor values are an example only. The Series R and ap values will depend on the RM load and will have to be calculated for different Memory,RM Load and board to pass Reset Signal Spec. Note :o not Install for MX-S/S, Install Ohms.% Resistor for PRK-S. Note :For MX-S/S,J Pin onnect to VSS through Ohms(.%) resistor. For Park-S,J Pin onnect to VSS through Ohms(%) resistor for P_LR Note :For MX-/, K Pin (N_MEM_LRP) is Not connected. For PRK-S, K Pin (TESTEN#) connect to TEST_EN Signal t F R for Robson only Quanta omputer Inc. PROJET : M/R Size ocument Number Rev Robson_MEM_Interface ate: Tuesday, January, Sheet of

21 VM_M VREF_VM VREF_VM VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VREF_VM VREF_VM VREF_VM VREF_VM VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_LK_OMM VM_LK VM_LK# VREF_VM VREF_VM VREF_VM VREF_VM VM_LK_OMM VM_LK VM_LK# MEM_RST VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VREF_VM VREF_VM VM_M VM_M VM_ VM_ VM_ VM_M VM_RQS VM_RQS VM_WQS VM_WQS VM_OT VM_LK VM_LK# VREF_VM VREF_VM VM_KE VM_WE# VM_S# VM_S# VM_RS# VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_ VM_ VM_ MEM_RST VM_RQS VM_RQS VM_WQS VM_WQS VM_M VM_ZQ VM_ZQ VM_ZQ VM_M[..] VM_ZQ VM_WQS VM_ VM_ VM_ VM_KE VM_WE# VM_OT VM_LK VM_LK# VM_S# MEM_RST VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VREF_VM VREF_VM VM_M VM_M VM_S# VM_RS# VM_RQS VM_RQS VM_WQS VM_M VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_M VM_M VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_WQS VM_RQS VM_RQS VM_WQS VM_WE# () VM_OT () VM_S# () VM_LK# () VM_LK () VM_KE () VM_ () VM_ () VM_ () VM_S# () VM_RS# () MEM_RST () VM_WE# () VM_LK# () VM_LK () VM_OT () VM_S# () VM_KE () VM_RS# () VM_S# () VM_Q[..] () VM_M[..] () VM_WQS[..] () VM_RQS[..] () VM_M[..] ().V_GPU.V_GPU.V_GPU.V_GPU.V_GPU.V_GPU.V_GPU.V_GPU.V_GPU.V_GPU.V_GPU.V_GPU.V_GPU.V_GPU.V_GPU.V_GPU.V_GPU.V_GPU.V_GPU.V_GPU.V_GPU.V_GPU Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET : Robson/VRM_, Friday, November, M/R Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET : Robson/VRM_, Friday, November, M/R Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET : Robson/VRM_, Friday, November, M/R G R Gb R(M xbit) x pcs E-- E-- E-- E-- R R.U/V_.U/V_ R.K/F_ R.K/F_ U/.V_S U/.V_S R R U/.V_ U/.V_ U/.V_ U/.V_.U/V_.U/V_ U/.V_S U/.V_S -LL SRM R U VRM _R -LL SRM R U VRM _R WE L RS J S K S L KE K K J K K QSU M N P N P P R R T R /P L R QL E QL F QL F QL F QL H QL H QL G QL H VSSQ# VSS# VSS#E E VSS# N#J J V# V# VQ# VQ# VQ# VQ# N#L L N#J J VQ#E E ZQ L RESET T QSL F MU ML E VSSQ# VSSQ# VSSQ# VSSQ#E E QSU VSSQ#E E QSL G VQ#F F VSSQ#F F VSSQ#G G VQ#H H VQ#H H VSSQ#G G VREF M VSS#G G V#G G OT K N P V#K K / N VSS#J J V#K K QU QU QU QU QU QU QU QU T T M M VREFQ H N#L L V#N N V#N N V#R R V#R R VSS#J J VSS#M M VSS#M M VSS#P P VSS#P P VSS#T T VSS#T T VQ# U/.V_ U/.V_ R.K/F_ R.K/F_ -LL SRM R U VRM _R -LL SRM R U VRM _R WE L RS J S K S L KE K K J K K QSU M N P N P P R R T R /P L R QL E QL F QL F QL F QL H QL H QL G QL H VSSQ# VSS# VSS#E E VSS# N#J J V# V# VQ# VQ# VQ# VQ# N#L L N#J J VQ#E E ZQ L RESET T QSL F MU ML E VSSQ# VSSQ# VSSQ# VSSQ#E E QSU VSSQ#E E QSL G VQ#F F VSSQ#F F VSSQ#G G VQ#H H VQ#H H VSSQ#G G VREF M VSS#G G V#G G OT K N P V#K K / N VSS#J J V#K K QU QU QU QU QU QU QU QU T T M M VREFQ H N#L L V#N N V#N N V#R R V#R R VSS#J J VSS#M M VSS#M M VSS#P P VSS#P P VSS#T T VSS#T T VQ# U/.V_ U/.V_.U/V_.U/V_ U/.V_ U/.V_ U/.V_ U/.V_ R.K/F_ R.K/F_.U/V_.U/V_ U/.V_S U/.V_S R.K/F_ R.K/F_ U/.V_ U/.V_ R.K/F_ R.K/F_ -LL SRM R U VRM _R -LL SRM R U VRM _R WE L RS J S K S L KE K K J K K QSU M N P N P P R R T R /P L R QL E QL F QL F QL F QL H QL H QL G QL H VSSQ# VSS# VSS#E E VSS# N#J J V# V# VQ# VQ# VQ# VQ# N#L L N#J J VQ#E E ZQ L RESET T QSL F MU ML E VSSQ# VSSQ# VSSQ# VSSQ#E E QSU VSSQ#E E QSL G VQ#F F VSSQ#F F VSSQ#G G VQ#H H VQ#H H VSSQ#G G VREF M VSS#G G V#G G OT K N P V#K K / N VSS#J J V#K K QU QU QU QU QU QU QU QU T T M M VREFQ H N#L L V#N N V#N N V#R R V#R R VSS#J J VSS#M M VSS#M M VSS#P P VSS#P P VSS#T T VSS#T T VQ# -LL SRM R U VRM _R -LL SRM R U VRM _R WE L RS J S K S L KE K K J K K QSU M N P N P P R R T R /P L R QL E QL F QL F QL F QL H QL H QL G QL H VSSQ# VSS# VSS#E E VSS# N#J J V# V# VQ# VQ# VQ# VQ# N#L L N#J J VQ#E E ZQ L RESET T QSL F MU ML E VSSQ# VSSQ# VSSQ# VSSQ#E E QSU VSSQ#E E QSL G VQ#F F VSSQ#F F VSSQ#G G VQ#H H VQ#H H VSSQ#G G VREF M VSS#G G V#G G OT K N P V#K K / N VSS#J J V#K K QU QU QU QU QU QU QU QU T T M M VREFQ H N#L L V#N N V#N N V#R R V#R R VSS#J J VSS#M M VSS#M M VSS#P P VSS#P P VSS#T T VSS#T T VQ# U/.V_S U/.V_S.U/V_.U/V_ U/.V_ U/.V_ R./F_ R./F_ U/.V_ U/.V_ U/.V_S U/.V_S U/.V_ U/.V_ U/.V_ U/.V_ R.K/F_ R.K/F_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_S U/.V_S R.K/F_ R.K/F_ U/.V_ U/.V_ R.K/F_ R.K/F_ U/.V_ U/.V_.U/V_.U/V_ R.K/F_ R.K/F_ U/.V_ U/.V_ U/.V_ U/.V_ R R R.K/F_ R.K/F_ R.K/F_ R.K/F_ U/.V_ U/.V_ R.K/F_ R.K/F_ U/.V_ U/.V_ R./F_ R./F_.U/V_.U/V_.U/V_.U/V_ U/.V_ U/.V_ U/.V_S U/.V_S U/.V_ U/.V_ U/.V_S U/.V_S U/.V_ U/.V_ R R R.K/F_ R.K/F_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_S U/.V_S U/.V_S U/.V_S U/.V_S U/.V_S U/.V_ U/.V_ R./F_ R./F_ U/.V_ U/.V_.U/V_.U/V_ R.K/F_ R.K/F_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ R./F_ R./F_ R.K/F_ R.K/F_.U/V_.U/V_ U/.V_S U/.V_S R.K/F_ R.K/F_ U/.V_ U/.V_

22 IS HMI Place close to HMI connector () TXP_PP () TXM_PN () TXP_PP () TXM_PN () TXP_PP () TXM_PN () TXP_PP () TXM_PN () P_LK () P_T () P_HP R R R R R R R R R _ R _ R _ E--.U/V/XR_.U/V/XR_.U/V/XR_.U/V/XR_.U/V/XR_.U/V/XR_.U/V/XR_.U/V/XR_ /F_ /F_ /F_ /F_ /F_ /F_ /F_ /F_ HMI_LK HMI_LK- HMI_TX HMI_TX- HMI_TX HMI_TX- / need check HMI_SL_R HMI_S_R HMI_HP_R HMI_TX HMI_TX- HMI_TX HMI_TX- HMI_TX HMI_TX- HMI_LK HMI_LK- HMI_SL_R HMI_S_R V R.K_ R.K_ Q FVN V Q FVN V V R.K_ R.K_ FUSEV_POLY HMI LK HMI T F HMI_V near N HMI_TX HMI_TX HMI_TX- HMI_TX- HMI_TX HMI_TX- HMI_TX HMI_TX- HMI_LK HMI_LK- HP_ET E.U/V/XR_ E-- E *P/V/XR_ Modify FP E-QV- HMI_LF E *P/V/XR_ N SHELL Shield SHELL - Shield - Shield - K K Shield K- E Remote N LK T GN V SHELL HP ET SHELL ONN_HMI V Q NK-T-E HMI Hot-PLUG to E and GPU V UM Only Place close to HMI connector HMI_HP_R E-- R Q MMT *SHORT_ R K_ R HP_ET K/F_ R K/F_ NI () INT_HMI_TXP () INT_HMI_TXN () INT_HMI_TXP () INT_HMI_TXN *.U/V/XR_ *.U/V/XR_ *.U/V/XR_ *.U/V/XR_ HMI_TX HMI_TX- HMI_TX HMI_TX- opy from G () INT_HMI_TXP () INT_HMI_TXN () INT_HMI_TXP () INT_HMI_TXN *.U/V/XR_ *.U/V/XR_ *.U/V/XR_ *.U/V/XR_ HMI_TX HMI_TX- HMI_LK HMI_LK- () INT_HMI_SL () INT_HMI_S () INT_HMI_HP R R R *_ *_ *_ HMI_SL_R HMI_S_R HMI_HP_R HMI_TX HMI_TX- HMI_TX HMI_TX- HMI_TX HMI_TX- HMI_TX HMI_TX- HMI_TX HMI_TX- HMI_LK HMI_LK- HMI T HMI LK HMI_V HP_ET For ES U V GN *RlampM_G U V GN *RlampM_G U V GN *RlampM_G HMI_LK HMI_LK- HMI_TX HMI_TX- HMI T HMI LK HMI_V HP_ET Layout note:place close to HMI onn EMI reserve for HMI HMI_TX HMI_TX- HMI_TX HMI_TX- HMI_TX HMI_TX- HMI_LK HMI_LK- E-- R /F_ R /F_ R /F_ R /F_ (,,,,,,,,,,,,,) (,,,,,,,,,,,,,,,,,,,,,,,,,) V V PROJET : KL Quanta omputer Inc. Size ocument Number Rev ustom Madison_LVS/HMI/RT switchable ate: Tuesday, January, Sheet of

23 (,,,,,,,,,,,,,) (,,,,,,,,,,,,,,,,,,,,,,,,,) V V E RT_V RV- Layout Note: Setting R,G, trace impedance to ohm. F FUSEV_POLY V *VRISTOR_ RT_V_R.U/V/XR_ ROSON_RT_RE_R L KLL RT_R E-- ES PROTETION U RT_R IO IO T GN REF IO IO TVLST RT_G RT_ ROSON_RT_GRN_R ROSON_RT_LU_R R /F_ R /F_ R /F_.P/V/OG_.P/V/OG_ L L.P/V/OG_ KLL KLL.P/V/OG_.P/V/OG_.P/V/OG_ RT_G RT_ TP N RT_ONN RT_V_R RTHSYN U IO IO GN REF IO IO TVLST LK RTVSYN V ROSON_RT_VSYN_R VGVSYN_R RTVSYN RTVSYN Place near U,U < mil RTHSYN *P/V/OG_ P/V/OG_ RTHSYN IS () INT_RT_VSYN (,) ROSON_RT_VSYN () INT_RT_HSYN (,) ROSON_RT_HSYN () INT_LK () ROSON_RT_LK () INT_T () ROSON_RT_T () INT_RT_RE () ROSON_RT_RE () INT_RT_GRE () ROSON_RT_GRN R *_ R _ R *_ R _ R *_ R _ R *_ R _ R *_ R _ ROSON_RT_VSYN_R ROSON_RT_HSYN_R ROSON_RT_LK_R ROSON_RT_T_R ROSON_RT_RE_R ROSON_RT_GRN_R ROSON_RT_HSYN_R U HTGH VGHSYN_R V.K_ R RT_V Place near N connector < mil R *_ () INT_RT_LU R _ ROSON_RT_LU_R () ROSON_RT_LU R R.K_.K_ ROSON_RT_LK_R LK V R _ L H-T-JT U HTGH.U/V/XR_ *P/V/OG_ L H-T-JT P/V/OG_ R *_ R _.K_ R R _ Q NK-T-E ROSON_RT_T_R T Q NK-T-E *P/V/OG_ *P/V/OG_ PROJET : KL Quanta omputer Inc. Size ocument Number Rev RT ONN ate: Tuesday, January, Sheet of E

24 LV LV Layout note: Those resister place colse LVS connector *.U/V/XR_ is () M_ENV () INT_LVS_VEN UM R *_ R K_ V_S R K_ V V Q PTEU R K_ LV_ON Q N Q N E-- LV_R Q O R _.U/V/XR_ R *SHORT_ U/.V/XR_ UM () INT_TXLLKOUTN () INT_TXLLKOUTP () ROSON_LVS_LK () ROSON_LVS_LK- () INT_TXLOUTN () INT_TXLOUTP () ROSON_LVS_ () ROSON_LVS_- () INT_TXLOUTN () INT_TXLOUTP () ROSON_LVS_ () ROSON_LVS_- () INT_TXLOUTN () INT_TXLOUTP () ROSON_LVS_ () ROSON_LVS_- () INT_EIT () INT_EILK () ROSON_LVS_LK () ROSON_LVS_T R R R R *_ *_ R _ R _ R _ R _ R R R R R R *_ *_ *_ *_ R _ R _ *_ *_ R _ R _ *_ *_ R _ R _ ROSON_LVS_LK_R ROSON_LVS_LK-_R ROSON_LVS R ROSON_LVS_-_R ROSON_LVS R ROSON_LVS_-_R ROSON_LVS R ROSON_LVS_-_R ROSON_LVS_LK_R ROSON_LVS_T_R V LV () LVS_RIGHT_PWM GFX_PWR_SR E-- RF reserved E-- RF reserved *P/V_ ROSON_LVS_LK_R ROSON_LVS_T_R E-- ROSON_LVS_-_R ROSON_LVS R ROSON_LVS_-_R ROSON_LVS R ROSON_LVS_-_R ROSON_LVS R ROSON_LVS_LK-_R ROSON_LVS_LK_R R *_ ISPON *P/V_ VJ_PWM N G_ G_ G_ G_ G_ LV-SFYG RF reserved ack light VPU V R K_ R *.K_ (,) LI# LI# RV- RV- ISPON E--.U/V/XR_ R K_ *P/V/NPO_ () M_I_PWM E-- R *SHORT_ VJ_PWM GFX_PWR_SR E-- R *SHORT_ UM () INT_LVS_LON R *_ R.K_ is Only *P/V/NPO_@N.U/V/XR_.U/V/XR_ *U/.V/XR_ () PNEL_KEN is R K_ *U/V/XR_ Q PTEU L_K_OFF# () PROJET : KL Quanta omputer Inc. Size ocument Number Rev L ONN ate: Tuesday, January, Sheet of

25 LNV VPU (,,,,,,,,,,) V_S (,,,,,,,,,).V_PH (,,,,,,,,,,,,) VPU () SLP_LN# R *_ Q O E--.V_LN.V_LOM ore Power ecoupling.v_ln VIO Power ecoupling () LN_ON R * short.v_ln_r R *SHORT_.U/.V/XR_.U/V/XR_.U/V/XR_.U/V/XR_.U/V/XR_.U/V/XR_.U/V/XR_.U/V/XR_.U/V/XR_.U/.V/XR_.U/V/XR_.U/V/XR_.U/V/XR_ U/V/XR_.U/V/XR_ U () LN_ISLE# LN_ISLE# is active low. () PIE_LKREQ_LN# (,,,,) PLTRST# () PIE_RXP_LN () PIE_RXN_LN () PIE_TXP_LN () PIE_TXN_LN LN_XTLO_R SMUS address X () SM_T_ME () SM_LK_ME Y MHZ P/V/NPO_ () LK_PIE_LNP () LK_PIE_LNN R _ P/V/NPO_ R E-- R V_S V_S *SHORT_ LN_XTLO LN_XTLI Q N Q N *K_.V_LN.U/V/XR_.U/V/XR_ R *K_.V_LN R.K_ R R.V_LN R.K_ LN_PIETXP LN_PIETXN SM_LK_ME_R SM_T_ME_R TLE# LINKLE K_ K_ LN_XTLO LN_XTLI R K_ SM_T_ME_R SM_LK_ME_R LK_REQ_N PE_RST_N PE_LKP PE_LKN PETp PETn PERp PERn SM_LK SM_T LN_ISLE_N LE LE LE JTG_TI JTG_TO JTG_TMS JTG_TK XTL_OUT XTL_IN TEST_EN RIS R LM/L.K/F_ E-- Tramsformer TR TR- TR TR- TR TR- V.M_LN_OUT TRL_P E-QV- TR.U/V/XR_ LN_MT TT MT R /F_ JTG LE PIE SMUS MI MI_PLUS MI_MINUS MI_PLUS MI_MINUS MI_PLUS MI_MINUS MI_PLUS MI_MINUS RSV_VP_ RSV_VP_ VP_IN VP_OUT.U/V/XR_.U/V/XR_ VT VP_ VP_ VP_ VP_ VP_ VP_ VP_ VP_ VP_ VP_ VP_ VP_ TRL_P.U/V/XR_ VSS_EP R R U/V/XR_.K_.K_ L.uH/m_ TR TR TR.U/V/XR_.V_LN.V_LOM lose to TRL_P (PIN) Place near to Transformer.U/V/XR_ T T TT T TT T TT NS MX MX- T- U T- MX- MX- MX MT MX- MX MT - T- T- MX MT.V_LOM U/V/XR_ R LN_MX LN_MX LN_MT LN_MX LN_MT LN_MX LN_MT *_ *U/V/XR_ R R R.V_PH dded P,Total = uf - / Rev. - Intel /F_ /F_ /F_ LNT R M_.V_LN E--.V_LN E-- P/KV/NPO_ TR TR- TR EMI:close RJ *.U/V/XR_ R R *.U/V/XR_ /F_ /F_ LN_YLE TLE# LN_GLE LINKLE U IO GN IO M-SO RJ onnector *.U/V/XR_@N N U IO GN IO IO REF IO IO REF IO M-SO FRSZL EMI:close RJ PROJET :LL Quanta omputer Inc. Size ocument Number Rev ustom E LN(LM) ate: Tuesday, January, Sheet of TR TR- LN_MX- LN_MX- TR- TR- TR- TR- LN_MX- LN_MX- LN_MX LN_MX- LN_MX LN_MX LN_MX- LN_MX- LN_MX LN_MX- TR- TR- TR TR- TR *.U/V/XR_@N G G G G

26 () OE(O) V.U/V/XR_ V.U/V/XR_ VOLMUTE# VOLMUTE# EP lose to OE L FMHHM V_OE lose to OE E-- U/.V/XR_ U/.V/XR_.U/V/XR_ L FMHHM.U/V/XR_ U/.V/XR_ U/.V/XR_ INSPKL INSPKR- INSPKR EP GN E-- Z_V U/.V/XR_ R RV- *RV-.U/.V/XR_ *_.U/.V/XR_ VSS V PV SPK-L PVSS PVSS INSPKL- SPK-L- SPK-R- SPK-R PV EP SPIFO GN.U/V/XR_ P V R *K_ N GPIO/MI-T GN PVEE GPIO/MI-LK HP-OUT-R (LQFP-) P# HP-OUT-L ST-OUT MI-VREFO-L IT-LK MI-VREFO-R VSS Z_SIN MI-VREFO ST-IN Z_V LO-P V-IO VREF SYN VSS RESET# U//XR_ V_OE V PEEP PEEP HPOUT-R HPOUT-L MI-VREFO-L MI-VREFO-R MI-VREFO MI-R MI-L MI-R MI-L SENSE GN GN lose U to OE LINE-R LINE-L MI-R MI-L MONO-OUT JREF Sense- MI-R MI-L LINE-R LINE-L Sense IGITL R _ R _.U/.V/XR_.U/V/XR_ LQ-V-GR *p/v/npo_ R GN.U/V/XR_ MI_R.U/V/XR_ MI_L GN.U/V/XR_ MI_R.U/V/XR_ MI_L lose to OE R R NLOG K/F_ K/F_.K/F_ Z_SYN () Z_SIN () Z_ITLK () Z_SOUT () R R R R R MI_J# LINEOUT_J# Modify FP&PN RV *EG- *_/S *_/S *_/S *_/S *_/S *p/v/xr_ *p/v/xr_ Z_RST# () odec Power(O),,, close to I Earphone(MP) Z_V HPOUT-L HPOUT-R Z_V.U/V/XR_ RV *EG- RV *EG- LINEOUT_J# MI_J GN MI_J# /F_ HPOUT-L /F_ HPOUT-R MI_J# GN GN E-- System MI(MP) R *K_ R R R *K_ LINEOUT_J.U/V/XR_ L LINEOUT_J# MI_L MI_R MI_J V_OE V GN E-- GN NORML OPEN : mount R E-- NORML OPEN : mount R LMSN_. p/v/npo_ Normal lose : mount R,Q R *K_ Q *NE.U/V/XR_ Q *NE L R *K_ Vset=.V GN HPL HPR LINEOUT_J GN LINEOUT_J Normal lose : mount R,Q R _.U/V/XR_ *U/.V/XR_ LMSN_. E-- R R RV *EG- p/v/npo_ R _ RV *EG- L E-- MI-VREFO-R MI-VREFO-L K_ K_ E-- U Vout R.K_ YP GN Normal Open Jack MI_L MI_R *SHORT_ Vin EN *G-TUF mil N onnector-udio Jack R.K_ L L P/V/XR_.U/V/XR_ MINON (,,,,,,,,) GN H Power(O) V LMSN_. LMSN_. MI_L MI_R MI_J *Intel H Either.V_S or V_S P/V/XR_ U/V/XR_ L E-- *SHORT_ U/.V/XR_.U/V/XR_ U//XR_ N onnector-udio Jack Normal Open Jack Z_V.U/V/XR_ GN GN INTERNL MI Speaker(MP) E-QV- INSPKR INSPKR- INSPKL R R R KHS-T(M,) KHS-T(M,) KHS-T(M,) INSPKL- R KHS-T(M,) INSPKRN INSPKR-N INSPKLN INSPKL-N N R-L-SPEKERS P/V/NPO_ P/V/NPO_ P/V/NPO_ P/V/NPO_ MI-VREFO E-- MI_L MI_R R R K_ K_ R.K_ MI_L_R E-- E-- N MI_ON P EEP V.U/V/XR_ P/V/XR_.U/V/XR_ () SPKR () PEEP_ R K/F_ R K/F_ R U NSZ K_ R.U/V/XR_ PEEP P/V/XR_ K/F_ PROJET KL Quanta omputer Inc. Size ocument Number Rev ustom L/MI/Line out ate: Tuesday, January, Sheet of

27 () LK_M_R.K/F_ RREF XO XI MS_# S_# SP SP V *K_ V_ E-- E-- USP- USP R *SHORT_ XI XO Y *MHZ ppm R *K_ *.P/V_ () USP- () USP V R *SHORT_ *.P/V_ R U M P N N N N N GN N N *U/.V/XR_ U/.V/XR_ RREF V N RTS-GR SP SP SP SP SP SP SP SP SP LK_MOE[] E-- lock Mode strap MHz MHz MHz MHz (rystal) Note: S/MM R MS SP S_ X_RY SP S_ X_RE# SP S_ X_E# SP S_ X_WE# SP MS_S X_LE SP X_LE SP MS_ X_WP# SP X_ SP MS_ X_ SP MS_ X_ SP X_ SP MS_ X_ SP X_ SP MS_LK X_ SP S_WP X_ For RTS S,MS bit only R X V_IN ard_v GN S_ S R S_ X_# Modify P/N, F/P V_ GN SP SP SP SP S_ S_ RST# S_LK XTLO S_M S_ XTLI/LK_IN LK_MOE[] R GPIO MS_INS# S_# *K_ SP SP SP SP SP SP SP SP SP SP SP R U/.V/XR_ V_X.U/V/XR_ R * short.u/v/xr_ X_# V_ SP SP SP SP *.U/.V/XR_.U/V/XR_ S R S_ S R R * short S_ S_LK_R R * short S_LK S_M_R R * short S_M S R R * short S_ R * short V_X.U/V/XR_ E-- U/.V/XR_ E-- *P/V/G_ E-- S_# S_WP S_ S_ S_ S_ MS_S S_LK MS_ MS_ MS_ MS_# S_ MS_ S_M N IN R ONN X,MM/S,MS/MSP S- S-WP S--T S--T MM-T MS-VSS S-VSS MM-T MS-S S-LK MS-T MS-T S-V MS-T S-VSS MS-INS MM-T MS-T S-M ME-VSS- ME-VSS- ME- ME- MS-LK MM-T MS-VSS S-T MS-VSS S-T X- X-R/ X-RE X-E X-LE X-LE X-WE X-WP X-VSS X-T X-T X-T X-T X-T X-T X-T X-T X-V X-VSS MS_LK S_ S_ S_ X_# X_RY X_RE# X_E# X_LE X_LE X_WE# X_WP# X_ X_ X_ X_ X_ X_ X_ X_ E-- V_X.U/V/XR_ V_X.U/V/XR_ --p PROJET KL Quanta omputer Inc. Size ocument Number Rev ustom ard Reader (RTS) ate: Friday, November, Sheet of

28 ST H onnector. N ST_H_ON Modify PN&FP(LL OK) mils ST_RXP_ ST_RXN_ V_H V_H.U/V/XR_.U/V/XR_ ST_RXP () ST_RXN () ST_TXN () ST_TXP () V_H V V_H.U/V/XR_ U/V/XR_ Place caps close to connector. R R H--> E-- E-- *SHORT_ *SHORT_ V.U/V/XR_ U/V/XR_ Place caps close to connector. ST O onnector. V_O mils VPU V_O U/V/XR_.U/V/XR_.U/V/XR_ Place caps close to connector..u/v/xr_.u/v/xr_ U/V/XR_ VPU R K_ V.U/V/XR_ R K_ Q O OO_EN_V R U/V/XR_ K_ H-->.(burning) Q NW--F () O_EN Q NW--F.U/V/XR_ R K E-- (,) O_M# () O_ETET# () O_PRSNT# R K_ R () ST_TXP () ST_TXN () () E-- ST_RXN ST_RXP *SHORT_ R K/F_.U/V/XR_.U/V/XR_ R.K_ V_O ST_RXN_ ST_RXP_ N S GN TXP TXN GN RXN RXP GN S P P V V M GN GN P -P V Follow LL PROJET KL Quanta omputer Inc. Size ocument Number Rev ustom ST H/EST/-ROM ate: Tuesday, January, Sheet of