Auburndale / Arrandale

Transcription

1 LL Intel alpella Platform with iscrete GFX POWER /TT ONNETOR PG R - SOIMM0 R - SOIMM PG PG TT HRGER RUN POWER SW VSUS, VSUS, V_S, V_S +V, +V PG ischarge PG PG 0 ual hannel R 00/0.V uburndale / rrandale ( rpg ) PG,,, FN FN GPU LOK GEN SLGSPV(QFN) PIEx R x (M/M) PG PG PG.MHz PI-Express GFX Nvidia NV0N PG,,,,0 POWER REGULTOR +.0V_VTT,+.0V_PH REGULTOR (R).VSUS, SMR_VREF,.V REGULTOR +.V LVS isplayport VG PG PG PG PU ore PG / VPU, VPU, +V PG VG ore iscrete PG Panel onnector PG isplayport ONN. PG RT ONN. PG 0.KHz MI X FI ST-O PG ST MHz US+eST PG ST-H PG Re-river PG ST ST US.0 x PH Ibex Peak-M Intel(R) Series Express hipset US.0 x PIEx PIEx US.0 US conn x PG LN LM EXPRESS-R R PG RJ/Magnetics PG PG udio SPK conn PG udio Jacks Headphone Microphone PG UIO IT H PG amera PG IH US.0 PIEx US.0 PIEX US.0 ST US.0 MINI-R WLN/WiMX PG MINI-R (F) WWN PG 0 MINI-R (F) SS PG iometric US.0 US.0 luetooth PG PG FLSH Mbyts PG SPI.KHz LP PG,,0,,, LP US.0 SPI PS/ K ITE0 PG TPM PG -in- ard Reader RTS PG FLSH Mbyts PG Touchpad Keyboard PG PG ccelerometer (PS) PG ard Reader ONN. PG0 PROJET :LL Quanta omputer Inc. Size ocument Number Rev ustom lock iagram E Tuesday, January, 00 ate: Sheet of

2 0 Table of ontents PGE ESRIPTION Schematic lock iagram Front Page LOK GENERTOR - uburndale PU - Ibex Peak-M - RIII SO-IMM - iscreate VG (M-XT) L + amera onn. HMI onn. RT onn. udio odec L RTLL ST H & O US x & EST 0 US X/SIM_R/LEs/RF MINI-ard (UW & WWN) MINI-ard (WLN) ONFI Express ard K/ & T/P LUETOOTH FN & Thermal G-Sensor To onn. 0 itpm & RFI EEPROM K IT0E HOL & SKEW ischarge harger R (TPSREGR).0V_VTT &.0_PH (RT0) V/V (MX0) PU (MX0) IS_GFX_V (MX) 0 IS_.V_RUN (OZLN) Power lock ianram XP Revision & Schematic Value escription OM Matrix Table POWER PLNE VIN +VRT VPU VPU +V LNV VSUS VSUS.VSUS 0.VSMR_VTERM +V +V +.V +.V +.0V_VTT +.0V_PH V_ORE LV +V_O +V_H T-V VOLTGE 0V~+0V +.0V~+.V +.V +V +V +.V +V +.V +.V +0.V +V +.V +.V +.V +.0V +.0V +.V +V +V +0V~+V PGE,,,,,,,,,0,,,,,0,,,,,,,,,,,,,,0,,,,,,,,,,,0,,,,,,,,,,,,0 Power States ESRIPTION ONTROL SIGNL,,, R SOIMM REFERENE POWER MIN_ON,,,,,,,,,,, SLP_S# TRL POWER MIN_ON,,,,0,,,,,,,,,,,, 0,,,,,,,,,0,,,,, SLP_S# TRL POWER MIN_ON,,,0,,,,0,,,,,,,,,,,,,0,,,,,, MIN POWER RT ITE0 POWER / POWER I SOURE LRGE POWER LN POWER V_S +.V,,0,,,, Sys Management,PH Resume S_ON Well,Intel H udio,us,wln WiMX POWER,,,,,,,,0 SOIMM POWER LVS,NVM POWER Mini PIe,Express ard POWER uurndale VTT POWER PH ORE POWER PU ORE POWER L Power O Power H Power MIN TTERY VV_EN VV_EN VV_EN LN_ON V_S +V,,0, PH SUS POWER S_ON +V_GFX_ORE +0.V~+.V,,, SLP_S# TRL POWER SLP_S# TRL POWER VG ORE POWER SUSON SUSON SUSON MIN_ON MIN_ON MIN_ON.0V_RUN_ON GFXVR_EN VRON ENV MIN_ON MIN_ON HG_PTT TIVE IN S0~S S0~S S0~S S0~S S0~S S0~S S0~S S0~S S0~S S0~S S0 S0 S0 S0 S0 S0 S0 S0 S0 S0 S0 S0 S0~S PROJET :LL Quanta omputer Inc. Size ocument Number Rev E FRONTPGE ate: Tuesday, January, 00 Sheet of

3 +.V R *H0KF-T_ +K_V_MIN [,,,,0,,,,,,,,,,,,,,,0,,,,,,,0,,,,,] +V [,,,,0,,,,0,,] +.0V_VTT 0 +V R H0KF-T_ R H0KF-T_ E U/.V/XR_ 0U/.V/XR_ +K_V_MIN [0] LK_IH_M 0 0.U/0V/XR_ 0.U/0V/XR_ R R _ 0 0.U/0V/XR_ 0.U/0V/XR_ 0K_ 00 0.U/0V/XR_ +VIO_LK +K_V_MIN_ K_PWRG_R PU_SEL 0 U V_OT V_SR V_PU V_ V_REF V_SR_IO V_PU_IO VSS_OT VSS_ VSS_ST VSS_SR VSS_PU VSS_REF PU_STOP# K_PWRG/P# REF_0/PU_SEL K0 QFN PU-0 PU-0# PU- PU-# OT OT# SR- SR-# 0 SR-/ST 0 SR-#/ST M M_SS LK_VG_M_R LK_VG_M#_R R _ R0 *_ LK_UF_LK_P [0] LK_UF_LK_N [0] LK_UF_REFLK [0] LK_UF_REFLK# [0] LK_UF_PIE_GPLL [0] LK_UF_PIE_GPLL# [0] LK_UF_REFSSLK [0] LK_UF_REFSSLK# [0] LK_VG_M_NSS [] LK_VG_M_SS [] Place the ohm resistors close to the K 0 *0P/0V/OG_ XTL_OUT XTL_IN LK_ST LK_SLK XOUT XIN ST SLK GN *0P/0V/OG_ RF request ISLRSKLFT +V E--0 R 0K_ [0] IH_SMT +V Q N00 LK_ST R 0K_ LK_ST [,] +.0V_VTT L 00 LMPG00SN +VIO_LK 0 0.U/0V/XR_ 0.U/0V/XR_ 0U/.V/XR_ 0 0U/.V/XR_ *.U/.V/XR_ [0] IH_SMLK Q N00 LK_SLK LK_SLK [,] Place each 0.uF cap as close as possible to each V IO pin. Place the 0uF caps on the V_IO plane. RF request +V +V XTL_IN Y XTL_OUT R *0K_ PU_SEL R 0K_ *0P/0V/OG_ PU_SEL 0 PU0/=MHz (default) PU0/=00MHz [] VR_PWRG_LKEN# R K_ Q N00 K_PWRG_R R 00K_.MHZ 0P/0V/NPO_ 0P/0V/NPO_ PROJET :LL Quanta omputer Inc. Size ocument Number Rev ustom E lock Generator ate: Tuesday, January, 00 Sheet of

4 SM_ROMP_ SM_ROMP_ SM_ROMP_0 PURMRST# H_OMP0 H_OMP H_OMP H_OMP TP_SKT0# H_TERR# H_PROHOT# H_VTTPWRG PM_RM_PWRG PEG_RXP PEG_RXP PEG_RXP PEG_RXP PEG_RXP PEG_RXP PEG_RXP PEG_RXP PEG_RXP PEG_RXP PEG_RXP0 PEG_RXP PEG_RXP0 PEG_RXP PEG_RXP XP_TO_R XP_TI_R XP_PREQ# XP_TO_M XP_PRY# XP_TI_M H_PURST# H_PWRG_XP H_PROHOT# H_TERR# H_PURST# SYS_GENT_PWROK PEG_TXN PEG_TXN PEG_TXN0 PEG_TXN PEG_TXN PEG_TXN PEG_TXN PEG_TXN PEG_TXN PEG_TXN PEG_TXN PEG_TXN0 PEG_TXN PEG_TXN PEG_TXN PEG_TXN PEG TXN0 PEG TXN PEG TXN PEG TXN PEG TXN PEG TXN PEG TXN PEG TXN PEG TXN PEG TXN PEG TXN PEG TXN PEG TXN PEG TXN PEG TXN PEG TXN0 PEG TXP0 PEG TXP PEG TXP PEG TXP PEG TXP PEG TXP PEG TXP PEG_TXP PEG_TXP PEG_TXP PEG_TXP PEG_TXP PEG_TXP PEG_TXP PEG_TXP PEG_TXP PEG_TXP PEG_TXP PEG_TXP0 PEG_TXP PEG_TXP0 PEG_TXP PEG_TXP PEG TXP PEG TXP PEG TXP PEG TXP PEG TXP PEG TXP PEG TXP PEG TXP PEG TXP0 PEG_RXN0 PEG_RXN PEG_RXN PEG_RXN PEG_RXN PEG_RXN PEG_RXN PEG_RXN PEG_RXN PEG_RXN PEG_RXN PEG_RXN PEG_RXN PEG_RXN PEG_RXN PEG_RXN0 PEG_RXP PEG TXP PEG TXP PEG TXP PEG TXP PEG TXP PEG TXP PEG TXP PEG TXP PEG TXP PEG TXP PEG TXP PEG TXP0 PEG TXP PEG TXP0 PEG TXP PEG TXP PEG TXN PEG TXN PEG TXN PEG TXN PEG TXN PEG TXN PEG TXN PEG TXN PEG TXN PEG TXN PEG TXN PEG TXN0 PEG TXN PEG TXN0 PEG TXN PEG TXN H_OMP H_OMP0 H_OMP H_OMP SM_ROMP_ SM_ROMP_ SM_ROMP_0 H_VTTPWRG SYS_GENT_PWROK XP_TLK XP_TMS XP_TRST# PM_RM_PWRG XP_TO_M XP_TI_M XP_TO_R XP_TI_R XP_TRST# XP_TI_R XP_PREQ# XP_TLK XP_TMS FI_FSYN FI_FSYN FI_FSYN FI_FSYN FI_INT FI_FSYN FI_INT XP_TO_M PURMRST# +.VPU_PG +.VPU_PG RMPWRG_PU PEG_RXN[0..] [] PEG_RXP[0..] [] PM_EXTTS#0 [,] PM_EXTTS# [] LK_PIE_GPLL# [0] LK_PU_LK# [] H_PEI [] PM_SYN [] PM_THRMTRIP# [] PM_RM_PWRG [] XP_RESET# [] ELY_VR_PWRGOO [,] H_PWRGOO [] PEG_TXN[0..] [] PEG_TXP[0..] [] LK_PU_LK [] MI_TXN0 [] MI_TXN [] MI_TXN [] MI_TXN [] MI_TXP0 [] MI_TXP [] MI_TXP [] MI_TXP [] MI_RXN0 [] MI_RXN [] MI_RXN [] MI_RXN [] MI_RXP0 [] MI_RXP [] MI_RXP [] MI_RXP [] HWPG [,,,,,] LK_PIE_GPLL [0] PLTRST# [0,,,0,,,] +.0V_VTT [,,,,0,,,,0,,] +V [,,,,0,,,,,,,,,,,,,,,0,,,,,,,0,,,,,].VSUS [,,0,,] H_PROHOT# [] RMRST_TRL_E [] R_RMRST# [,] +.VPU_PG [] RMRST_TRL_PH [] +.0V_VTT +.0V_VTT +V +.VPU +.0V_VTT.VSUS +.VPU V_S V_S V_S Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET :LL PROESSER /(HOST&PIE) E ustom Tuesday, January, 00 Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET :LL PROESSER /(HOST&PIE) E ustom Tuesday, January, 00 Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET :LL PROESSER /(HOST&PIE) E ustom Tuesday, January, 00 0 For alpella S power reduction E--0 E--0 E--0 U HTG0GW U HTG0GW 0.U/0V/XR_ 0.U/0V/XR_ U0 HTG0GW U0 HTG0GW TP TP R 0K_ R 0K_ R K_ R K_ R *_ R *_ R *0_ R *0_ R./F_ R./F_ 0 0.U/0V/XR_ 0 0.U/0V/XR_ TP0 TP0 R K/F_ R K/F_ R *_ R *_ TP0 TP0 R.K_ R.K_ 0.U/0V/XR_ 0.U/0V/XR_ Q MEN00E Q MEN00E TP TP 0.U/0V/XR_ 0.U/0V/XR_ TP TP R 0/F_ R 0/F_ TP TP R *_ R *_ 0.U/0V/XR_ 0.U/0V/XR_ R 0/F_ R 0/F_ TP TP R *0 short R *0 short R 0/F_ R 0/F_ Q0 MMT0 Q0 MMT0 TP TP TP TP 0.U/0V/XR_ 0.U/0V/XR_ R *0_ R *0_ 0.U/0V/XR_ 0.U/0V/XR_ TP TP 0.U/0V/XR_ 0.U/0V/XR_ R.K/F_ R.K/F_ TP TP TP TP R0 *_ R0 *_ R *0_ R *0_ 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ R0 0/F_ R0 0/F_ 0.0U/0V/XR_ 0.0U/0V/XR_ R *0 short R *0 short 0.U/0V/XR_ 0.U/0V/XR_ R K_ R K_ R./F_ R./F_ R 0/F_ R 0/F_ Q PTTT Q PTTT R0 00/F_ R0 00/F_ R *.K/F_ R *.K/F_ R 00K_ R 00K_ R *_ R *_ TP TP 0.U/0V/XR_ 0.U/0V/XR_ R 0/F_ R 0/F_ 0.U/0V/XR_ 0.U/0V/XR_ 0 0.U/0V/XR_ 0 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ TP TP R _ R _ TP TP 0.U/0V/XR_ 0.U/0V/XR_ R0 0K_ R0 0K_ R *0 short R *0 short TP TP 0.U/0V/XR_ 0.U/0V/XR_ R *0 short R *0 short R K_ R K_ TP TP 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ R.K/F_ R.K/F_ 0.U/0V/XR_ 0.U/0V/XR_ 0 0.U/0V/XR_ 0 0.U/0V/XR_ SM_ROMP[] M SM_ROMP[] N SM_RMRST# F SM_ROMP[0] L LK# LK LK_ITP# T0 LK_ITP R0 PEG_LK# PEG_LK E PLL_REF_SSLK# PLL_REF_SSLK TERR# K OMP T PEI T PROHOT# N THERMTRIP# K RESET_OS# P VPWRGOO_ N VPWRGOO_0 N SM_RMPWROK K VTTPWRGOO M RSTIN# L PM_EXT_TS#[0] N PM_EXT_TS#[] P PRY# T PREQ# P TK N TMS P TRST# T TI T TO R TI_M R TO_M P R# N PM#[0] J PM#[] K PM#[] K PM#[] J PM#[] J PM#[] H PM#[] K PM#[] H OMP T PM_SYN L TPPWRGOO M OMP G OMP0 T SKTO# H LOKS MIS THERML PWR MNGEMENT R MIS JTG & PM U I,U_F_rPG,R0P LOKS MIS THERML PWR MNGEMENT R MIS JTG & PM U I,U_F_rPG,R0P 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ TP TP R *0_ R *0_ 0.U/0V/XR_ 0.U/0V/XR_ R 0K_ R 0K_ R *0 short R *0 short R 0K_ R 0K_ 0.U/0V/XR_ 0.U/0V/XR_ R _ R _ R *0_ R *0_ R./F_ R./F_ TP TP 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ R _ R _ TP TP R 0K_ R 0K_ MI_RX#[0] MI_RX#[] MI_RX#[] MI_RX#[] MI_RX[0] MI_RX[] MI_RX[] MI_RX[] MI_TX#[0] MI_TX#[] G MI_TX#[] F MI_TX#[] H MI_TX[0] MI_TX[] F MI_TX[] G MI_TX[] E FI_TX#[0] E FI_TX#[] FI_TX#[] FI_TX#[] FI_TX#[] G FI_TX#[] E FI_TX#[] F FI_TX#[] G FI_TX[0] FI_TX[] FI_TX[] 0 FI_TX[] FI_TX[] G FI_TX[] E0 FI_TX[] F0 FI_TX[] G FI_FSYN[0] F FI_FSYN[] E FI_INT FI_LSYN[0] F FI_LSYN[] PEG_IOMPI PEG_IOMPO PEG_RIS PEG_ROMPO PEG_RX#[0] K PEG_RX#[] J PEG_RX#[] J PEG_RX#[] G PEG_RX#[] G PEG_RX#[] F PEG_RX#[] F PEG_RX#[] PEG_RX#[] E PEG_RX#[] PEG_RX#[0] PEG_RX#[] PEG_RX#[] PEG_RX#[] PEG_RX#[] 0 PEG_RX#[] PEG_RX[0] J PEG_RX[] H PEG_RX[] H PEG_RX[] F PEG_RX[] G PEG_RX[] E PEG_RX[] F PEG_RX[] PEG_RX[] F PEG_RX[] PEG_RX[0] PEG_RX[] PEG_RX[] 0 PEG_RX[] PEG_RX[] PEG_RX[] 0 PEG_TX#[0] L PEG_TX#[] M PEG_TX#[] M PEG_TX#[] M0 PEG_TX#[] L PEG_TX#[] K PEG_TX#[] M PEG_TX#[] J PEG_TX#[] K PEG_TX#[] H0 PEG_TX#[0] H PEG_TX#[] F PEG_TX#[] E PEG_TX#[] PEG_TX#[] PEG_TX#[] PEG_TX[0] L PEG_TX[] M PEG_TX[] M PEG_TX[] L0 PEG_TX[] M PEG_TX[] K PEG_TX[] M PEG_TX[] H PEG_TX[] K PEG_TX[] G0 PEG_TX[0] G PEG_TX[] F PEG_TX[] E PEG_TX[] PEG_TX[] PEG_TX[] PI EXPRESS -- GRPHIS MI Intel(R) FI U I,U_F_rPG,R0P PI EXPRESS -- GRPHIS MI Intel(R) FI U I,U_F_rPG,R0P TP TP 0 0.U/0V/XR_ 0 0.U/0V/XR_ R./F_ R./F_ R0./F_ R0./F_ 0 0.U/0V/XR_ 0 0.U/0V/XR_ R K_ R K_ TP TP U/.V/XR_ U/.V/XR_ R *0_ R *0_ 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ TP TP R *0_ R *0_

5 UURNLE PROESSOR (R) 0 U U [] M Q[:0] [] M S#0 [] M S# [] M S# [] M S# [] M RS# [] M WE# M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q M Q E0 F0 E F E E H0 G K J G G0 J J0 L M M L L K N P H F K K F G J J J0 J L0 K K L K L N M0 R L M N T P M N M T T L R P U E E S_Q[0] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[0] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[0] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[0] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[0] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[0] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[0] S_Q[] S_Q[] S_Q[] S_S[0] S_S[] S_S[] S_S# S_RS# S_WE# R SYSTEM MEMORY S_K[0] S_K#[0] S_KE[0] S_K[] S_K#[] S_KE[] S_S#[0] S_S#[] S_OT[0] S_OT[] S_M[0] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[] S_QS#[0] S_QS#[] S_QS#[] S_QS#[] S_QS#[] S_QS#[] S_QS#[] S_QS#[] S_QS[0] S_QS[] S_QS[] S_QS[] S_QS[] S_QS[] S_QS[] S_QS[] S_M[0] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[0] S_M[] S_M[] S_M[] S_M[] S_M[] P Y Y P E E F H M G M N0 N F J N H K P T F H M H K0 N R Y W V V T Y U T U G T V M M0 M M M M M M M M M M M M M M M QS#0 M QS# M QS# M QS# M QS# M QS# M QS# M QS# M QS0 M QS M QS M QS M QS M QS M QS M QS M 0 M M M M M M M M M M 0 M M M M M M LK0 [] M LK0# [] M KE0 [] M LK [] M LK# [] M KE [] M S#0 [] M S# [] M OT0 [] M OT [] M M[:0] [] M QS#[:0] [] M QS[:0] [] M [:0] [] [] M Q[:0] [] M S#0 [] M S# [] M S# [] M S# [] M RS# [] M WE# M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q M Q E F F F F G H G J J G G J J J K L M K K M N F G J K G G J H K K M N K K M M P N T N N N T T N P P T T P R0 T0 W R Y S_Q[0] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[0] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[0] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[0] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[0] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[0] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[0] S_Q[] S_Q[] S_Q[] S_S[0] S_S[] S_S[] S_S# S_RS# S_WE# R SYSTEM MEMORY - S_K[0] S_K#[0] S_KE[0] S_K[] S_K#[] S_KE[] S_S#[0] S_S#[] S_OT[0] S_OT[] S_M[0] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[] S_QS#[0] S_QS#[] S_QS#[] S_QS#[] S_QS#[] S_QS#[] S_QS#[] S_QS#[] S_QS[0] S_QS[] S_QS[] S_QS[] S_QS[] S_QS[] S_QS[] S_QS[] S_M[0] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[0] S_M[] S_M[] S_M[] S_M[] S_M[] W W M V V M E H K H L R T F J L H L R R E H M G L P R U V T V R T R R R R P R F P N M M0 M M M M M M M M M M M M M M M QS#0 M QS# M QS# M QS# M QS# M QS# M QS# M QS# M QS0 M QS M QS M QS M QS M QS M QS M QS M 0 M M M M M M M M M M 0 M M M M M M LK0 [] M LK0# [] M KE0 [] M LK [] M LK# [] M KE [] M S#0 [] M S# [] M OT0 [] M OT [] M M[:0] [] M QS#[:0] [] M QS[:0] [] M [:0] [] I,U_F_rPG,R0P I,U_F_rPG,R0P PROJET :LL Quanta omputer Inc. Size ocument Number Rev ustom PROESSER /(R) E ate: Tuesday, January, 00 Sheet of

6 PU_VI0 PRSLPVR H_VTTVI PU_VI PU_VI PU_VI PU_VI PU_VI PU_VI PU_VI PU_VI PU_VI PU_VI H_PSI# PU_VI PU_VI PU_VI0 PRSLPVR H_PSI#_R GFXVR_IMON H_PSI#_R +V_THR SYS_SHN#_R IMON [] VSENSE [] VSSSENSE [] PRSLPVR [] PU_VI0 [] PU_VI [] PU_VI [] PU_VI [] PU_VI [] PU_VI [] PU_VI [] VTT_SENSE [] +.0V_VTT [,,,,0,,,,0,,] V_ORE [0,].VSUS [,,,0,,] +.V [0,,,,0,] H_PSI# [] PSI_ON# [] SYS_SHN# [,] V_ORE +.0V_VTT V_ORE +.0V_VTT +.0V_VTT +.V +.0V_VTT V_ORE +.0V_VTT +.VPU +V +V Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET :LL PROESSER /(POWER) E ustom Tuesday, January, 00 Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET :LL PROESSER /(POWER) E ustom Tuesday, January, 00 Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET :LL PROESSER /(POWER) E ustom Tuesday, January, 00 UURNLE PROESSOR (GRPHIS POWER) 0 Lenovo Request PU thermal protection E--0 E--0 U/.V/XR_ U/.V/XR_ U/.V/XR_ U/.V/XR_ 0U/.V/XR_ 0U/.V/XR_ R K_ R K_ R K_ R K_ 0U/.V/XR_ 0U/.V/XR_ R *0K/F_ R *0K/F_ 0U/0V/XR_ 0U/0V/XR_ R *K_ R *K_ R K_ R K_ U/.V/XR_ U/.V/XR_ R K_ R K_ U/.V/XR_ U/.V/XR_ 0U/.V/XR_ 0U/.V/XR_ Q MMT0LTG Q MMT0LTG GFX_VI[0] M GFX_VI[] P GFX_VI[] N GFX_VI[] P GFX_VI[] M GFX_VI[] P GFX_VI[] N GFX_VR_EN R GFX_PRSLPVR T GFX_IMON M VXG_SENSE R VSSXG_SENSE T VXG T VXG T VXG T VXG T VXG R VXG R VXG R VXG R VXG P VXG0 P VXG P VXG P VXG N VXG N VXG N VXG N VXG M VXG M VXG M VXG0 M VXG L VXG L VXG L VXG L VXG K VXG K VXG K VXG K VXG J VXG0 J VXG J VXG J VXG H VXG H VXG H VXG H VTT_ J VTT_ J VTT_ H VTT_ K VTT_ J VTT_0 J VTT_ J VTT_ H VTT_ G VTT_ G VTT_ G VTT_ F VTT_ E VTT_ E VQ J VQ F VQ E VQ E VQ VQ VQ VQ Y VQ W VQ0 W VQ U VQ T VQ T VQ P VQ N VQ N VQ L VQ H VTT0_ P0 VTT0_0 N0 VTT0_ L0 VTT0_ K0 VPLL L VPLL L VPLL M VTT_ J VTT_ J0 VTT_ J VTT_ H VTT_ H0 VTT_ H POWER GRPHIS VIs GRPHIS R -.V RILS FI PEG & MI SENSE LINES.V.V UG I,U_F_rPG,R0P POWER GRPHIS VIs GRPHIS R -.V RILS FI PEG & MI SENSE LINES.V.V UG I,U_F_rPG,R0P 0.U/.V/XR_ 0.U/.V/XR_ U/.V/XR_ U/.V/XR_ R K_ R K_ 0U/.V/XR_ 0U/.V/XR_ U/.V/XR_ U/.V/XR_ Q N00 Q N00 U/.V/XR_ U/.V/XR_ 0 *0U/0V/XR_ 0 *0U/0V/XR_ R0 *K_ R0 *K_ 0U/.V/XR_ 0U/.V/XR_ U/.V/XR_ U/.V/XR_ R 00/F_ R 00/F_ 0.U/0V/XR_ 0.U/0V/XR_ 0U/.V/XR_ 0U/.V/XR_ U/.V/XR_ U/.V/XR_ 0 U/.V/XR_ 0 U/.V/XR_ Q MMT0LTG Q MMT0LTG U/.V/XR_ U/.V/XR_ 0 0U/.V/XR_ 0 0U/.V/XR_ U/.V/XR_ U/.V/XR_ 0U/.V/XR_ 0U/.V/XR_ SET GN OT V HYST U MX0 U MX0 00 U/.V/XR_ 00 U/.V/XR_ U/.V/XR_ U/.V/XR_ U/.V/XR_ U/.V/XR_ 0U/.V/XR_ 0U/.V/XR_ R 00/F_ R 00/F_ 0 U/.V/XR_ 0 U/.V/XR_ 0 U/.V/XR_ 0 U/.V/XR_ 0U/.V/XR_ 0U/.V/XR_ R K/F_ R K/F_ R K_ R K_ TP TP R K_ R K_ 0U/0V/XR_ 0U/0V/XR_ ISENSE N VTT_SENSE PSI# N VI[0] K VI[] K VI[] K VI[] L VI[] L VI[] M VI[] M PRO_PRSLPVR M VTT_SELET G V_SENSE J VSS_SENSE_VTT V G V G V G V G V G V G0 V G V G V G V0 G V F V F V F V F V F V F0 V F V F V F V0 F V V V V V V 0 V V V V0 V V V V V V 0 V V V V0 V V V V V V 0 V V V V0 V Y V Y V Y V Y V Y V Y0 V Y V Y V Y V0 Y V V V V V V V V V V V V0 V V V V V V V0 V V U V U V U V U V U V U0 V U V U V U V0 U V R V R V R V R V R V R0 V R V R V R V0 R V P V P V P V P V P V P0 V P V P V P V00 P VTT0_ F0 VTT0_ E0 VTT0_ 0 VTT0_ 0 VTT0_ Y0 VTT0_ W0 VTT0_ U0 VTT0_0 T0 VTT0_ J VTT0_ J VTT0_ H VTT0_ H VTT0_ H VTT0_ H0 VTT0_ J VTT0_ J VTT0_ H VTT0_ H VTT0_ G VTT0_0 G VTT0_ G VTT0_ G VTT0_ F VTT0_ F VTT0_ F VTT0_ F VTT0_ E VTT0_ E VTT0_ VTT0_0 VTT0_ VTT0_ VTT0_ VTT0_ VTT0_ VTT0_ VTT0_ VTT0_ VTT0_ VTT0_0 VTT0_ VTT0_ VSS_SENSE J VTT0_ J VTT0_ J POWER PU ORE SUPPLY.V RIL POWER SENSE LINES PU VIS UF I,U_F_rPG,R0P POWER PU ORE SUPPLY.V RIL POWER SENSE LINES PU VIS UF I,U_F_rPG,R0P R K_ R K_ U/.V/XR_ U/.V/XR_ 0 U/.V/XR_ 0 U/.V/XR_ 0U/0V/XR_ 0U/0V/XR_ R *K_ R *K_.U/.V/XR_.U/.V/XR_ U/.V/XR_ U/.V/XR_ 0U/0V/XR_ 0U/0V/XR_ R *K_ R *K_ R0 *0_ R0 *0_ R *K_ R *K_ U/.V/XR_ U/.V/XR_ R *K_ R *K_ 0 0U/.V/XR_ 0 0U/.V/XR_ U/.V/XR_ U/.V/XR_ U/.V/XR_ U/.V/XR_ 0U/0V/XR_ 0U/0V/XR_ + *0u_.V_ + *0u_.V_ U/.V/XR_ U/.V/XR_ U/.V/XR_ U/.V/XR_ U/.V/XR_ U/.V/XR_ 0U/0V/XR_ 0U/0V/XR_ R K_ R K_ 0 0U/.V/XR_ 0 0U/.V/XR_ 0 U/.V/XR_ 0 U/.V/XR_ 0U/.V/XR_ 0U/.V/XR_ 0U/.V/XR_ 0U/.V/XR_ R *K_ R *K_ 0U/.V/XR_ 0U/.V/XR_ 0 0.U/0V/XR_ 0 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ R *K_ R *K_ 0U/0V/XR_ 0U/0V/XR_ U/.V/XR_ U/.V/XR_ U/.V/XR_ U/.V/XR_ 0 *0U/0V/XR_ 0 *0U/0V/XR_ U/.V/XR_ U/.V/XR_ U/.V/XR_ U/.V/XR_ 0U/.V/XR_ 0U/.V/XR_ 0U/.V/XR_ 0U/.V/XR_ U/.V/XR_ U/.V/XR_ R *K_ R *K_ U/.V/XR_ U/.V/XR_ U/.V/XR_ U/.V/XR_ R.K/F_ R.K/F_ 0 U/.V/XR_ 0 U/.V/XR_ R 0/F_ R 0/F_ R K_ R K_ 0U/.V/XR_ 0U/.V/XR_

7 FG FG0 FG FG0 FG FG R_VREF_Q [] R_VREF_Q0 [] Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET :LL PROESSER /(GN) E ustom Tuesday, January, 00 Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET :LL PROESSER /(GN) E ustom Tuesday, January, 00 Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET :LL PROESSER /(GN) E ustom Tuesday, January, 00 UURNLE PROESSOR (GN) UURNLE PROESSOR( RESERVE, FG) isabled; No Physical isplay Port attached to Embedded iplay Port Enabled; n external isplay port device is connected to the Embedded isplay port FG (isplay Port Presence) FG (PI-Epress Static Lane Reversal) 0 Normal Operation Lane Numbers Reversed Single PEG FG0 (PI-Epress onfiguration Select) ifurcation enabled 0 FG[0] M0 FG[] M FG[] P FG[] L FG[] L0 FG[] M FG[] N FG[] M FG[] K FG[] K FG[0] K FG[] J FG[] N0 FG[] N FG[] J FG[] J FG[] J0 FG[] K0 RSV H RSV K RSV J RSV_NTF_ T RSV J RSV_NTF_0 P RSV_NTF_ T RSV_NTF_ R RSV_TP_ H RSV L RSV L RSV P0 RSV P RSV L RSV0 T RSV T RSV P RSV R RSV_NTF_ T RSV_NTF_ T RSV_NTF_ P RSV_NTF_ R RSV R RSV_NTF_0 RSV_NTF_ RSV_NTF_ RSV_NTF_ RSV J RSV J RSV RSV RSV 0 RSV 0 RSV0 T RSV U RSV RSV RSV_NTF_ RSV_NTF_ RSV_TP_ RSV_TP_ RSV_TP_ R RSV_TP_ RSV_TP_ RSV_TP_ R RSV_TP_ RSV_TP_ G RSV_TP_0 RSV_TP_ E RSV_TP_ V RSV_TP_ V RSV_TP_ N RSV_TP_ W RSV_TP_ W RSV_TP_ N RSV_TP_ RSV_TP_ E RSV_TP_0 RSV_TP_ RSV L RSV_NTF_ R RSV P RSV L RSV L RSV L RSV J RSV G RSV M RSV L RSV J RSV0 H RSV G RSV G RSV E RSV E0 RSV J RSV J RSV_TP_ E RSV_TP_0 F KEY RSV RSV RSV J RSV H VSS P RESERVE UE I,U_F_rPG,R0P RESERVE UE I,U_F_rPG,R0P R.0K/F_ R.0K/F_ VSS T0 VSS T VSS R VSS R VSS R VSS R VSS R VSS R0 VSS R VSS0 R VSS R VSS R VSS R VSS R VSS P0 VSS P VSS P VSS P0 VSS P VSS0 P VSS P VSS N VSS N VSS N VSS N0 VSS N VSS M VSS M VSS M VSS0 M0 VSS M VSS M VSS M VSS M VSS M VSS M VSS L VSS L VSS L VSS0 L0 VSS L VSS L VSS L VSS L VSS L VSS K VSS K VSS K VSS K0 VSS0 K VSS J VSS J VSS J0 VSS J VSS J VSS J VSS J VSS J VSS J VSS0 H VSS H VSS H VSS H VSS H VSS H0 VSS H VSS H VSS H VSS H VSS0 H0 VSS H VSS H VSS H VSS H VSS H VSS G0 VSS F VSS F VSS F VSS0 E VSS E VSS E VSS E VSS E VSS E0 VSS E VSS E VSS E VSS E VSS0 E VSS 0 VSS VSS VSS VSS VSS VSS VSS VSS VSS00 0 VSS0 VSS0 VSS0 VSS0 VSS0 VSS0 0 VSS0 Y VSS0 Y VSS0 Y VSS0 W VSS W VSS W VSS W VSS W VSS W0 VSS W VSS W VSS W VSS W VSS0 W VSS V0 VSS U VSS U VSS U VSS T VSS T VSS T VSS T VSS T VSS0 T0 VSS T VSS T VSS T VSS T VSS T VSS R0 VSS P VSS P VSS P VSS0 N VSS N VSS N VSS N VSS N VSS N0 VSS N VSS N VSS N VSS N VSS0 N VSS M0 VSS L VSS L VSS L VSS L VSS L VSS L VSS K VSS K VSS0 K0 VSS UH I,U_F_rPG,R0P VSS UH I,U_F_rPG,R0P TP TP VSS K VSS K VSS K VSS K VSS J VSS J0 VSS J VSS J VSS H VSS0 H VSS H VSS H VSS H VSS H VSS H VSS H VSS H VSS H VSS H VSS0 H VSS H VSS G VSS G VSS G0 VSS G VSS G VSS G VSS F0 VSS F VSS0 F VSS F VSS F VSS F VSS E VSS E VSS E VSS E VSS E VSS E VSS00 E VSS0 E VSS0 E VSS0 E VSS0 E VSS0 VSS0 0 VSS0 VSS0 VSS0 VSS0 VSS VSS VSS VSS VSS VSS VSS 0 VSS VSS VSS0 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS0 VSS_NTF T VSS_NTF T VSS_NTF R VSS_NTF VSS_NTF VSS_NTF VSS_NTF VSS VSS VSS VSS NTF UI I,U_F_rPG,R0P VSS NTF UI I,U_F_rPG,R0P R *.0K/F_ R *.0K/F_ R0 *.0K/F_ R0 *.0K/F_

8 [,,,,0,,,,0,,] +.0V_VTT [,,0,,,,,0] V_S [,,,,0,,,,,,,,,,,,,,,0,,,,,,,0,,,,,] +V 0 IEX PEK-M (MI,FI,GPIO) IEX PEK-M (LVS,I) [] MI_RXN0 [] MI_RXN [] MI_RXN [] MI_RXN [] MI_RXP0 [] MI_RXP [] MI_RXP [] MI_RXP [] MI_TXN0 [] MI_TXN [] MI_TXN [] MI_TXN [] MI_TXP0 [] MI_TXP [] MI_TXP [] MI_TXP +.0V_VTT [] XP_RESET# [] PM_RM_PWRG [] IH_RSMRST# [] SUS_PWR_K [] SIO_PWRTN# [] _PRESENT R R R R0 TP TP0./F_ *0 short *0 short *0 short MI_OMP XP_RESET# SYS_PWROK IH_PWRG PM_MPWROK PH_LN_RST# IH_RSMRST# SUS_PWR_K_R _PRESENT_R PM_TLOW# J W0 J0 G 0 G0 E F 0 E H 0 H F T M K 0 M P P U MI0RXN MIRXN MIRXN MIRXN MI0RXP MIRXP MIRXP MIRXP MI0TXN MITXN MITXN MITXN MI0TXP MITXP MITXP MITXP MI_ZOMP MI_IROMP SYS_RESET# SYS_PWROK PWROK MEPWROK LN_RST# RMPWROK RSMRST# SUS_PWR_K / GPIO0 PWRTN# PRESENT / GPIO TLOW# / GPIO MI System Power Management FI FI_RXN0 FI_RXN FI_RXN FI_RXN FI_RXN FI_RXN FI_RXN FI_RXN FI_RXP0 FI_RXP FI_RXP FI_RXP FI_RXP FI_RXP FI_RXP FI_RXP FI_INT FI_FSYN0 FI_FSYN FI_LSYN0 FI_LSYN WKE# LKRUN# / GPIO SUS_STT# / GPIO SUSLK / GPIO SLP_S# / GPIO SLP_S# SLP_S# SLP_M# TP PMSYNH H J E F G W J F H J G J Y P F E H P K N J0 PIE_WKE# LKRUN# IH_SUSLK SLP_S# SLP_M# TP TP TP TP TP PIE_WKE# [,] LKRUN# [,] LP_P# [] PM_SLP_S# [] SIO_SLP_S# [] PM_SYN [] E--0 _IREF_R R K_ U T L_KLTEN T L_V_EN Y L_KLTTL L LK Y L T L_TRL_LK V L_TRL_T P LV_IG P LV_VG T LV_VREFH T LV_VREFL V LVS_LK# V LVS_LK Y V 0 Y V P P Y T U T Y T U0 T V V Y Y LVS_T#0 LVS_T# LVS_T# LVS_T# LVS_T0 LVS_T LVS_T LVS_T LVS_LK# LVS_LK LVS_T#0 LVS_T# LVS_T# LVS_T# LVS_T0 LVS_T LVS_T LVS_T RT_LUE RT_GREEN RT_RE RT LK RT T RT_HSYN RT_VSYN _IREF RT_IRTN LVS RT IbexPeak-M_Rev0_ igital isplay Interface SVO_TVLKINN SVO_TVLKINP SVO_STLLN SVO_STLLP SVO_INTN SVO_INTP SVO_TRLLK SVO_TRLT P_UXN P_UXP P_HP P_0N P_0P P_N P_P P_N P_P P_N P_P P_TRLLK P_TRLT P_UXN P_UXP P_HP P_0N P_0P P_N P_P P_N P_P P_N P_P P_TRLLK P_TRLT P_UXN P_UXP P_HP P_0N P_0P P_N P_P P_N P_P P_N P_P J G J G F H T T G J U J G 0 0 W Y E V0 E0 0 F H U0 U T J0 G0 J G F H E isplay port isplay port isplay port SVO PM_RI# F RI# SLP_LN# F SLP_LN# SLP_LN# [] IbexPeak-M_Rev0_ hange from 0.% to % V_S LKRUN# R +V.K_ [,] ELY_VR_PWRGOO [] EPWROK U HTG0GW R R0 *0 short *0 short SYS_PWROK IH_PWRG PM_MPWROK XP_RESET# PM_RI# PM_TLOW# R R R K_ V_S 0K_.K_ PIE_WKE# R 0K PRESENT_R SUS_PWR_K_R R0 R 0K_ 0K_ E--0 SLP_LN# R 0K_ IH_RSMRST# PH_LN_RST# R R 0K_ *0K_ IH_PWRG R0 0K_ PROJET :LL Quanta omputer Inc. Size ocument Number Rev ustom PH / (MI&VIEO) E Tuesday, January, 00 ate: Sheet of

9 [,] +VRT [,,,,,,,0,,,,] VPU [,,,,0,,,,,,,,,,,,,,,0,,,,,,,0,,,,,] +V [,,0,,,,,0] V_S [,,,,0,,,,0,,] +.0V_VTT 0 VPU R00V-0 +VRT U/.V/XR_ RT ircuitry MOS Settings J lear MOS - Save MOS -X (efault) +VRT_ R K/F_ +VRT_ T RT_T R00V-0 R0 R0 0K/F_ 0K/F_ U/.V/XR_ SHORT_ P R M/F_ TPM Settings J lear ME RT registers - Save ME RT registers J -X (efault) U/.V/XR_ J SHORT_ P P/0V/NPO_ Y.KHZ R 0M_ P/0V/NPO_ ap values depend on Xtal +VRT R 0K_ IEX PEK-M (H,JTG,ST) U RT_X RT_X RTX RTX RT_RST# RTRST# SRT_RST# SRTRST# SM_INTRUER# INTRUER# PH_INVRMEN INTVRMEN RT LP FWH0 / L0 FWH / L FWH / L FWH / L FWH / LFRME# LP_RQ#0 LRQ0# F L_K_OFF LRQ# / GPIO SERIRQ R TP 0K_ +V LP_L0 [,,] LP_L [,,] LP_L [,,] LP_L [,,] LP_LFRME# [,,] L_K_OFF [] IRQ_SERIRQ [,] VPU 0MIL 0MIL INTVRMEN - Integrated SUS.V VRM Enable High - Enable Internal VRs [] SPKR Z_IT_LK Z_SYN SPKR 0 P H_LK H_SYN SPKR ST0RXN ST0RXP ST0TXN ST0TXP K K K K ST_RX0- [] ST_RX0+ [] ST_TX0- [] ST_TX0+ [] SS R R.K_ R K_.K/F_ VRT_ R RTGTE K/F_ VRT_ Q MMT0 [] IH_Z_OE_SIN0 V_S +V R0 R0 R0 TP TP TP *K_ *K_ *0K_ Z_RST# Z_SOUT H_OK_EN# H_OK_RST# 0 G0 F0 E F H J0 H_RST# H_SIN0 H_SIN H_SIN H_SIN H_SO IH H_OK_EN# / GPIO H_OK_RST# / GPIO ST STRXN STRXP STTXN STTXP STRXN STRXP STTXN STTXP STRXN STRXP STTXN STTXP STRXN STRXP STTXN STTXP H H H H F F F F H H F F E--0 ST_RX- [] ST_RX+ [] ST_TX- [] ST_TX+ [] ST_RX- [] ST_RX+ [] ST_TX- [] ST_TX+ [] ST H ST O TP TP TP PH_JTG_TK_UF PH_JTG_TMS PH_JTG_TI M K K JTG_TK JTG_TMS JTG_TI STRXN STRXP STTXN STTXP ST_RX- [] ST_RX+ [] ST_TX- [] ST_TX+ [] E-ST No Reboot Strap +V Place near connector R0 *K_ R 0K_ SPKR IRQ_SERIRQ [] [] [] SPI_LK_R SPI_S0#_R SPI_SI_R TP TP TP PH_JTG_TO PH_JTG_RST# SPI_LK_R SPI_S0#_R SPI_S# SPI_SI_R J J V Y Y JTG_TO JTG_RST# SPI_LK SPI_S0# SPI_S# SPI_MOSI SPI JTG STIOMPO STIOMPI STLE# ST0GP / GPIO ST_OMP +.0V_VTT ST_T# [] MOEL_I [] SPI_SO [] SPI_SO V V SPI_MISO STGP / GPIO SIM_R_ET [0] R0 0K_ +V IbexPeak-M_Rev0_ F F T Y R R 0K_./F_ +V [] [] [] [] IH_Z_OE_ITLK IH_Z_OE_SYN IH_Z_OE_RST# IH_Z_OE_SOUT R _ P/0V/NPO_ R0 _ R _ R _ Z_IT_LK Z_SYN Z_RST# Z_SOUT Place all series terms close to PH except for SIN input lines,which should be close to source.placement of R, R, R & R should equal distance to the T split trace point. asically, keep the same distance from T for all series termination resistors. +V R itpm ENLE/ISLE *K_ TPM Function Enable isable SPI_SI R Stuff N (efault) SPI_S0#_R SPI_LK_R SPI_SI_R SPI_SO R _ SPI_S0# R _ SPI_LK R _ SPI_SI R0 _ SPI_SO_R 0 P/0V/NPO_ +V For ME F/W Mbit (M yte), SPI R0.K_ U E# V SK SI SO HOL# WP# VSS MXL0 0.U/0V/XR_ +V R 0K_ PROJET :LL Quanta omputer Inc. Size ocument Number Rev ustom PH / (ST&H&JT) E Tuesday, January, 00 ate: Sheet of

10 IEX PEK-M (PI,US,NVRM) [,,,,,,,,,,,,,,,,,,,0,,,,,,,0,,,,,] +V [,,,,,,,0] V_S [,,,,,,,,0,,] +.0V_VTT [,,,,0,] +.V IEX PEK-M (PI-E,SMUS,LK) 0 TP TP TP TP PI_PIRQ# PI_PIRQ# PI_PIRQ# PI_PIRQ# PI_REQ0# PI_REQ# PI_REQ# PI_REQ# PI_GNT0# PI_GNT# PI_GNT# GNT# PI_PIRQE# PI_PIRQF# PI_PIRQG# PI_PIRQH# PI_RST PI_SERR# PI_PERR# PI_IRY# PI_EVSEL# PI_FRME# H0 N J 0 E H E0 0 M M F M0 M J K F0 K M J K L F J0 G F M H J0 G H G G H F M F K F H K K E E0 H F UE /E0# /E# /E# /E# PIRQ# PIRQ# PIRQ# PIRQ# REQ0# REQ# / GPIO0 REQ# / GPIO REQ# / GPIO GNT0# GNT# / GPIO GNT# / GPIO GNT# / GPIO PIRQE# / GPIO PIRQF# / GPIO PIRQG# / GPIO PIRQH# / GPIO PIRST# SERR# PERR# IRY# PR EVSEL# FRME# PI NVRM US NV_E#0 NV_E# NV_E# NV_E# NV_QS0 NV_QS NV_Q0 / NV_IO0 NV_Q / NV_IO NV_Q / NV_IO NV_Q / NV_IO NV_Q / NV_IO NV_Q / NV_IO NV_Q / NV_IO NV_Q / NV_IO NV_Q / NV_IO NV_Q / NV_IO NV_Q0 / NV_IO0 NV_Q / NV_IO NV_Q / NV_IO NV_Q / NV_IO NV_Q / NV_IO NV_Q / NV_IO NV_LE NV_LE NV_ROMP NV_R# NV_WR#0_RE# NV_WR#_RE# NV_WE#_K0 NV_WE#_K USP0N USP0P USPN USPP USPN USPP USPN USPP USPN USPP USPN USPP USPN USPP USPN USPP USPN USPP USPN USPP USP0N USP0P USPN USPP USPN USPP USPN USPP Y P V G P P T T V E J J G Y U V Y Y V F H J N0 P0 J0 L0 F0 G0 0 0 M N H J E F G H L M NV_LE NV_LE NV_ROMP R *./F_ Place R near to PH IH_USP0- [] IH_USP0+ [] US0 IH_USP- [] IH_USP+ [] US IH_USP- [] IH_USP+ [] Express ard IH_USP- [] IH_USP+ [] amera IH_USP- [] IH_USP+ [] Mini ard (WLN) IH_USP- [0] IH_USP+ [0] Mini ard (WWN) IH_USP- [] IH_USP+ [] US IH_USP- [] IH_USP+ [] US IH_USP0- [] IH_USP0+ [] FINGER PRINTER IH_USP- [] IH_USP+ [] Mini ard (SS) IH_USP- [] IH_USP+ [] ardreader IH_USP- [] IH_USP+ [] LUETOOTH [] PIE_RX- MiniWLN [] PIE_RX+ [] PIE_TX- [] PIE_TX+ [] PIE_RX- Express ard [] PIE_RX+ [] PIE_TX- [] PIE_TX+ [0] PIE_RX- [0] PIE_RX+ MiniWWN [0] PIE_TX- [0] PIE_TX+ [] PIE_RX-/GLN_RX- [] PIE_RX+/GLN_RX+ LN [] PIE_TX-/GLN_TX- [] PIE_TX+/GLN_TX+ [] LK_PH_SR_N MiniWLN [] LK_PH_SR_P [] MINILK_REQ# [] LK_PH_SR_N Express ard [] LK_PH_SR_P 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ *0.U/0V/XR_ *0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ LK_PIE_REQ0# LK_PIE_REQ# MINILK_REQ# R LK_PIE_REQ# R PIE_TXN_ PIE_TXP_ PIE_TXN_ PIE_TXP_ PIE_TXN_ PIE_TXP_ PIE_TXN_ PIE_TXP_ *0 short *0 short G0 J0 F H W U0 T0 U V E F H G J W T U U V G J G J K K P M M U M M N H H M M U PERN PERP PETN PETP PERN PERP PETN PETP PERN PERP PETN PETP PERN PERP PETN PETP PERN PERP PETN PETP PERN PERP PETN PETP PERN PERP PETN PETP PERN PERP PETN PETP LKOUT_PIE0N LKOUT_PIE0P PIELKRQ0# / GPIO LKOUT_PIEN LKOUT_PIEP PIELKRQ# / GPIO LKOUT_PIEN LKOUT_PIEP PIELKRQ# / GPIO0 LKOUT_PIEN LKOUT_PIEP PIELKRQ# / GPIO LKOUT_PIEN LKOUT_PIEP PI-E* From LK UFFER SMus ontroller PEG Link SMLERT# / GPIO SMLK SMT SML0LERT# / GPIO0 SML0LK SML0T SMLLERT# / GPIO SMLLK / GPIO SMLT / GPIO L_LK L_T L_RST# PEG LKRQ# / GPIO LKOUT_PEG N LKOUT_PEG P LKOUT_MI_N LKOUT_MI_P LKOUT_P_N / LKOUT_LK_N LKOUT_P_P / LKOUT_LK_P LKIN_MI_N LKIN_MI_P LKIN_LK_N LKIN_LK_P LKIN_OT_N LKIN_OT_P LKIN_ST_N / KSS_N LKIN_ST_P / KSS_P REFLKIN LKIN_PILOOPK XTL_IN XTL_OUT H J G M E0 G T T T H N N T T W P P F E H H P J H H SMLERT# IH_SMLK IH_SMT SML0LERT# SM_LK_ME0 SM_T_ME0 SMLLERT# SM_LK_ME SM_T_ME L_LK L_T L_RST# PEG_LKREQ# LK_PI_F XTL_IN XTL_OUT T0 T T IH_SMLK [] IH_SMT [] SM_LK_ME0 [] SM_T_ME0 [] PEG_LKREQ# [] LK_PIE_VG# [] LK_PIE_VG [] LK_PIE_GPLL# [] LK_PIE_GPLL [] LK_UF_PIE_GPLL# [] LK_UF_PIE_GPLL [] LK_UF_LK_N [] LK_UF_LK_P [] LK_UF_REFLK# [] LK_UF_REFLK [] LK_UF_REFSSLK# [] LK_UF_REFSSLK [] LK_IH_M [] [] SIO_EXT_WKE# [] LK_LP_EUG [] LK_PI_ [] LK_LP_TPM R _ R _ LK_PI_F R _ R _ PI_PLOK# PI_STOP# PI_TRY# PI_PLTRST# LK_LP_EUG_ LK_PI LK_PI_F_ LK_LP_TPM_ M N P P P P PLOK# STOP# TRY# PME# PLTRST# LKOUT_PI0 LKOUT_PI LKOUT_PI LKOUT_PI LKOUT_PI IbexPeak-M_Rev0_ USRIS# USRIS O0# / GPIO O# / GPIO0 O# / GPIO O# / GPIO O# / GPIO O# / GPIO O# / GPIO0 O# / GPIO N J F L E G F T US_IS US_O0# US_O# US_O# US_O# US_O# US_O# US_O# US_O# Place R near to PH R0./F_ US_O0_# [] US_O_# [] MiniWWN LN [] R_LK_REQ# [0] LK_PH_SR_N [0] LK_PH_SR_P [0] LK_PIE_REQ# [] LK_PIE_LOM# [] LK_PIE_LOM [] LK_PIE_LN_REQ# R_LK_REQ# R LK_PIE_REQ# R LK_PIE_LN_REQ# R0 *0 short *0 short *0 short M J0 J H K K P PIELKRQ# / GPIO LKOUT_PIEN LKOUT_PIEP PIELKRQ# / GPIO LKOUT_PEG N LKOUT_PEG P PEG LKRQ# / GPIO IbexPeak-M_Rev0_ lock Flex XLK_ROMP LKOUTFLEX0 / GPIO LKOUTFLEX / GPIO LKOUTFLEX / GPIO LKOUTFLEX / GPIO F T P T N0 XLK_ROMP LK_FLEX0 LK_FLEX LK_FLEX LK_M_R_ R TP T T 0./F_ R _ +.0V_VTT LK_M_R [] *0P/0V/OG_ *0P/0V/OG_ LK_LP_EUG LK_PI_ FOR EMI SMLERT# SML0LERT# IH_SMLK IH_SMT SM_LK_ME0 SM_T_ME0 SM_LK_ME SM_T_ME SMLLERT# US_O# US_O# US_O# US_O# V_S R R R R R R R R R0 RP 0 0PR-.K 0K_ 0K_.K_.K_.K_.K_.K_.K_ 0K_ V_S V_S US_O0# US_O# US_O# US_O# +V R R R R R R V_S R R0 R00 R R R.K_.K_.K_.K_ 0K_ 0K_ 0K_ 0K_ 0K_ 0K_ 0K_ *0K_ PI_PIRQE# PI_PIRQF# PI_PIRQG# PI_PIRQH# MINILK_REQ# LK_PIE_REQ# LK_PIE_REQ0# R_LK_REQ# LK_PIE_REQ# LK_PIE_LN_REQ# LK_PIE_REQ# PEG_LKREQ# XTL_IN XTL_OUT R *M/F_ Y *MHZ No stuff XTL_IN and XTL_OUT circuitry until integrated G becomes PH POR. V_S *P/0V/OG_ *P/0V/OG_ E--0 MI Termination Voltage Set to Vcc when LOW NV_LE Set to Vcc/ when HIGH +.V NV_LE R *K_ NV_LE R *K_ anbury Technology Enabled NV_LE GNT# R High = Enable Low = isable *K_ 0.0U/0V/XR_ PI_PLTRST# Non-iMT V_S U dd uffers as needed for Loading and fanout concerns. TSZFU(TL,F,T) PLTRST# [,,,0,,,] PI_PIRQ# PI_REQ# PI_PLOK# PI_PERR# +V PI_IRY# PI_PIRQ# PI_REQ# PI_REQ# +V RP 0 0PR-.K RP 0 0PR-.K +V PI_PIRQ# PI_PIRQ# PI_SERR# PI_EVSEL# +V PI_STOP# PI_REQ0# PI_TRY# PI_FRME# R K_ R0 K_ oot IOS Strap PI_GNT0# PI_GNT# PI_GNT0# PI_GNT# oot IOS Location LP Reserved (NN) PI SPI SM_LK_ME SM_T_ME Q0 N00 V_S Q N00 M_LK [,,] M_T [,,] swap override Strap/Top-lock Swap Override jumper GNT# Low = swap override/top-lock Swap Override enabled High = efault PROJET :LL Quanta omputer Inc. Size ocument Number Rev PH / (PI) ustom E Tuesday, January, 00 ate: Sheet of 0

11 UF [,,,,,0,,,,,,,,,,,,,,0,,,,,,,0,,,,,] +V IEX PEK-M (GPIO,VSS_NTF,RSV) [,,,0,,,,0] V_S [,,,,,0,,,0,,] +.0V_VTT [] SIO_EXT_SMI# [] SIO_EXT_SI# [] LN_ISLE# [] SS_ETET# [] S SS [] WLN_OFF# TP [] [] _ON T_OFF# E--0 [] RMRST_TRL_PH [0] WWN_OFF# [] TEMP_LERT# TP PH_GPIO0 SIO_EXT_SMI# SIO_EXT_SI# PH_GPIO PH_GPIO LN_ISLE# PH_GPIO SS_ETET# S SS MOEL_I0 WLN_OFF# PH_GPIO TP_PH_GPIO _ON T_OFF# OR_I0 OR_I OR_I OR_I LK_PIE_REQ# RMRST_TRL_PH R *0 short TEMP_LERT# PH_GPIO SV_SET_UP Y J F0 K T F Y H0 V M V V P H F F MUSY# / GPIO0 TH / GPIO TH / GPIO TH / GPIO GPIO LN_PHY_PWR_TRL / GPIO 0GTE GPIO STGP / GPIO TH0 / GPIO SLOK / GPIO MEM_LE / GPIO GPIO GPIO GPIO STP_PI# / GPIO STLKREQ# / GPIO STGP / GPIO STGP / GPIO SLO / GPIO STOUT0 / GPIO PIELKRQ# / GPIO PIELKRQ# / GPIO STOUT / GPIO STGP / GPIO GPIO MIS PU LKOUT_PIEN LKOUT_PIEP LKOUT_PIEN LKOUT_PIEP LKOUT_LK0_N / LKOUT_PIEN LKOUT_LK0_P / LKOUT_PIEP PEI RIN# PROPWRG THRMTRIP# TP TP TP TP TP TP TP TP TP H H F F U M M G0 T E0 0 W Y Y V V F M SIO_RIN# PH_THRMTRIP#_R R0 _ R _ +.0V_VTT SIO_0GTE [] LK_PU_LK# [] LK_PU_LK [] H_PEI [] SIO_RIN# [] H_PWRGOO [] PM_THRMTRIP# [] PH_GPIO LN_ISLE# PH_GPIO TP_PH_GPIO PH_GPIO LK_PIE_REQ# RMRST_TRL_PH WLN_OFF# SIO_RIN# SIO_0GTE _ON PH_GPIO T_OFF# SIO_EXT_SI# SIO_EXT_SMI# TEMP_LERT# SS_ETET# S SS R R R0 R R0 R R R R R R0 R0 R R R R0 R0 R0 V_S 0K_ 0K_ K_ 0K_ 0K_ 0K_ 0K_ 0K_ +V 0K_ 0K_ 0K_ 0K_ 0K_ 0K_ 0K_ 0K_ 0K_ 0K_ TP0 N VSS_NTF_ VSS_NTF_ VSS_NTF_ 0 VSS_NTF_ VSS_NTF_ VSS_NTF_ VSS_NTF_ VSS_NTF_ VSS_NTF_ VSS_NTF_0 E VSS_NTF_ E VSS_NTF_ F VSS_NTF_ F VSS_NTF_ H VSS_NTF_ H VSS_NTF_ H VSS_NTF_ H VSS_NTF_ J VSS_NTF_ J VSS_NTF_0 J VSS_NTF_ J VSS_NTF_ J VSS_NTF_ J0 VSS_NTF_ J VSS_NTF_ J VSS_NTF_ VSS_NTF_ VSS_NTF_ VSS_NTF_ E VSS_NTF_0 E VSS_NTF_ IbexPeak-M_Rev0_ NTF RSV TP TP TP TP TP TP TP TP TP N_ N_ N_ N_ N_ INIT_V# TP J K K M N M0 N0 H T P 0 oard I oard I For Function SV SIV SIT SVT +V SOVP R *0K_ OR_I0 R 0K_ R0 *0K_ OR_I R0 0K_ R *0K_ OR_I R 0K_ R *0K_ OR_I R 0K_ I GPIO I GPIO I GPIO I0 GPIO Model I Model I efault LL/LL LL/LL MOEL_I0 MOEL_I [] MOEL_I MOEL_I0 E--0 +V +V R SV_SET_UP R 0K_ *0K_ R +V R 0K_ R *0K_ 0K_ SV_SET_UP -X High = Strong (efault) PROJET :LL Quanta omputer Inc. Size ocument Number Rev ustom PH / (GPIO) E ate: Tuesday, January, 00 Sheet of

12 VccORE : m max +.0V_VTT +.0V_VTT 0U/.V/XR_ U/.V/XR_ Vcc_ : m max TP0 0U/.V/XR_ TP U/.V/XR_ U/.V/XR_ +V U/.V/XR_ VccIO : 0m max +.0V_VTT +V.0LN_VPLL_EXP U/.V/XR_ 0.U/0V/XR_ +.V +V.0LN_VPLL_FI +.0V_VTT +.0V_VTT UG VORE[] VORE[] VORE[] VORE[] VORE[] F VORE[] F VORE[] F0 VORE[] F VORE[] H VORE[0] H VORE[] H0 VORE[] H VORE[] J0 VORE[] J VORE[] K VIO[] J VPLLEXP N0 VIO[] N VIO[] N VIO[] N VIO[] N VIO[] N VIO[0] J VIO[] J VIO[] T VIO[] T VIO[] U VIO[] U VIO[] V VIO[] V VIO[] W VIO[] W VIO[0] VIO[] VIO[] VIO[] VIO[] VIO[] VIO[] VIO[] VIO[] E VIO[] E VIO[0] G VIO[] G VIO[] H VIO[] N0 VIO[] N VIO[] N V_[] T VVRM[] J VFIPLL M VIO[] POWER V ORE PI E* FI RT LVS HVMOS MI NN / SPI IbexPeak-M_Rev0_ R *0 short +.0LN_V U/.V/XR_ +.0LN_V U/.V/XR_ V[] V[] VSS_[] VSS_[] VLVS VSS_LVS VTX_LVS[] VTX_LVS[] VTX_LVS[] VTX_LVS[] V_[] V_[] V_[] VVRM[] VMI[] VMI[] VPNN[] VPNN[] VPNN[] VPNN[] VPNN[] VPNN[] VPNN[] VPNN[] VPNN[] VME_[] VME_[] VME_[] VME_[] E0 E F F H H P P T T T T U M K K0 K K K M M M M M P P +V 0.0U/V/XR_ +V 0.U/0V/XR_ VccVRM : m max PH_VMI +.V U/.V/XR_ +.V VccMI : m max R *0 short +.0V_VTT VccPNN : m max 0.U/0V/XR_ VccME_ : m max +V 0.U/0V/XR_ VccPLL : m max U/.V/XR_ VccPLL : m max U/.V/XR_ 0U/0V/XR_ L 0ohm@00MHz 0.U/0V/XR_ Vcc : m max +V VccLN : 0m max +.0V_VTT V_PU_IO : <m max +.0V_VTT VccME : m max +.0V_VTT U/.V/XR_ +.0V_VTT R U/.V/XR_.U/0V/XR_ +VRT VccRT : m max TP0 +V.0LN_V_LK *0 short +.0V_PH_VLN U/.V/XR_ U/.V/XR_ +VRTEXT 0.U/0V/XR_ +.V 0 U/.V/XR_ 0 U/.V/XR_ V_S +V 0.U/0V/XR_ +.0LN_V +.0LN_V 0.U/0V/XR_ PSUSYP 0.U/0V/XR_ U/.V/XR_ +VSST +V.0LN_INT_VSUS 0 0.U/0V/XR_ 0.U/0V/XR_ U/.V/XR_ U/.V/XR_ 0.U/0V/XR_ 0 0.U/0V/XR_ 0.U/0V/XR_ P P F F Y0 F F F V V V Y Y Y V U H J H F H F V Y P U U0 U V V Y T U 0.U/0V/XR_ UJ [,,,,,0,,,,,,,,,,,,,,0,,,,,,,0,,,,,] [,,,0,,,,0] VLK[] VLK[] VLN[] VLN[] PSUSYP VME[] VME[] VME[] VME[] VME[] VME[] VME[] VME[] VME[] VME[0] VME[] VME[] PRT VVRM[] VPLL[] VPLL[] VPLL[] VPLL[] VIO[] VIO[] VIO[] VIO[] VIO[] VIO[] PSST PSUS VSUS_[] VSUS_[0] VSUS_[] VSUS_[] V_[] V_[] V_[] V_PU_IO[] V_PU_IO[] VRT IbexPeak-M_Rev0_ POWER lock and Miscellaneous RT PU PI/GPIO/LP ST PI/GPIO/LP US H VIO[] VIO[] VIO[] VIO[] VSUS_[] VSUS_[] VSUS_[] VSUS_[] VSUS_[] VSUS_[] VSUS_[] VSUS_[] VSUS_[] VSUS_[0] VSUS_[] VSUS_[] VSUS_[] VSUS_[] VSUS_[] VSUS_[] VSUS_[] VSUS_[] VSUS_[] VSUS_[0] VSUS_[] VSUS_[] VSUS_[] VSUS_[] VSUS_[] VSUS_[] VSUS_[] VSUS_[] VIO[] VREF_SUS VREF V_[] V_[] V_[0] V_[] V_[] V_[] V_[] VSTPLL[] VSTPLL[] VIO[] VVRM[] VIO[0] VIO[] VIO[] VIO[] VIO[] VIO[] VIO[] VIO[] VIO[] VIO[] VIO[0] VME[] VME[] VME[] VME[] VSUSH V V Y Y V U U U P P N N M M L L J J H H G G F F E E U V F K J L M N P U K K H T0 H 0 F F0 F H0 0 Y Y L0 [,0] [,,,,,,,,,,0,] PH_VREF_SUS U/0V/XR_ PH_VREF U/0V/XR_ +V.0LN_VPLL +V._._H_IO U/.V/XR_ +V V_S V_S +V [,,,,,0,,,0,,] +.0V_VTT [,0,,,0,] +.V [,] +VRT +.0V_VTT +.V +.0V_VTT VREF_SUS : <m max R 00_ V_S R00V-0 V_S VREF : <m max +V +.0V_VTT +V +V VccSUSH : m max *0 short V_S +.0V_VTT 00 U/.V/XR_ VccSUS_ : m max V_S U/V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ U/.V/XR_ R 00_ R00V-0 R TP PROJET :LL Quanta omputer Inc. Size ocument Number Rev PH / (POWER) ustom E Tuesday, January, 00 ate: Sheet of

13 Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET :LL PH / (GN) E ustom Tuesday, January, 00 Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET :LL PH / (GN) E ustom Tuesday, January, 00 Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET :LL PH / (GN) E ustom Tuesday, January, 00 IEX PEK-M (GN) VSS[] Y VSS[0] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[0] G VSS[] VSS[] VSS[] 0 VSS[] VSS[] 0 VSS[] VSS[] VSS[] VSS[] VSS[0] VSS[] 0 VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] 0 VSS[] VSS[0] VSS[] H VSS[] VSS[] VSS[] VSS[] E VSS[] E VSS[] E0 VSS[] E VSS[] E0 VSS[00] E VSS[0] E VSS[0] E VSS[0] E VSS[0] E VSS[0] E0 VSS[0] E VSS[0] E VSS[0] F VSS[0] F VSS[0] F VSS[] G VSS[] G VSS[] G VSS[] G0 VSS[] H VSS[] H VSS[] H VSS[] H VSS[] H VSS[0] H VSS[] H VSS[] H VSS[] H VSS[] H VSS[] VSS[] 0 VSS[] VSS[] E VSS[] E VSS[0] E0 VSS[] E VSS[] E0 VSS[] E VSS[] E VSS[] E VSS[] E VSS[] E VSS[] K VSS[] K VSS[] L VSS[] L VSS[] L VSS[] L VSS[0] L VSS[] L VSS[] L0 VSS[] L VSS[] M VSS[] M VSS[] M0 VSS[] N VSS[] M VSS[] M VSS[0] M VSS[] M VSS[] M VSS[] M VSS[] M VSS[] N VSS[] P VSS[] P VSS[] P0 VSS[0] P VSS[] P VSS[] P VSS[] P VSS[] P VSS[] R VSS[] R VSS[] T VSS[] T VSS[] T VSS[00] T VSS[0] T VSS[0] T VSS[0] U0 VSS[0] U VSS[0] U VSS[0] U VSS[0] P VSS[0] V VSS[0] P VSS[0] V VSS[] V0 VSS[] V VSS[] V0 VSS[] V VSS[] V VSS[] V VSS[] E VSS[] E VSS[0] F VSS[] F VSS[] G0 VSS[] G VSS[] G VSS[] G VSS[] G VSS[] G VSS[] G VSS[] G0 VSS[0] G VSS[] G VSS[] V VSS[] V VSS[] V VSS[0] V VSS[] V VSS[] V VSS[] V VSS[] V VSS[] V VSS[] V VSS[] W VSS[] W VSS[] Y VSS[0] Y VSS[] Y VSS[] Y VSS[] Y VSS[] Y VSS[] Y0 VSS[] Y VSS[] Y VSS[] Y VSS[] Y VSS[0] Y VSS[] Y VSS[] Y VSS[] Y VSS[] P VSS[] P VSS[] VSS[] F VSS[] H VSS[] H0 VSS[] H0 VSS[] H VSS[] H VSS[] H VSS[] T VSS[] VSS[] T VSS[] VSS[0] Y VSS[] T VSS[] M VSS[] T VSS[] M VSS[] K VSS[] K VSS[] V VSS[] K VSS[] K VSS[] H VSS[0] H VSS[] J UI IbexPeak-M_Rev0_ UI IbexPeak-M_Rev0_ VSS[] VSS[] 0 VSS[] VSS[] VSS[] VSS[] VSS[] 0 VSS[] VSS[0] VSS[] VSS[] VSS[] VSS[] 0 VSS[] VSS[] VSS[] VSS[] VSS[] VSS[0] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] 0 VSS[] VSS[0] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] E VSS[] E VSS[] F VSS[] F VSS[] P VSS[] F VSS[] F VSS[] F VSS[] F VSS[0] F VSS[] G VSS[] G VSS[] H VSS[] H VSS[] H VSS[] H VSS[] H VSS[] H VSS[0] H VSS[] H VSS[] J VSS[] J VSS[] J0 VSS[] J VSS[] J VSS[] J VSS[] J VSS[] J VSS[0] J VSS[] T VSS[] J VSS[] K VSS[] K VSS[] K VSS[] K VSS[] K VSS[0] K0 VSS[] K VSS[] K VSS[] K VSS[] K VSS[] K VSS[] K VSS[] K VSS[] K VSS[] K VSS[0] K VSS[] L VSS[] L VSS[] M VSS[] M0 VSS[] M VSS[] M VSS[] M VSS[00] M VSS[0] M0 VSS[0] M VSS[0] M VSS[0] M VSS[0] M VSS[0] M VSS[0] M VSS[0] M VSS[0] U0 VSS[] M VSS[] V VSS[] M VSS[] M VSS[] 0 VSS[] N VSS[] N0 VSS[] N VSS[0] P VSS[] P VSS[] P VSS[] P VSS[] P VSS[] P VSS[] R VSS[] R VSS[] T VSS[] T VSS[] T VSS[] T VSS[] T VSS[] T VSS[] V VSS[] V VSS[] V0 VSS[] V VSS[0] V0 VSS[] V VSS[] V VSS[] V VSS[] V VSS[] V VSS[] V VSS[] V VSS[] W VSS[] W VSS[0] W VSS[] F VSS[] W VSS[] W VSS[] W0 VSS[] W VSS[] Y VSS[] Y VSS[] Y VSS[0] Y VSS[] U VSS[] N VSS[] 0 VSS[0] VSS[] V VSS[] U VSS[] M VSS[] M VSS[] N VSS[] H VSS[] VSS[0] H VSS[0] VSS[] VSS[] UH IbexPeak-M_Rev0_ UH IbexPeak-M_Rev0_

14 M 0 M M M M M M 0 M M M M M M M M M M M0 M M M M M M M M M M M M M M M QS0 M QS M QS M QS M QS M QS M QS M QS M QS#0 M QS# M QS# M QS# M QS# M QS# M QS# M QS# M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q M Q M Q M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q M Q M Q M Q0 M Q M Q M Q M Q M Q0 M Q M Q M Q IMM0_S0 IMM0_S PM_EXTTS#0 PM_EXTTS#0 M [:0] [] M S#0 [] M S# [] M S# [] M S#0 [] M S# [] M LK0 [] M LK0# [] M LK [] M LK# [] M KE0 [] M KE [] M S# [] M RS# [] M WE# [] M QS[:0] [] M QS#[:0] [] M M[:0] [] M OT0 [] M OT [] M Q[:0] [] R_RMRST# [,] PM_EXTTS#0 [,] LK_SLK [,] LK_ST [,] R_VREF_Q0 [] VPU [,,0,,,,] +V [,,,,,0,,,,,,,,,,,,,,0,,,,,,,0,,,,,] VSUS [,,,0,] 0.VSMR_VTERM [,0,] SMR_VREF_IMM [].VSUS [,,0,,].VSUS +V.VSUS 0.VSMR_VTERM SMR_VREF_IMM +V.VSUS 0.VSMR_VTERM SMR_VREF_IMM SMR_VREF_IMM +V SMR_VREF_Q0 SMR_VREF_Q0 SMR_VREF_Q0 SMR_VREF Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET :LL R IMM-0(H=.) E ustom Tuesday, January, 00 Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET :LL R IMM-0(H=.) E ustom Tuesday, January, 00 Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET :LL R IMM-0(H=.) E ustom Tuesday, January, 00 Place these aps near So-imm0..U/.V/XR_.U/.V/XR_ 0 0.U/0V/XR_ 0 0.U/0V/XR_.U/.V/XR_.U/.V/XR_ R *0K_ R *0K_ 0.U/.V/XR_ 0.U/.V/XR_ 0U/.V/XR_ 0U/.V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ R0 *0K/F_ R0 *0K/F_ 0.U/0V/XR_ 0.U/0V/XR_ 0U/.V/XR_ 0U/.V/XR_ 0P/0V/XR_ 0P/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 0 0U/.V/XR_ 0 0U/.V/XR_ 0 0U/.V/XR_ 0 0U/.V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ R *0 short R *0 short 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ U/.V/XR_ U/.V/XR_ R *0K/F_ R *0K/F_ 0U/.V/XR_ 0U/.V/XR_ 0 0U/.V/XR_ 0 0U/.V/XR_ 0 0 0/P 0 /# S0# S# K0 0 K0# 0 K 0 K# 0 KE0 KE S# RS# 0 WE# S0 S 0 SL 0 S 00 OT0 OT 0 M0 M M M M M M 0 M QS0 QS QS QS QS QS QS QS QS#0 0 QS# QS# QS# QS# QS# QS# QS# Q0 Q Q Q Q Q Q Q Q Q Q0 Q Q Q Q Q Q Q Q Q Q0 0 Q Q 0 Q Q Q Q Q Q Q Q0 Q 0 Q Q Q Q Q 0 Q Q 0 Q Q0 Q Q Q Q Q Q Q 0 Q Q Q0 Q Q Q Q Q Q Q Q Q Q0 0 Q Q Q P00 R SRM SO-IMM (0P) N R-IMM0/H=/Standard P00 R SRM SO-IMM (0P) N R-IMM0/H=/Standard R 0K/F_ R 0K/F_ R0 *0 short R0 *0 short 0.U/0V/XR_ 0.U/0V/XR_ V V V V V V V V V V0 00 V 0 V 0 V V V V V V VSP N N NTEST EVENT# RESET# 0 VREF_Q VREF_ VSS VSS VSS VSS VSS VSS VSS VSS 0 VSS VSS0 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS0 VSS 0 VSS VSS VSS VSS VSS VSS VSS VSS VSS0 VSS VSS VSS VSS VSS 0 VSS VSS VSS VSS VSS0 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS0 0 VSS VSS VTT 0 VTT 0 G G G G P00 R SRM SO-IMM (0P) N R-IMM0/H=/Standard P00 R SRM SO-IMM (0P) N R-IMM0/H=/Standard U/.V/XR_ U/.V/XR_ U/.V/XR_ U/.V/XR_ 0U/.V/XR_ 0U/.V/XR_ 0 0U/.V/XR_ 0 0U/.V/XR_ R0 0K/F_ R0 0K/F_ 0U/.V/XR_ 0U/.V/XR_ R0 *0_ R0 *0_ U/.V/XR_ U/.V/XR_

15 M 0 M M M M M M 0 M M M M M M M M M M M0 M M M M M M M M M M M M M M M QS0 M QS M QS M QS M QS M QS M QS M QS M QS#0 M QS# M QS# M QS# M QS# M QS# M QS# M QS# M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q M Q M Q M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q M Q M Q M Q0 M Q M Q M Q M Q M Q0 M Q M Q M Q IMM_S0 IMM_S PM_EXTTS# PM_EXTTS# R_THERM PM_EXTTS# LK_SLK LK_ST PM_EXTTS#0 R_THERM M [:0] [] M S#0 [] M S# [] M S# [] M S#0 [] M S# [] M LK0 [] M LK0# [] M LK [] M LK# [] M KE0 [] M KE [] M S# [] M RS# [] M WE# [] M QS[:0] [] M QS#[:0] [] M M[:0] [] M OT0 [] M OT [] M Q[:0] [] R_RMRST# [,] PM_EXTTS# [] LK_SLK [,] LK_ST [,] R_VREF_Q [] +V [,,,,,0,,,,,,,,,,,,,,0,,,,,,,0,,,,,] VSUS [,,,0,] 0.VSMR_VTERM [,0,] SMR_VREF_IMM [].VSUS [,,0,,] PM_EXTTS#0 [,].VSUS +V 0.VSMR_VTERM SMR_VREF_IMM +V.VSUS 0.VSMR_VTERM SMR_VREF_IMM +V +V SMR_VREF_Q SMR_VREF_Q SMR_VREF_IMM SMR_VREF_Q +V Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET :LL R IMM-(H=.) E ustom Tuesday, January, 00 Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET :LL R IMM-(H=.) E ustom Tuesday, January, 00 Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET :LL R IMM-(H=.) E ustom Tuesday, January, 00 Place these aps near So-imm. 0U/.V/XR_ 0U/.V/XR_ 0 0.U/0V/XR_ 0 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ Q *MMT0--F Q *MMT0--F 0 0.U/0V/XR_ 0 0.U/0V/XR_ 0U/.V/XR_ 0U/.V/XR_.U/.V/XR_.U/.V/XR_ 0 0 0/P 0 /# S0# S# K0 0 K0# 0 K 0 K# 0 KE0 KE S# RS# 0 WE# S0 S 0 SL 0 S 00 OT0 OT 0 M0 M M M M M M 0 M QS0 QS QS QS QS QS QS QS QS#0 0 QS# QS# QS# QS# QS# QS# QS# Q0 Q Q Q Q Q Q Q Q Q Q0 Q Q Q Q Q Q Q Q Q Q0 0 Q Q 0 Q Q Q Q Q Q Q Q0 Q 0 Q Q Q Q Q 0 Q Q 0 Q Q0 Q Q Q Q Q Q Q 0 Q Q Q0 Q Q Q Q Q Q Q Q Q Q0 0 Q Q Q P00 R SRM SO-IMM (0P) N R-IMM/H=./Standard P00 R SRM SO-IMM (0P) N R-IMM/H=./Standard 0.U/0V/XR_ 0.U/0V/XR_ V V V V V V V V V V0 00 V 0 V 0 V V V V V V VSP N N NTEST EVENT# RESET# 0 VREF_Q VREF_ VSS VSS VSS VSS VSS VSS VSS VSS 0 VSS VSS0 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS0 VSS 0 VSS VSS VSS VSS VSS VSS VSS VSS VSS0 VSS VSS VSS VSS VSS 0 VSS VSS VSS VSS VSS0 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS0 0 VSS VSS VTT 0 VTT 0 G G G G P00 R SRM SO-IMM (0P) N R-IMM/H=./Standard P00 R SRM SO-IMM (0P) N R-IMM/H=./Standard R *0K_ R *0K_ V XP XN GN SLK S LERT# OVERT# U *G0PU U *G0PU 0 *0.0U/V/XR_ 0 *0.0U/V/XR_ 0 0U/.V/XR_ 0 0U/.V/XR_ 0 0.U/0V/XR_ 0 0.U/0V/XR_ 0U/.V/XR_ 0U/.V/XR_ *00P/0V/XR_ *00P/0V/XR_.U/.V/XR_.U/.V/XR_ 0U/.V/XR_ 0U/.V/XR_ U/.V/XR_ U/.V/XR_ R0 0K/F_ R0 0K/F_ R 0K/F_ R 0K/F_ 0U/.V/XR_ 0U/.V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ R0 *0_ R0 *0_ 0 0U/.V/XR_ 0 0U/.V/XR_.U/.V/XR_.U/.V/XR_ U/.V/XR_ U/.V/XR_ R0 *0 short R0 *0 short 0U/.V/XR_ 0U/.V/XR_ 0U/.V/XR_ 0U/.V/XR_ U/.V/XR_ U/.V/XR_ 0 0.U/0V/XR_ 0 0.U/0V/XR_ U/.V/XR_ U/.V/XR_

16 [,,,,,0,,,,,,,,,,,,,,0,,,,,,,0,,,,,] +V [,,0,] +.0V_GFX_PIE [,0,] +V_GFX_ORE +V +.0V_GFX_PIE U PG-NVII-GEFORE0 EV@N0M R 0K_ E 0U/.V/XR_ U/.V/XR_.U/.V/XR_ U/.V/XR_ U/.V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ F G Place near GPU Place Under GPU +.0V_GFX_PIE 0 0U/.V/XR_ U/.V/XR_.U/.V/XR_ U/.V/XR_ U/.V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ E F G Place near GPU Place Under GPU +V_GFX_ORE J0 J J 0 J L 0.U/0V/XR_ 0.U/0V/XR_ 0.0U/V/XR_ 0.0U/V/XR_ 0.0U/V/XR_ 0.0U/V/XR_ M M M N N N N N N 0 N N 0.0U/V/XR_ 0.0U/V/XR_ 0.0U/V/XR_ 0.0U/V/XR_ 0.0U/V/XR_ N P P P P P P P R R R 0.0U/V/XR_ 0.0U/0V/XR_ 0.0U/0V/XR_ 0.0U/0V/XR_ U/.V/XR_ R R R R R Place Under GPU T T T U U W0.U/.V/XR_ 0U/.V/XR_ 0U/.V/XR_ W W W W W.U/.V/XR_ +.0V_GFX_PIE L 0nH_ 0.U/.V/XR_.U/.V/XR_ U/.V/XR_ Place near GPU W W +V Place near GPU Place Under GPU 0 U/.V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ E F +PEX_PLLV F 0 R *00_ E0 U/.V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ F0 G +V PEX_TERMP G0 PEX_IOV_0 PEX_IOV_0 PEX_IOV_0 PEX_IOV_0 PEX_IOV_0 PEX_IOV_0 PEX_IOVQ_0 PEX_IOVQ_0 PEX_IOVQ_0 PEX_IOVQ_0 PEX_IOVQ_0 PEX_IOVQ_0 PEX_IOVQ_0 PEX_IOVQ_0 PEX_IOVQ_0 PEX_IOVQ_0 PEX_IOVQ_ PEX_IOVQ_ V_0 V_0 V_0 V_0 V_0 V_0 V_0 V_0 V_0 V_0 V_ V_ V_ V_ V_ V_ V_ V_ V_ V_0 V_ V_ V_ V_ V_ V_ V_ V_ V_ V_0 V_ V_ V_ V_ V_ V_ V_ V_ V_ V_0 V_ V_ V_ V_SENSE GN_SENSE V_0 V_0 V_0 V_0 V_0 V_0 PEX_PLLV PEX_TSTLK_OUT_N PEX_TSTLK_OUT PEX_SV_V PEX_TERMP / PI_EXPRESS PEX_LKREQ_N PEX_RST_N PEX_REFLK PEX_REFLK_N PEX_TX0 PEX_TX0_N PEX_TX PEX_TX_N PEX_TX PEX_TX_N PEX_TX PEX_TX_N PEX_TX PEX_TX_N PEX_TX PEX_TX_N PEX_TX PEX_TX_N PEX_TX PEX_TX_N PEX_TX PEX_TX_N PEX_TX PEX_TX_N PEX_TX0 PEX_TX0_N PEX_TX PEX_TX_N PEX_TX PEX_TX_N PEX_TX PEX_TX_N PEX_TX PEX_TX_N PEX_TX PEX_TX_N PEX_RX0 PEX_RX0_N PEX_RX PEX_RX_N PEX_RX PEX_RX_N PEX_RX PEX_RX_N PEX_RX PEX_RX_N PEX_RX PEX_RX_N PEX_RX PEX_RX_N PEX_RX PEX_RX_N PEX_RX PEX_RX_N PEX_RX PEX_RX_N PEX_RX0 PEX_RX0_N PEX_RX PEX_RX_N PEX_RX PEX_RX_N PEX_RX PEX_RX_N PEX_RX PEX_RX_N PEX_RX PEX_RX_N E E E E F G G F E E F G G F E E F G G F E E F G G F E E F G F G G F E PEX_LKREQ_N VG_RST# LK_PIE_VG LK_PIE_VG# PEG RXP0 PEG RXN0 PEG RXP PEG RXN PEG RXP PEG RXN PEG RXP PEG RXN PEG RXP PEG RXN PEG RXP PEG RXN PEG RXP PEG RXN PEG RXP PEG RXN PEG RXP PEG RXN PEG RXP PEG RXN PEG RXP0 PEG RXN0 PEG RXP PEG RXN PEG RXP PEG RXN PEG RXP PEG RXN PEG RXP PEG RXN PEG RXP PEG RXN PEG_TXP0 PEG_TXN0 PEG_TXP PEG_TXN PEG_TXP PEG_TXN PEG_TXP PEG_TXN PEG_TXP PEG_TXN PEG_TXP PEG_TXN PEG_TXP PEG_TXN PEG_TXP PEG_TXN PEG_TXP PEG_TXN PEG_TXP PEG_TXN PEG_TXP0 PEG_TXN0 PEG_TXP PEG_TXN PEG_TXP PEG_TXN PEG_TXP PEG_TXN PEG_TXP PEG_TXN PEG_TXP PEG_TXN R *0 short 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ PEG_TXP0 [] PEG_TXN0 [] PEG_TXP [] PEG_TXN [] PEG_TXP [] PEG_TXN [] PEG_TXP [] PEG_TXN [] PEG_TXP [] PEG_TXN [] PEG_TXP [] PEG_TXN [] PEG_TXP [] PEG_TXN [] PEG_TXP [] PEG_TXN [] PEG_TXP [] PEG_TXN [] PEG_TXP [] PEG_TXN [] PEG_TXP0 [] PEG_TXN0 [] PEG_TXP [] PEG_TXN [] PEG_TXP [] PEG_TXN [] PEG_TXP [] PEG_TXN [] PEG_TXP [] PEG_TXN [] PEG_TXP [] PEG_TXN [] PEG_LKREQ# [0] PLTRST# [,0,,0,,,] LK_PIE_VG [0] LK_PIE_VG# [0] PEG_RXP0 [] PEG_RXN0 [] PEG_RXP [] PEG_RXN [] PEG_RXP [] PEG_RXN [] PEG_RXP [] PEG_RXN [] PEG_RXP [] PEG_RXN [] PEG_RXP [] PEG_RXN [] PEG_RXP [] PEG_RXN [] PEG_RXP [] PEG_RXN [] PEG_RXP [] PEG_RXN [] PEG_RXP [] PEG_RXN [] PEG_RXP0 [] PEG_RXN0 [] PEG_RXP [] PEG_RXN [] PEG_RXP [] PEG_RXN [] PEG_RXP [] PEG_RXN [] PEG_RXP [] PEG_RXN [] PEG_RXP [] PEG_RXN [] R.K/F_ U_GPU_NS_.U/.V/XR_ 0.U/0V/XR_ 0.0U/V/XR_ Place near GPU Place Under GPU PROJET :LL Quanta omputer Inc. Size ocument Number Rev ustom NV0N(PIE I/F) / E ate: Tuesday, January, 00 Sheet of

17 F_EUG F_L_TERM_GN F_L_PU_GN F_L_P_VQ +F_VREF M_QS#[..0] M_QM#[..0] M_QS[..0] M_M[..0] M_QS# M_QS M_M M_M M_M0 M_M0 M_QS#0 M_QM#0 M_QS# M_M M_QS M_M M_M M_M M_QS# M_M M_M M_M M_M M_QM# M_M M_QS# M_M M_M M_M M_QM# M_M0 M_QS# M_M M_M0 M_M M_M M_M M_M M_QM# M_QS# M_M M_M M_M M_M M_M M_QM# M_M M_M M_M0 M_M M_M M_M M_QM# M_M M_M M_M M_M M_M M_QS M_QM# M_M M_M M_M0 M_M M_M M_QS M_QM# M_QS# M_M M_QS0 M_M0 M_M M_M M_M M_M M_QS M_M M_M M_M M_M M_QS M_M M_M M_M M_M M_M M_M M_QS M_M M_M M_M M_M M_M M_M M_M M_M0 M_M +F_PLLV M_M [] M_M [] M_M [] M_M [] M_M [] LK [] LK# [] LK0# [] LK0 [] M_M [] M_M [] M_M [] M_M [] M_M [] M_M0 [] M_M [] M_M [] M_M [] M_M0 [] M_M [] M_M [] M_M0 [] M_M [] M_M [] M_M [] M_M [] M_M [] M_M [] M_M0 [] M_M [] M_M [] M_M [] M_M [] M_M [] M_M [] M_QM#[..0] [] M_M[..0] [] M_QS[..0] [] M_QS#[..0] [] +.V [,,0,,,,,] +.V +.V +.0V_GFX_PIE +.V +.V +F_PLLV +.V Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET :LL N0M (MEMORY I/F) / E ustom Tuesday, January, 00 Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET :LL N0M (MEMORY I/F) / E ustom Tuesday, January, 00 Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET :LL N0M (MEMORY I/F) / E ustom Tuesday, January, 00 mils width mils width Place Under GPU Place near GPU Place near GPU Place Under GPU R 0./F_ R 0./F_.U/.V/XR_.U/.V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 00 0.U/.V/XR_ 00 0.U/.V/XR_ 0 0.0U/V/XR_ 0 0.0U/V/XR_ R 0K_ R 0K_ L KP0HS_ L KP0HS_ R0 0K_ R0 0K_.U/.V/XR_.U/.V/XR_ R0 0./F_ R0 0./F_ R 0K_ R 0K_ 0.0U/V/XR_ 0.0U/V/XR_ U/.V/XR_ U/.V/XR_ 0.0U/V/XR_ 0.0U/V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 0.0U/V/XR_ 0.0U/V/XR_ 0.U/.V/XR_ 0.U/.V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ *0.U/0V/XR_ *0.U/0V/XR_ R00 0./F_ R00 0./F_ R0 *0./F_ R0 *0./F_ R0 0K_ R0 0K_ R *K/F_ R *K/F_ R *K/F_ R *K/F_ F_VREF F_QS_RN F_QS_RN Y F_QS_RN R F_QS_RN R F_QS_RN F_QS_RN E F_QS_RN F_QS_RN0 F_QS_WP F_QS_WP F_QS_WP T F_QS_WP T F_QS_WP F_QS_WP E F_QS_WP F_QS_WP0 F_QM F_QM F_QM T F_QM T F_QM F_QM F_QM F_QM0 F_ F_ F_ F_0 F_ F_ W F_ W F_ W F_ F_ F_ F_ F_ W F_0 W F_ W F_ V F_ V F_ V F_ V F_ T F_ R F_ R F_ N F_0 N F_ V F_ V F_ U F_ T F_ R F_ R F_ P F_ P F_ F_0 F_ F_ F_ F_ F_ F_ F_ F F_ E F_ F0 F_0 0 F_ F F_ F_ E F_ F_ F_ F_ F_ F_ F_0 E F_ E F_ F_ F_ F_ F_ F_ F_ F_ F_0 F_LLV T F_PLLV R F_EUG M F_L_TERM_GN F_L_PU_GN F_L_P_VQ F_LK_N N F_LK N F_LK0_N F F_LK0 F F_MO0 L F_MO J F_M K F_M M F_M G F_M G F_M J F_M F F_M H F_M M F_M0 H F_M K F_M G F_M K F_M K F_M L F_M G F_M K F_M M F_M J F_M0 G F_M G F_M J F_M J F_M K F_M M F_M N F_M M F_M F F_M J F_M0 F FVQ_ Y FVQ_ U FVQ_ N FVQ_ M FVQ_ L FVQ_ L FVQ_0 L FVQ_ J FVQ_ J FVQ_ J FVQ_ J FVQ_ H FVQ_ H FVQ_ F FVQ_ F FVQ_ F FVQ_0 F FVQ_0 F FVQ_0 F FVQ_0 F FVQ_0 E FVQ_0 FVQ_0 FVQ_0 FVQ_0 FVQ_0 / FRME_UFFER S for GR designs U PG-NVII-GEFORE0 EV@N0M U_GPU_NS_ / FRME_UFFER S for GR designs U PG-NVII-GEFORE0 EV@N0M U_GPU_NS_ 0.U/.V/XR_ 0.U/.V/XR_ R 0K_ R 0K_

18 UF PG-NVII-GEFORE0 / IFP IFP_TX0_N IFP_TX0 V V L_0- [] L_0+ [] [,,,,,0,,,,,,,,,,,,,,0,,,,,,,0,,,,,] +V [,,0,] +.0V_GFX_PIE [,0,,,0,] +.V +.0V_GFX_PIE L KP0HS_.U/.V/XR_ U/.V/XR_ Place near GPU +IFP_PLLV R0 K/F_ IFP_PLLV IFP_RSET T IFP_TX_N IFP_TX IFP_TX_N IFP_TX IFP_TX_N IFP_TX IFP_TX_N IFP_TX Y W V W L_- [] L_+ [] L_- [] L_+ [] L_0- [] L_0+ [] +.0V_GFX_PIE L KP0HS_.U/.V/XR_ 0 U/.V/XR_ 0.U/0V/XR_ +IFP_IOV 0.U/0V/XR_ R K/F_ UG EV@N0M PG-NVII-GEFORE0 / IFP N IFP_PLLV M IFP_RSET IFP_UX_S_N IFP_UX_SL +.V L KP0HS_ 0 +IFP_IOV V V IFP_IOV IFP_IOV IFP_TX_N IFP_TX IFP_TX_N IFP_TX W W L_- [] L_+ [] L_- [] L_+ [] Place near GPU Place Under GPU +IFPE_IOV H IFPE_IOV IFP_L_N IFP_L IFP_L_N IFP_L IFP_L_N IFP_L E.U/.V/XR_ U/.V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ IFP_TX_N IFP_TX R 0K_ IFP_L0_N IFP_L0 F F Place near GPU Place Under GPU LOK IFP_TX_N IFP_TX L_LK- [] L_LK+ [] U_GPU_NS_ IFP_TX_N IFP_TX L_LK- [] L_LK+ [] U_GPU_NS_ +V L KP0HS_.U/.V/XR_ U/.V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ +IFP_PLLV P R 0.U/0V/XR_ R K/F_ UH EV@N0M PG-NVII-GEFORE0 / IFP IFP_PLLV IFP_RSET IFP_UX_S_N IFP_UX_SL isplay port output G P_UX- G P_UX+ P_L- P_L+ P_L- P_L U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ P_TXN [] P_TXP [] P_TXN [] P_TXP [] +.0V_GFX_PIE L Place near GPU KP0HS_ 0.U/.V/XR_ U/.V/XR_ Place Under GPU 0.U/0V/XR_ +IFP_IOV 0.U/0V/XR_ J IFP_IOV TX TX TX0 TX0 TX TX TX TX IFP_L_N IFP_L IFP_L_N IFP_L IFP_L_N IFP_L IFP_L0_N IFP_L0 J H K L M M N P P_L- P_L+ P_L- P_L+ P_L- P_L+ P_L0- P_L0+ P_L- P_L+ P_L0- P_L0+ P_UX- P_UX+ R 00K_ R R R0 00K_ 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ *0 short *0 short E--0 P_TXN [] P_TXP [] P_TX0N [] P_TX0P [] P_UX_N [] P_UX_P [] +V L KP0HS_.U/.V/XR_ Place near GPU 00P/V/XR_ 0 0P/0V/XR_ Place Under GPU 0.U/0V/XR_ +_V _VREF _RSET R /F_ U U_GPU_NS_ EV@N0M PG-NVII-GEFORE0 / G _V _HSYN _VSYN F _VREF E _RSET _RE E _GREEN E _LUE U_GPU_NS_ RT_HSYN_R RT_VSYN_R RT_RE RT_GRN RT_LU R _ R _ R 0/F_ R 0/F_ R 0/F_ lose to GPU RT_HSYN [] RT_VSYN [] RT_RE [] RT_GRN [] RT_LU [] R 0K_ +IFPE_PLLV T F UE PG-NVII-GEFORE0 EV@N0M / IFPE_PLLV IFPE_L0 IFPE_L_N IFPE_L IFPE_RSET IFPE_UX_IY_SL IFPE_UX_IY_S_N E E F G T U_GPU_NS_ +.0V_GFX_PIE L KP0HS_ UK EV@N0M PG-NVII-GEFORE0 Place near GPU Place Under GPU / XTL_PLL +NV_PLLV K PLLV K VI_PLLV.U/.V/XR_ U/.V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ SP_PLLV L SP_PLLV R *0K_ R *0_ XTL_SSIN [] LK_VG_M_SS XTL_SSIN XTL_OUTUFF R *0 short XTLIN [] LK_VG_M_NSS 0 XTL_IN XTL_OUT U_GPU_NS_ E XTLOUT E0 XTLOUT R *0K_ R 0K_ +_V T T W R V U PG-NVII-GEFORE0 EV@N0M / _V _HSYN _VSYN _VREF _RSET _RE _GREEN _LUE U_GPU_NS_ U U T T R Y *MHZ +.0V_GFX_PIE *P/0V/0H_ *P/0V/0H_ L KP0HS_ SP_PLLV U/.V/XR_ U/.V/XR_ Place near GPU PROJET :LL Quanta omputer Inc. Size ocument Number Rev N0M (ISPLY) / ustom E Tuesday, January, 00 ate: Sheet of

19 STRP0 STRP STRP UL PG-NVII-GEFORE0 / MIS ROM_S_N STRP0 STRP ROM_SI STRP ROM_SO ROM_SLK ROM_SI ROM_SO ROM_SLK I RESS: 0xH [,,,,,0,,,,,,,,,,,,,,0,,,,,,,0,,,,,] +V VG THERMIL IRUIT +V +V R R0 0.K/F_ 0.K/F_ STRP_REF_V STRP_REF_MIO F F0 F J STRP_REF_V STRP_REF_MIO N_ N_ N_ N_ IH_SL IH_S UFRST_N TESTMOE GN_N GN_N N F IH_SL IH_S T TESTMOE R R *0K_ 0K_ +V L_T L_LK +V R R R *0_ *0_ *00_ GFX_S GFX_SL +V_THEM *0.U/0V/XR_ U ST SLK V GN *GPUF GN OVT LERT XP XN R *.K_ GFX_OVT# GFX_LERT# *00P/0V/XR_ R R GFX_THM+ GFX_THM- *0_ *0_ VG_OVT# LERT IH_SL IH_S I_SL I_S VG_OVT# LERT GFX_ORE_NTRL0 R R R R R0 R R.K_.K_.K_.K_ 0K_ 0K_ *0K_ U_GPU_NS_ THERML TRE ONSTRINTS Use 0MIL Guard(GN) Trace around THERM and THERM Reserverd as nvidia request UM EV@N0M PG-NVII-GEFORE0 / I_GPIO_THERM_JTG I_SL I_S R T L_LK L_T R R *0 short *0 short RT_LK [] RT_T [] JTG_TRST# I_PWM SLI_SYN PWR_TRL GFX_ORE_NTRL0 GFX_ORE_NTRL [0,,] M_LK [0,,] M_T R R R R0 R R +V +V Q N00 *0K_ 0K_ 0K_ 0K_ 0K_ 0K_ R 0K_ IS_SL E--0 R 0K_ IS_S T T T T T T T GFX_THM- GFX_THM+ JTG_TK JTG_TMS JTG_TI JTG_TO JTG_TRST# IS_SL IS_S IS ddress 0XE F F G E G T T W Y N THERMN THERMP JTG_TK JTG_TMS JTG_TI JTG_TO JTG_TRST_N IS_SL IS_S G_T G_T G_T I_SL I_S I_SL I_S N_ GPIO0 GPIO GPIO GPIO GPIO GPIO GPIO GPIO GPIO GPIO GPIO0 GPIO GPIO GPIO GPIO GPIO GPIO GPIO GPIO GPIO U_GPU_NS_ R R N N G M M K K J M J J K F G G F F I_SL I_S I_SL_ I_S_ T I_PWM GFX_ORE_NTRL0 GFX_ORE_NTRL VG_OVT# LERT SLI_SYN PWR_TRL R _ R _ R *0_ L_LK L_T P_HP [] I_PWM [] ENV [] PNEL_KEN [] GFX_ORE_NTRL0 [] GFX_ORE_NTRL [] VG_TEMP_LERT# [] IFPE_L_N IFPE_L IFPE_L_N IFPE_L 0/ IFPE L_LK [] L_T [] UI EV@N0M PG-NVII-GEFORE0 LL STRP FUNTION MPPING USER[:0]: EI is used GIO_PFG[:0]: 000 Noteook PI_EVI[:0]: 000 SU_VENOR: 0 No Vedio IOS ROM SLOT_LK_LG: GPU N MH USE OMMON REF LOK PEX_PLL_EN_TERM: 0 ISLE PEX_PLL TERMINTION RMFG[:0]: 000 N 00 XLK_: 0 MHz(efault) F_0_R_SIZE: 0 M(efault) SM_LT_R: 0 0xE(efault) VG_EVIE: VG device(efault) ROM_SI P R:0K/F P R:K/F RMFG LSIT: 00 SMSUNG KWGE-H Mb * PS 000 HYNIX HTQGFR- Mb * PS Q N00 IFPE_L0_N U_GPU_NS_ PI_EVI[] / SUVENOR +V GPIO GPIO SSIGNMENTS NX N0X TIVE 0 General Purpose General Purpose I/O N/ Hot Plug etect for IFP Link HP- HP- I N/ Panel acklight righness ontrol L0_L_PWM L0_L_PWM O H (PWM apable) L0_V L0_L_PWM GPU_VI0 L0_V L0_L_PWM GPU_VI0 O O O H H N/ Panel Power Enable Panel acklight ON/OFF GPU_VI0 GPU_VI GPU_VI O N/ GPU_VI GPU_VI/MEM_VI GPU_VI O N/ GPU_VI OVERT OVERT I/O L Thermal Over Temperature FN_PWM/LERT LERT I/O L Thermal lert (PWM apable) 0 MEM_VREF MEM_VREF O N/ Memory VREF Switch SLI_SYN SLI_SYN I/O L SLI SYN0 _ET PWR_LEVEL (in) I N/ Power Level etect PWR_TRL0 MEM_VI (out) O L MEM_VI0 PWR_TRL PWR_TRL O N/ Power Supply ontrol HP-E HP-E I N/ Hot Plug etect for IFP Link E VI_MOE HMI_ETET0 VI_MOE FN_PWM(out) Reserved Reserved O N/ N/ Fan PWM ontrol HMI_ETET HP- I N/ Hot Plug etect for IFP Link I/O Function escription Starps ROM_SO ROM_SLK ROM_SI Strap Strap Strap 0 NX XLK_ TVMOE() TVMOE() TVMOE(0) PI_EVI_EXT SU_VENOR SLOT_LK_FG PEX_PLL_EN_TERM RMFG() RMFG() RMFG() RMFG(0) PI_EVI() PI_EVI() PI_EVI() PI_EVI(0) GIO_PFG() GIO_PFG() GIO_PFG() GIO_PFG(0) USER() USER() USER() USER(0) N0X XLK_ TVMOE() TVMOE() TVMOE(0) RMFG() RMFG() RMFG() RMFG(0) PI_EVI() PI_EVI() PI_EVI() PI_EVI(0) GIO_PFG() GIO_PFG() GIO_PFG() GIO_PFG(0) USER() USER() USER() USER(0) Function escription nm PU K/F ohm 0nm P 0K/F ohm PI_EVI_EXT SU_VENOR nm/0nm P K/F ohm SLOT_LK_FG PEX_PLL_EN_TERM Hynix P K/F ohm Samsung P 0K/F ohm nm PU K/F ohm 0nm/GS PU 0K/F ohm 0nm/GE PU K/F ohm 0nm/NS PU K/F ohm 0nm/NS PU.K/F ohm ROM_SI ROM_SO ROM_SLK Straps STRP0 STRP STRP R *.K/F_ R K/F_ R.K/F_ R *.K/F_ R0 *.K/F_ R 0K/F_ R.K/F_ R *.K/F_ +V R *.K/F_ R K/F_ R.K/F_ R *.K/F_ PROJET :LL Quanta omputer Inc. Size ocument Number Rev N0M (GPIO & STRPS) / E Tuesday, January, 00 ate: Sheet of

20 UJ PG-NVII-GEFORE0 / GN_N +F_PLLV GN_0 F_PLLV GN_0 GN_0 0 0 GN_0 0 GN_0 0.U/0V/XR_ 0.U/0V/XR_ GN_0 GN_0 GN_0 GN_0 F GN_0 F GN_ F GN_ F GN_ F0 GN_ F GN_ F GN_ F GN_ F GN_ GN_ GN_0 E GN_ GN_ GN_ 0 GN_ GN_ G_T0 T T0 GN_ G_T T GN_ GN_ 0 E E E0 E E E E H H J J J K K L L L L L L L L L M M M M M P P P GN_0 GN_ GN_ GN_ GN_ GN_ GN_ GN_ GN_ GN_ GN_0 GN_ GN_ GN_ GN_ GN_ GN_ GN_ GN_ GN_ GN_0 GN_ GN_ GN_ GN_ GN_ GN_ GN_ GN_ GN_ GN_0 V_SENSE GN_SENSE E E T T +V P P P T T T T T U U U U U U U U U U U V GN_ GN_ GN_ GN_ GN_ GN_ GN_ GN_ GN_ GN_0 GN_ GN_ GN_ GN_ GN_ GN_ GN_ GN_ GN_ GN_0 +V_GFX_ORE +.V +IFP_IOV V GN_ W GN_ W GN_ W GN_ Y GN_ Y GN_ Y GN_ Y GN_ U_GPU_NS_ PROJET :LL Quanta omputer Inc. Size ocument Number Rev ustom E N0M (GN) / ate: Tuesday, January, 00 Sheet 0 of

21 M_QS#[..0] M_QM#[..0] M_QS[..0] M_M[..0] VREF_VM VREF_VM M_QM# M_QM# VM_ZQ M_M M_QS M_QS# M_QS# M_QS M_M VREF_VM VREF_VM VREF_VM VREF_VM VREF_VM VREF_VM VREF_VM VREF_VM LK LK# LK0 LK0# VREF_VM VREF_VM VM_ZQ LK0# LK0 VREF_VM VREF_VM M_QM# M_QM# VM_ZQ M_QS M_QS# M_QS# M_QS VREF_VM VREF_VM M_QM# M_QM# VM_ZQ M_QS M_QS# LK# LK M_QS# M_QS M_M0 M_M M_M M_M M_M0 M_M M_M M_M M_M M_M0 M_M M_M M_M M_M M_M M_M M_M M_M M_M M_M M_M M_M M_M0 M_M0 M_M M_M M_M M_M M_M M_M M_M M_M M_M M_M M_M M_M0 M_M M_M M_M M_M M_M M_M M_M M_M M_M M_M M_M M_M M_M M_M M_M M_M0 M_M M_M M_M M_M M_M M_M M_M M_M M_M M_M M_M M_M M_M M_M M_M M_M M_M M_M M_M M_M M_M0 M_M M_M M_M0 M_M M_M0 M_M M_M M_M0 M_M M_M0 M_M M_M M_M M_M M_M0 M_M M_M M_M M_M M_M M_M M_M M_M M_M M_M M_QM#0 M_M M_QM# M_M M_M M_M M_M M_QS0 M_M0 M_QS M_M M_M M_M M_M M_M M_M M_M M_M M_M0 M_M M_M M_M M_M M_M M_M M_M M_M M_M0 M_M M_M M_M M_QS#0 M_QS# M_M M_M M_M M_M M_M0 M_M0 M_M M_M M_M M_M M_M M_M M_M M_M M_M M_M M_M M_M M_M M_M0 M_M M_M M_M M_M M_M M_M M_M M_M M_M M_M M_M M_M M_M M_QM#[..0] [] M_QS#[..0] [] M_QS[..0] [] M_M[..0] [] LK0 [] LK0# [] LK [] LK# [] +.V [,,0,,,,,] M_M [] M_M [] M_M [] M_M [] M_M0 [] M_M [] M_M [] M_M [] M_M [] M_M0 [] M_M [] M_M [] M_M [] M_M [] M_M [] M_M [] M_M [] M_M [] M_M [] M_M [] M_M [] M_M [] M_M [] M_M0 [] M_M [] M_M [] M_M0 [] M_M [] M_M [] M_M [] M_M [] +.V +.V +.V +.V +.V +.V +.V +.V +.V +.V +.V +.V +.V +.V +.V +.V +.V +.V +.V +.V +.V +.V Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET :LL VRM_R_M E ustom Tuesday, January, 00 Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET :LL VRM_R_M E ustom Tuesday, January, 00 Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET :LL VRM_R_M E ustom Tuesday, January, 00 Quantauy VOL /S Quantauy VOL /S Quantauy VOL /S Memory Straps M SSY' PN close to U00 Quantauy VOL /S Quantauy VOL /S Quantauy VOL /S Quantauy VOL /S close to U00 close to U00 close to U00 M/ M R Should be 0 Ohms +-% Should be 0 Ohms +-% Should be 0 Ohms +-% Should be 0 Ohms +-% close to U00 N U00 close to U00 N U00 GM MHz M(M*) KLZGTW0 KLZGTW00 Place near VRM U/.V/XR_ U/.V/XR_ R.K/F_ R.K/F_ U/.V/XR_ U/.V/XR_ U/.V/XR_ U/.V/XR_ U/.V/XR_ U/.V/XR_ WE L RS J S K S L KE K K J K K QSU 0 M N P N P P R R T R 0/P L R QL0 E QL F QL F QL F QL H QL H QL G QL H VSSQ# VSS# VSS#E E VSS# N#J J V# V# VQ# VQ# VQ# VQ# N#L L N#J J VQ#E E ZQ L RESET T QSL F MU ML E VSSQ# VSSQ# VSSQ# VSSQ#E E QSU VSSQ#E E QSL G VQ#F F VSSQ#F F VSSQ#G G VQ#H H VQ#H H VSSQ#G G VREF M VSS#G G V#G G OT K 0 N P V#K K / N VSS#J J V#K K QU QU QU QU QU QU QU QU0 T T M M VREFQ H N#L L V#N N V#N N V#R R V#R R VSS#J J VSS#M M VSS#M M VSS#P P VSS#P P VSS#T T VSS#T T VQ# -LL SRM R U VRM _R -LL SRM R U VRM _R 0U/.V/XR_ 0U/.V/XR_ U/.V/XR_ U/.V/XR_ U/.V/XR_ U/.V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ U/.V/XR_ U/.V/XR_ R.K/F_ R.K/F_ 0U/.V/XR_ 0U/.V/XR_ U/.V/XR_ U/.V/XR_ U/.V/XR_ U/.V/XR_ R.K/F_ R.K/F_ U/.V/XR_ U/.V/XR_ U/.V/XR_ U/.V/XR_ R.K/F_ R.K/F_ U/.V/XR_ U/.V/XR_ R.K/F_ R.K/F_ 0U/.V/XR_ 0U/.V/XR_ R0.K/F_ R0.K/F_ 0U/.V/XR_ 0U/.V/XR_ WE L RS J S K S L KE K K J K K QSU 0 M N P N P P R R T R 0/P L R QL0 E QL F QL F QL F QL H QL H QL G QL H VSSQ# VSS# VSS#E E VSS# N#J J V# V# VQ# VQ# VQ# VQ# N#L L N#J J VQ#E E ZQ L RESET T QSL F MU ML E VSSQ# VSSQ# VSSQ# VSSQ#E E QSU VSSQ#E E QSL G VQ#F F VSSQ#F F VSSQ#G G VQ#H H VQ#H H VSSQ#G G VREF M VSS#G G V#G G OT K 0 N P V#K K / N VSS#J J V#K K QU QU QU QU QU QU QU QU0 T T M M VREFQ H N#L L V#N N V#N N V#R R V#R R VSS#J J VSS#M M VSS#M M VSS#P P VSS#P P VSS#T T VSS#T T VQ# -LL SRM R U VRM _R -LL SRM R U VRM _R U/.V/XR_ U/.V/XR_ U/.V/XR_ U/.V/XR_ U/.V/XR_ U/.V/XR_ U/.V/XR_ U/.V/XR_ 0 0.U/0V/XR_ 0 0.U/0V/XR_ 0U/.V/XR_ 0U/.V/XR_ U/.V/XR_ U/.V/XR_ 0 0.U/0V/XR_ 0 0.U/0V/XR_ R /F_ R /F_ 0 0U/.V/XR_ 0 0U/.V/XR_ 0 U/.V/XR_ 0 U/.V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ R.K/F_ R.K/F_ R0.K/F_ R0.K/F_ 0 0.U/0V/XR_ 0 0.U/0V/XR_ R.K/F_ R.K/F_ 0 0.U/0V/XR_ 0 0.U/0V/XR_ 0U/.V/XR_ 0U/.V/XR_ U/.V/XR_ U/.V/XR_ R0.K/F_ R0.K/F_ U/.V/XR_ U/.V/XR_ WE L RS J S K S L KE K K J K K QSU 0 M N P N P P R R T R 0/P L R QL0 E QL F QL F QL F QL H QL H QL G QL H VSSQ# VSS# VSS#E E VSS# N#J J V# V# VQ# VQ# VQ# VQ# N#L L N#J J VQ#E E ZQ L RESET T QSL F MU ML E VSSQ# VSSQ# VSSQ# VSSQ#E E QSU VSSQ#E E QSL G VQ#F F VSSQ#F F VSSQ#G G VQ#H H VQ#H H VSSQ#G G VREF M VSS#G G V#G G OT K 0 N P V#K K / N VSS#J J V#K K QU QU QU QU QU QU QU QU0 T T M M VREFQ H N#L L V#N N V#N N V#R R V#R R VSS#J J VSS#M M VSS#M M VSS#P P VSS#P P VSS#T T VSS#T T VQ# -LL SRM R U VRM _R -LL SRM R U VRM _R U/.V/XR_ U/.V/XR_ WE L RS J S K S L KE K K J K K QSU 0 M N P N P P R R T R 0/P L R QL0 E QL F QL F QL F QL H QL H QL G QL H VSSQ# VSS# VSS#E E VSS# N#J J V# V# VQ# VQ# VQ# VQ# N#L L N#J J VQ#E E ZQ L RESET T QSL F MU ML E VSSQ# VSSQ# VSSQ# VSSQ#E E QSU VSSQ#E E QSL G VQ#F F VSSQ#F F VSSQ#G G VQ#H H VQ#H H VSSQ#G G VREF M VSS#G G V#G G OT K 0 N P V#K K / N VSS#J J V#K K QU QU QU QU QU QU QU QU0 T T M M VREFQ H N#L L V#N N V#N N V#R R V#R R VSS#J J VSS#M M VSS#M M VSS#P P VSS#P P VSS#T T VSS#T T VQ# -LL SRM R U VRM _R -LL SRM R U VRM _R R.K/F_ R.K/F_ U/.V/XR_ U/.V/XR_ R.K/F_ R.K/F_ U/.V/XR_ U/.V/XR_ U/.V/XR_ U/.V/XR_ U/.V/XR_ U/.V/XR_ U/.V/XR_ U/.V/XR_ R /F_ R /F_ R0.K/F_ R0.K/F_ R /F_ R /F_ 0U/.V/XR_ 0U/.V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ R.K/F_ R.K/F_ U/.V/XR_ U/.V/XR_ U/.V/XR_ U/.V/XR_ R0.K/F_ R0.K/F_ U/.V/XR_ U/.V/XR_ U/.V/XR_ U/.V/XR_ 0U/.V/XR_ 0U/.V/XR_ 00 0U/.V/XR_ 00 0U/.V/XR_ R0 /F_ R0 /F_ U/.V/XR_ U/.V/XR_ R0 /F_ R0 /F_ R /F_ R /F_ R00.K/F_ R00.K/F_ U/.V/XR_ U/.V/XR_ 0 0.U/0V/XR_ 0 0.U/0V/XR_

22 [,,,,,0,,,,,,,,,,,,,,0,,,,,,,0,,,,,] +V [,0,,] +V [,0,] VSUS LV [,,,,,,,0,,,,] VPU [,,,,,,,] VIN [,,,,,,,,,,0,] +V +V +V LV [] ENV back light R 00K_ VSUS R 00K_ Q PTEU R 0K_ LV_ON Q N00 LV_R Q O0 0.0U/V/XR_ R Q N00 *0 short R _ 0 0U/.V/XR_ [] L_LK [] L_T +V R.K_ R.K_ L_LK L_T E-- [] L_0- [] L_0+ [] L_- [] L_+ [] L_- [] L_+ [] L_LK- [] L_LK+ [] L_0- [] L_0+ [] L_- [] L_+ [] L_- [] L_+ [] L_LK- [] L_LK+ GFX_PWR_SR +M_V [] T_LE [] PSLE [] NUMLE [0,] WWN_LE# LV +V +V L_LK L_T VJ_PWM ISPON IH_USP+ IH_USP- THINK LIGHT dress : H --ontrast H --acklight G_ G_0 G_ G_ G_ G_ G_ G_ G_ N GS0-0-F [,] LI# VPU +V R R *.K_ 0K_ R00V-0 R00V-0 0.U/0V/XR_ R 00K_ ISPON *P/0V/NPO_ THINK LIGHT LE ON +V R M_ [] THINK LIGHT# Q PTEU +V Q N00 R 0_ 0.U/0V/XR_ THINK LIGHT [] PNEL_KEN R *0 short R R 0K_.K_ *U/0V/XR_ Q PTEU L_K_OFF [] [0] IH_USP- [0] IH_USP+ L *LWHN00SQL IH_USP- IH_USP+ MER V ontrol +V +V +M_V R *0 short *U/.V/XR_ R0 *0_ U VIN VOUT GFX_PWR_SR 0.U/V/XR_ 0.U/V/XR_ R *0 short *0U/V/XS_ VIN [] _ON R *0_ SHN GN SET *TH-.KER R *K/F_.U/.V/XR_ R *00K/F_ [] I_PWM [] RIGHT_PWM R0 R *0 short *0_ VJ_PWM *P/0V/NPO_ PROJET :LL Quanta omputer Inc. Size ocument Number Rev ustom L ONN E ate: Tuesday, January, 00 Sheet of

23 [,,,,,,,,,,0,] [,,,,,0,,,,,,,,,,,,,,0,,,,,,,0,,,,,] RT_V +V +V E R00V-0 Layout Note: F Setting R,G, trace FUSEV_POLY impedance to 0 ohm. +V RT_V_R 0.U/0V/XR_ *VRISTOR_ [] RT_RE L LM0SN RT_R [] [] RT_GRN RT_LU R 0/F_ R 0/F_ R 0/F_.P/0V/OG_.P/0V/OG_ L L.P/0V/OG_ LM0SN LM0SN.P/0V/OG_.P/0V/OG_.P/0V/OG_ RT_G RT_ TP 0 N 00FR0SR ES PROTETION 0 RT_R *TVSSVESPT RT_G *TVSSVESPT +V RT_ *TVSSVESPT [] RT_VSYN 0.U/0V/XR_ U HTGH VGVSYN_R Place near U00,U00 < 00 mil RTVSYN RTHSYN *0P/0V/OG_ *0P/0V/OG_ L L0 H-T0-JT H-T0-JT 0P/0V/OG_ RTVSYN RTHSYN 0P/0V/OG_ *TVSSVESPT RTVSYN RTHSYN [] RT_HSYN VGHSYN_R R 0_ *TVSSVESPT Place near N00 connector < 00 mil LK *TVSSVESPT T *TVSSVESPT +V RT_V R 0K_ R 0K_ R.K_ R0.K_ [] RT_LK LK R *0 short LK +V R 0_ U HTGH Q0 N00K-T-E [] RT_T T R *0 short T Q 0 N00K-T-E *0P/0V/OG_ *0P/0V/OG_ PROJET :LL Quanta omputer Inc. Size ocument Number Rev ustom RT ONN E ate: Tuesday, January, 00 Sheet of E

24 isplayport +V [,,,,,0,,,,,,,,,,,,,,0,,,,,,,0,,,,,] [,,,,,,,,,,0,] +V +V 0.U/0V/XR_ R0 00K_ +V +V [] P_UX_N Q N00K Q N00K P_UXN R 0K_ R 0K_ Q N00K Q N00K [] P_UX_P P_UXP 0.U/0V/XR_ R 00K_ 0 0.U/0V/XR_ Q N00K P_ Q0 N00K R M_ ES Protect P_ Low High ehavior P signal ( couple) TMS signal ( couple) P connector N SHIEL SHIEL 0mil +V /0V RSX0M-0 [] [] [] [] [] [] [] [] P_TXN P_TXP P_TXP P_TXN P_TX0N P_TX0P P_TXP P_TXN P_TXN P_TXP P_TXP P_TXN P_TX0N P_TX0P P_TXP P_TXN P_UXN P_UXP P_ P_HP R 00K_ close to P connector U 0 0 GN_/ *Rlamp0P U 0 0 GN_/ *Rlamp0P U 0 0 GN_/ *Rlamp0P RV EG-00 E-- P_TXN P_TXP P_TXP P_TXN P_TX0N P_TX0P P_TXP P_TXN P_UXN P_UXP P_ P_HP [] P_HP P_HP P_UXN P_UXP P_TXN P_TXP P_TXN P_TXP P_TXN P_TXP P_TX0N P_TX0P PWR 0 0 PWR_RET HP UXN GN UXP GN MOE LNE_N 0 LNE_P GN 0 LNE_N LNE_P GN LNE_N LNE_P GN LNE_0N LNE_0P GN E-- P_ONN SHIEL SHIEL +V_P 00m (Max.) P_ PROJET :LL Quanta omputer Inc. Size ocument Number Rev ustom E ISPLYPORT ONN ate: Tuesday, January, 00 Sheet of 0.U/.V/XR_

25 TR+ TR0- TR0+ LN_XTLI TR- LN_PIETXP LN_PIETXN TLE# LN_XTLO LN_XTLI TR+ TR- TR+ TR- +V.M_LN_OUT SM_LK_ME0_R SM_T_ME0_R TRL_P0 SM_LK_ME0_R SM_T_ME0_R TRL_P0 +VT_LN LN_MX+ LN_MX- LN_MX+ LN_MX+ LN_MX- LNT TR+ TR- TR- TR+ TR+ TR- TR0+ TR0- LN_MT0 LN_MT LN_MX0- LN_MX- LN_MT LN_MT LN_MX0+ LINKLE LN_MX+ LINKLE LN_GLE LN_MX+ LN_MX- LN_MX- LN_MX0+ LN_MX- TLE# LN_YLE LN_MX0- LN_MX+ TR0+ TR- TR- TR- TR+ TR0- TR+ TR+ +.V_LN_R LN_XTLO LN_XTLO_R PIE_TX+/GLN_TX+ [0] PIE_TX-/GLN_TX- [0] PIE_RX+/GLN_RX+ [0] PIE_RX-/GLN_RX- [0] LK_PIE_LOM [0] LK_PIE_LOM# [0] LK_PIE_LN_REQ# [0] PLTRST# [,0,,0,,,] LN_ISLE# [] SM_T_ME0 [0] SM_LK_ME0 [0] SLP_LN# [] V_S [,,,0,,,,0] +.0V_VTT [,,,,,0,,,0,,] LN_ON [0] VPU [,,,,,,,0,,,,] +.0V_LOM +.V_LN +.0V_LOM +.0V_VTT V_S V_S +.V_LN +.V_LN +.V_LN +.0V_LOM +.V_LN VPU +.V_LN +.V_LN +.V_LN Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET :LL LN(LM) E ustom Tuesday, January, 00 Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET :LL LN(LM) E ustom Tuesday, January, 00 Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET :LL LN(LM) E ustom Tuesday, January, 00 ore Power ecoupling LN_ISLE# is active low. LNV VIO Power ecoupling RJ onnector Tramsformer Place near to Transformer E--0 R /F_ R /F_ IO IO IO IO REF GN U M-0SO U M-0SO 0.U/0V/XR_ 0.U/0V/XR_ R0 /F_ R0 /F_ 0P/0V/OG_ 0P/0V/OG_ RSV_VP_ RSV_VP_ LN_ISLE_N VP_OUT VP_IN VT TRL_P0 VP0_ XTL_OUT XTL_IN 0 VP0_ RIS MI_PLUS0 MI_MINUS0 VP_ VP0_ MI_PLUS MI_MINUS VP_ MI_PLUS 0 MI_MINUS VP0_ MI_PLUS MI_MINUS LE LE0 LE SM_LK VP_ TEST_EN 0 SM_T JTG_TI JTG_TMS JTG_TO JTG_TK PE_RST_N VP0_ PETp PETn VP0_0 0 PERp PERn VP0_ PE_LKP PE_LKN VP0_ VP0_ LK_REQ_N VSS_EP PIE MI SMUS JTG LE U LM/L PIE MI SMUS JTG LE U LM/L R 0/F_ R 0/F_ 0.0U/V/XR_ 0.0U/V/XR_ R *0 short R *0 short P/0V/NPO_ P/0V/NPO_ R.0K/F_ R.0K/F_ R /F_ R /F_ 0.U/0V/XR_ 0.U/0V/XR_ R M_ R M_ IO IO IO IO REF GN U M-0SO U M-0SO 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ R 0K_ R 0K_ R.K_ R.K_ R *0K_ R *0K_ R.K/F_ R.K/F_ U/.V/XR_ U/.V/XR_ R.K_ R.K_ 0.U/0V/XR_ 0.U/0V/XR_ R.0K/F_ R.0K/F_ R K_ R K_ 0.U/0V/XR_ 0.U/0V/XR_ Q N00 Q N00 R *0 short R *0 short 0.U/0V/XR_ 0.U/0V/XR_ 0.U/.V/XR_ 0.U/.V/XR_ 0 0U/.V/XR_ 0 0U/.V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 0U/0V/XR_ 0U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ TT T+ T- T+ T- TT MT MX+ MX- MT MX+ 0 MX- TT T+ T- TT 0 T+ T- MX- MX+ MT MX- MX+ MT U NS0 U NS0 Q O0 Q O0 0.U/0V/XR_ 0.U/0V/XR_ R 0/F_ R 0/F_ Q N00 Q N U/0V/XR_ 0 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ Y MHZ Y MHZ R *0_ R *0_ R 0K_ R 0K_ 0 0.0U/V/XR_ 0 0.0U/V/XR_ 0 0.U/0V/XR_ 0 0.U/0V/XR_ E Q PTG Q PTG R.0K/F_ R.0K/F_ 0.U/0V/XR_ 0.U/0V/XR_ U/0V/XR_ U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 000P/KV/NPO_ 000P/KV/NPO_ 0.U/0V/XR_ 0.U/0V/XR_.U/.V/XR_.U/.V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ G G G + G N 000FR0SZL N 000FR0SZL R *0_ R *0_ P/0V/NPO_ P/0V/NPO_ R /F_ R /F_

26 SPKR_PORT L+ SPKR_PORT L- PORT_F_L R *0K_ PORT_F_R P-.U/0V/XR_ +V P_EEP P_EEP P+ nalog MONO_OUT The Gap between VSS nalog & igital should IH_Z_OE_SOUT IH_Z_OE_ITLK be 0 ~ 00 mil VSS P 0 VSS R R VSS VREFFILT *_ *0_ PVSS V- Headphone out P VREG igital *0P/0V_ 0 *.U/0V_ HNLGXYX [] [] [] [] [] [] [] IH_Z_OE_ITLK IH_Z_OE_SIN0 IH_Z_OE_SOUT IH_Z_OE_SYN IH_Z_OE_RST# INT_MI_IN PEEP_ GN SPKR +V V_IO should match H us. +V [] INT MI P EEP VOLMUTE# EMI Reserved R0 R U/0V/XR_ L +V *SHORT *0 short U/0V/XR_ 0.U/0V/XR_ U TSHFU lose to codec *0 short IH_Z_OE_ITLK R _ IH_Z_OE_SOUT +V 0.U/0V/XR_ P_EEP (m) 0.U/0V/XR_ IH_Z_OE_RST# IH_Z_OE_SYN IH_Z_OE_ITLK IH_Z_OE_SOUT O_V O_V_IO IH_Z_OE_SIN0_L MI-VREF R R *K_ 0K_ 0 0U/0V/XR_ R 0 INT_MI 0 P_EEP R *.K_ U V_ORE V V_IO H_ITLK H_SI H_SO H_SYN H_RST# MI_LK/GPIO MI0/GPIO MI/GPIO0/SPIF_OUT_ SPIF_OUT_0 EP H: V:.m PV:. V,V_IO:0m U/0V/XR_ GN.K_ GN *000P/V/XR_ GN 0.U/.V/XR_ lose to codec P_EEP (m) V V PV PV SENSE_ SENSE_ HP0_PORT L HP0_PORT R VREFOUT or_f HP_PORT L HP_PORT R PORT L PORT R 0 VREFOUT_ SPK_R- SPK_R+ SPKR_PORT R- SPKR_PORT R+ N MI_ON 0 PORT_E_L PORT_E_R SENSE SENSE MI_L MI_R +V +V R *0 short 0.U/0V/XR_ HPOUT_L HPOUT_R INT_MI_IN SPK_L+ SPK_L- SPK_L+ SPK_L-.U/0V/XR_ PV_V 0.U/0V/XR_ 0U/0V/XR_ lose to codec lose to codec 0U/0V/XR_ U/0V/XR_ 0U/0V/XR_.U/.V/XR_.U/.V/XR_ U/0V/XR_ R 0U/0V/XR_ EXT_MI_L EXT_MI_R MI-VREF MI-VREF *0 short Layout R 00K_ Port_ +V EXT_MI_L EXT_MI_R MI-VREF odec (.) PORT_X Pin: W/S=0/ VREFOUT_X Pin: W/S=0/0 Power Pin : 0mil Sense_ Port_ R.K/F_ R R 0 000P/0V_ Sense_ Port_ E Port_ F.K/F_ 0K/F_ RES.K 0K SENSE_MI SENSE_HP HPOUT_L HPOUT_R GN INT Speaker SPK_R+ SPK_R- External Microphone Jack U/0V/XR_ R0.K_ R R0 R.K_ R R R R R0 R._._ 000P/0V_ *0 short *0 short [,,,,,0,,,,,,,,,,,,,,0,,,,,,,0,,,,,] *0 short *0 short 0./F_0 0./F_0 GN HPOUT_LR HPOUT_RR GN L L *00P/0V/NPO_ 000P/0V_ EXT_MI_L_ EXT_MI_R_ L L LM0SN_0. [,,,,,,,,,,0,] *00P/0V/NPO_ LM0SN_0. 0.U/0V/XR_ LM0SN_0. LM0SN_0. GN 0 00P/0V/NPO_ *00P/0V/NPO_ 0.U/0V/XR_ +V +V SENSE_HP HPOUT_L HPOUT_R SENSE_MI E EXT_MI_L_ EXT_MI_R_ 0 00P/0V/NPO_ SPK_R+_OUT SPK_R-_OUT SPK_L+_OUT SPK_L-_OUT *00P/0V/NPO_ GN GN E--0 E-- N Normal Open Stereo MI N MI_JK R-SPEKERS N HEPHONE_JK Normal Open N L-SPEKERS E--0 E-- R *SHORT 0 0 GN R GN E--0 stage *SHORT Layout Note: Place close to udio odec. *P/0V/NPO_ *0P/0V/OG_ *P/0V/NPO_ *P/0V/NPO_ PROJET :LL Quanta omputer Inc. Size ocument Number Rev ustom UIO OE (IT H) E Tuesday, January, 00 ate: Sheet of E

27 [0] IH_USP- [0] IH_USP+ [0] LK_M_R +V +V +V +V For external Mhz clock input pin floating For external Mhz clock input pin pull high R R R R0 0 R R R E--0.K/F_ *0 short *0 short U/.V/XR_ *0 short *0 short R X_# S_WP S_# SP RREF IH_USP-_ IH_USP+ RST# MOE_SEL XO XI Y *MHZ 0ppm R R 00K/F_ 00K/F_ 0 *0K_ *0 short *0 short.u/.v/xr_ 0.U/0V/XR_ 0 +V_R +V_R RST# MOE_SEL XTLO XTLI V_ IN V_OUT F_# GPIO0 F_0 F_ F_ F_/SM_# F_/X_# F_0/SM_WPM#/S_WP F_0/S_# F_MK# F_/X_ F_MRQ RREF M P V_IN 0 0.U/.V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ R_V_OUT 0 U/.V/XR_ X_LE/F_ X_E#/F_ X_LE/F_ S_T/X_RE#/F_ S_T/X_WE#/F_ X_RY/F_ S_T/X_WP#/F_ V_X 0 S_M S_T/X_0/F_ S_LK/X_/MS_LK/F_ S_T/X_/MS_/F_ F_S0# 0 MS_INS#/F_IOR# S_T/X_/MS_/F_IOWR# S_T0/X_/MS_0/F_RST# S_T/X_/MS_/F_IORY X_/MS_S/F_ GN GN G_PLL G U RTS-GR V_PLL_IN VREG_OUT 0 V_ IN V_OUT X-LE X-E# X-LE SP SP X-R# X-WP# MS_# SP SP SP SP VREG Realtek RTS S_M SP SP_N SP0 V_X lose to Pin R *0 short R _ X-0 SP [,,,,,0,,,,,,,,,,,,,,0,,,,,,,0,,,,,] SP R *0 short MS_T0_S_T0 R *0 short MS_T_X_ R *0 short X- 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ 0.U/0V/XR_ U/.V/XR_ Vreg out.v from Internal.VLO SP SP SP SP SP Note: +V SP0 SP X_# SP S_WP SP S_# SP S_T X_ SP MS_S X_ SP MS_ X_ SP S_T0 MS_0 X_ SP S_T MS_ X_ SP MS_INS# SP0 S_T MS_ X_ SP S_LK MS_SLK X_ SP S_T X_0 SP S_T X_WP# SP X_R/# SP S_T X_WE# SP S_T X_RE# SP X_LE SP X_E# SP X_LE R0 R R R R R R R R R For RTS *0 short MS_T *0 short X- *0 short S_T *0 short X-RE# *0 short MS_S *0 short X- *0 short S_T *0 short X_WE *0 short S_LK_MS_LK *0 short X- 0 *.P/0V_ *P/V_ V_X V_X *.P/0V_ S_# S_WP S_T MS_T0_S_T0 MS_S MS_T S_LK_MS_LK MS_T0_S_T0 MS_T_X_ MS_# MS_T S_M S_LK_MS_LK S_T IN R REER X,MM/S,MS/MSP N S- S-WP S--T S--T0 MS--VSS S--VSS MS--S MS--T S--LK 0 MS--SIO/T 0 S--V MS--T S--VSS MS--INS MS--T S--M MS--SLK MS--V S--/T p MS-0-VSS 0 S--T x--v x-- x-- x-- x-- x-- x-- x-- x x-0-gn x-0-wp x-0-we x-0-le x-0-le x-0-e x-0-re x-0-r/ x-0- x-00-gn 0 S-/WP GN S-/WP GN S_T X- X- X- X- X- MS_T_X_ X- X-0 X-WP# X_WE X-LE X-LE X-E# X-RE# X-R# X_# V_X V_X.U/.V/XR_ R 0K/F_ V_X 0.U/0V/XR_ 0.U/0V/XR_ 0 0.U/0V/XR_ 0P/0V/XR_ 0P/0V/XR_ SP0 R0 *0 short MS_T R *0 short X- SP R *0 short X- R *0 short S_T PROJET :LL Quanta omputer Inc. Size ocument Number Rev E ard Reader (RTS) ate: Tuesday, January, 00 Sheet of

28 ST-H ONNETOR N mils ST_RX+_ ST_RX-_ ST_TX-_ ST_TX+_ 0 +V_H +V_H 0.0U/V/XR_ 0.0U/V/XR_ 0.0U/V/XR_ 0.0U/V/XR_ ST_RX+ [] ST_RX- [] ST_TX- [] ST_TX+ [] [,,,,,0,,,,,,,,,,,,,,0,,,,,,,0,,,,,] +V [,,,,,,,,,,0,] +V [,0,,] +V [,0,,,,] VPU [,,,,,,,0,,,,] VPU +V_H +V R *0 short 0.U/0V/XR_ 0U/0V/XR_ +V_H Place caps close to connector. 0.U/0V/XR_ R 0U/0V/XR_ *0 short +V ST_H_ON Place caps close to connector. +V_O 0 mils ST -ROM 0 0U/0V/XR_ 0 0.U/0V/XR_ 0 0.U/0V/XR_ 0 0.U/0V/XR_ 0 0.U/0V/XR_ [] ST_TX+ [] ST_TX- [] ST_RX- [] ST_RX+ [] O_ETET# [] O_POWER OFF +V 0 R0 R0 0.0U/V/XR_ 0.0U/V/XR_ 0.0U/V/XR_ 0.0U/V/XR_ R R +V_O *0 short 0K_ ST_TX+_ ST_TX-_ ST_RX-_ ST_RX+_.K_ K/F_ N S GN TXP TXN GN RXN RXP GN S P P +V 0 +V M GN GN P ONN_O VPU R0 00K_ +V R Place caps close to connector. VPU 00K_ Q O0 OO_EN_V +V_O 0U/0V/XR_ R R 00K_ *0_ +V R K/F_ SW SWP_SWITH 000P/V/XR_ YSWP# [] [] O_EN R 00K Q N00W--F Q N00W--F 0.U/V/XR_ PROJET :LL Quanta omputer Inc. Size ocument Number Rev ustom E H/O ate: Tuesday, January, 00 Sheet of

29 US V_S US_ON# [] US_ON# U/0V/XR_ 0 mils (Iout=) U VIN OUT VIN OUT EN OUT GN O GGPU USPWR US_O_# [0] USPWR USPWR + 0P/0V/XR_ 0.U/0V/XR_ 0U/.V_ [0] IH_USP- [0] IH_USP+ R0 *0_ ML LWHN00SQL R *0_ US-_R US+_R RV0 *EG-00 RV *EG-00 [,0] [,,,,,0,,,,,,,,,,,,,,0,,,,,,,0,,,,,] N V GN - GN + GN GN GN US_ON V_S +V E-- US US V_S US_ON# U/0V/XR_ U VIN VIN EN GN GGPU OUT OUT OUT O USPWR 0 mils (Iout=) *0P/0V/XR_ 0.U/0V/XR_ + 0U/.V_ US_O0_# US_O0_# [0] US X---> Wire to board conn USPWR [] US_ON# US_ON# V_S U/0V/XR_ U0 VIN VIN EN GN GGPU OUT OUT OUT O USPWR 0 mils (Iout=) US_O_# US_O_# [0] USPWR [0] IH_USP+ [0] IH_USP- R0 *0_ ML LWHN00SQL R *0_ US+_R US-_R RV RV N0 US_ON [0] IH_USP+ [0] IH_USP- N US_ON *EG-00 *EG-00 *.P/0V/NPO_ *.P/0V/NPO_ EMI request E-- US V_S US_ON# US + E-ST U0 VIN VIN EN GN US0PWR 0 mils (Iout=) *0P/0V/XR_ 0.U/0V/XR_ US_O0_# [0] IH_USP0- [0] IH_USP0+ R *0_ ML IH_USP0-_ IH_USP0+_ RV *EG-00 RV *EG-00 US0PWR E-ST RE-RIVER [] ST_TX+ 0.0U/V/XR_ ST_TX+_ [] ST_TX- 0.0U/V/XR_ ST_TX-_ [] ST_RX- 0.0U/V/XR_ ST_RX-_ [] ST_RX+ 0.0U/V/XR_ ST_RX+_ U MX V 0 V V 0 V IN0P IN0M OUTM OUTP OUT0P OUT0M INM INP EST_TX+_ EST_TX-_ EST_RX-_ EST_RX+_ EST_TX+ EST_TX- EST_RX- EST_RX+ *EG-00 RV RV *EG-00 EST_TX+ EST_TX- EST_RX- EST_RX+ US 0 IH_USP0-_ IH_USP0+_ stage +V E-- EN 0 EP_GN GN GN GN GN GN E-- E-- OUT OUT OUT O 0 GGPU U/0V/XR_ + 0 0U/.V_ LWHN00SQL R0 *0_ +V.U/.V/XR_ 0 0.U/0V/XR_.U/.V/XR_ 0.U/0V/XR_ 0.0U/V/XR_ 0.0U/V/XR_ 0.0U/V/XR_ 0.0U/V/XR_ *EG-00 RV RV *EG-00 N US Vcc - + GN GN + - GN Shield - Shield 0 + Shield GN Shield E-ST_ON R R +V 0K_ 0K_ R 0K_ R *0K_ R *0K_ PROJET :LL Quanta omputer Inc. Size ocument Number Rev ustom US X/US+EST E ate: Tuesday, January, 00 Sheet of