A B C D REVISIONS +3V J39 PHY_INT TXD15 TXPAR PRST AC16 AC21 AD22 AF22 AE22 AF17 AC22 AE16 AE21 AD18 AE7 AD17 AE19 AE20 AF20 AC20 A16 B13 TXD14

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1 A ISIONS ZONE LTR ESRIPTION ATE APPROVE A INITIAL RELEASE --_0:0 J 0 0 0,,,, AF JP PAR [:0] ON PIV 0 SO LAV EN LK PHYS M LK STAT_A M0 M R R R R R R R 0K J J AR AR[:0] AR AR AR AR0 AR AR[:0] AR AR AR AR0 [:0] J --_0:0 mother board. memories or +v when used with +v Jumper installed to A,, E, G, K, M L TO L V OUT VSS Y R 00K J JEFF MULLIN jeffm@brooktree.com PIV tied high = v signaling PIV tied low =.v signaling MHZ LATA[:0] R. LATA LATA0 LATA LATA LATA LATA LATA LATA LATA LATA LATA LATA0 LATA LATA LATA LATA LATA LATA LATA LATA LATA LATA0 LATA LATA LATA LATA LATA LATA LATA LATA LATA LATA0 PITI TK A0 A A V SL SA X U WP HSERR PHY_INT PRST SYSLKX K SAR-STAT SAR-STAT0 TO-TI R. LK (0)-0 N U HFIFOR PI VOLTAGE SELET JP A HFIFOR HFIFOR HFIFOR HFIFOR HFIFOR0 F HFIFOWR E HFIFOWR HFIFOWR HFIFOWR HFIFOWR HSM HFIFOWR0 POWER PINS, E, H, J, K, L L, N, P, T, U, A A, AE, A, AE, A AE, AE, A, A A, AE, AF, AE AE, A, AA, AA V, U, T, N, K J, G, E,, A,,, A, A, A,,, A PINS M, N, T, V, W, AA A, AF, A, AF, A AE0, A, AF, AF A, AF, AF, AA Y, W, U, P, N M, K, H, G, E, A,, A, 0 A,,,, A THERMAL PINS M TO M N TO N P TO P R TO R T TO T.0 HA[:0] HA HA0 HA HA HA HA HA HA HA HA HA HA0 HA HA HA HA HA HA HA HA HA HA0 HA HA HA HA HA HA HA HA HA HA0 J J J J J J J J J J J0 R0 0K SYSLK J H/E[:0] H/E H/E H/E H/E0 HIRY HTRY HEVSEL HISEL HLK LAR[:] LAR LAR LAR LAR LAR LAR LAR LAR0 LAR LAR LAR LAR LAR LAR LAR LAR M M M M M M M M M M M M A PIV E VGG A UTOPIA MS0 R0. W W HA HA0 W V HA V HA V HA U HA U HA T HA R HA R HA R HA HA0 R P HA P HA P HA J HA J HA J HA H HA H HA H HA HA0 G G HA F HA F HA F HA E HA HA E HA HA HA HA0 T N H/E K H/E F H/E H/E0 K M M HIRY M HTRY L L HEVSEL T HISEL Y L N HLK Y F HSWITH N LKX AE SHREF AE SPARE-AE A SPARE-A AF SPARE-AF A SPARE-A SPARE- SPARE- SPARE- SPARE- SPARE- SPARE- AF FRFG 0 ATM Physical 0 PAR PAR Local us PINT AR AF AEFRFG0 AR AE AF MARK AR AF AF AR A A A FLAG EN LK AR0 AE AE AR A AF AR AF A AR AE A AR A AE AR0 A AF A A AF A AE AE A AF A A 0 AE A A AE Interface A AF AF A AE AF AF0 A 0 AE0 A0 A0 AE MARK A0 A0 AF A EN AE FRTRL/LK AE PRO 0 0 PAR PAR0 A0 PSEL PSEL0 PE PE Processor PE Interface PRY PE0 A PS PAEN A PRST A PLAST PWAIT PFAIL N P LATA LATA0 P P LATA R LATA R LATA R LATA R LATA T LATA T LATA U LATA U LATA LATA0 U V LATA V LATA V LATA W LATA W LATA W LATA Y LATA Y LATA Y LATA LATA0 Y AA LATA AA LATA AA LATA A LATA A LATA LATA A LATA A LATA A A LATA LATA0 LAR LAR A LAR LAR A LAR LAR LAR LAR LAR0 A LAR A LAR LAR LAR LAR A LAR LAR LAR G RAM A A TLK A A TI A SA Host PI Interface Signals Local us Memory Interface locks/status 0 0 PAR LAR LAR0 LAR[:0] oundary Scan Test Signals Serial EEPROM MS J MS J MS K MS0 K H MWE G MWE G MWE H H J LAR LAR0 A SYSLK M LK L STAT F STAT0 F SL K J MWE MWE[:0] MWE MWE R 0K SA Y AA HSERR L L HLE HENUM TO A SL EEPWR A K ONTRAT NO. RAWN HEKE ENGINEER APPROVALS ATE OE IENT NO. RAWING NO. / SALE: NONE ONEXANT oulder, O 00 - WHISTLER/QUA-PEAK P:T A SO LAV EN 0 M M ALL. ohm AN SOTT / T00-X0 PHY/EVS/P/WHISTLER-QUA_PEAK/T00-X0-.

2 NONE RAWING NO. OE IENT NO. SALE: A A / T00-X0 T00-X0-. --_: STAT_ STAT_ STAT_ STAT_ STAT_ STAT_ STAT_ STAT_ STAT_ STAT_ STAT_ STAT_ STAT_ STAT_ 0 0 RP 0 0 RP 0 0 RP 0 R 0 R RE STAT0_ R0 0 RE STAT0_ 0 R RE STAT0_ A00 A A0 A A0 A0 A A0 A0 A A0 A0 A0 A A0 A0 A A A A A A A A AA A AA 0A A0A A AA A AA A AA A AA A A0A0 0A LK ISELA PAR A 0RSV RSV RSVA RSVA RSVA RSVA SONE A0 TK TI A TO A 0AK A _E0 _E _E _E EVSEL FRAMEA GNT A INTAA INT INTA INT IRY LOK 0PERR PRSNT PRSNT REQ REQ A0 RST A SO A SERR STOP A TRYA A A A A A A A0 0 A A A A A 0 A A A0 A A A A 0 A A 0 A0 A A A A A 0 A A A A A A A A A A J KEY STAT0_A RE PI ONNETOR TK PITO HLK HA HA HA HA HA HA HA HA HA HA HA0 HA HA HA H/E H/E H/E H/E0 HIRY HEVSEL HSERR PITI HTRY HISEL HA0 HA HA HA HA HA0 HA HA HA HA HA HA HA0 HA HA HA HA HA R LM0 _V V VR GREEN STAT_A STAT_A STAT_A STAT_A STAT_A STAT_A STAT_A STAT_ STAT_ STAT_ STAT_ STAT_ STAT_ STAT_ 0 0 RP POWER

3 A OE IENT NO. RAWING NO. / T00-X0 SALE: NONE --_: A T00-X0-. -N K -N V OUT VSS Y.MHZ R. J HP-UTOPLK 00PF R HP-UTOPLK 00PF R UTOPLK SYSLK LAR[:0] -NO REMOVE OTH SOLER SHORTS FOR UTOPIA TESTING UTOPLK HP-[:0] K-NO HP-AR[:0] PRST PHYS LAR LAR LAR LAR LAR LAR LAR LAR LAR0 TK TO-TI HP-EN HP-AR HP-AR HP-AR HP-AR HP-AR0 HP-SO HP-PAR HP- HP- HP- HP- HP- HP-0 HP- HP- HP- HP- HP- HP- HP- HP- HP- HP-0 HP-EN HP-AR HP-AR HP-AR HP-AR HP-AR0 LKO-_A LKO+_A LKO-_ LKO+_ LKO-_ LKO+_ LKO-_ LKO+_ AT-_A AT+_A AT-_ AT+_ AT-_ AT+_ AT-_ AT+_ LATA LATA LATA LATA LATA LATA LATA LATA0 PITO STAT0_A STAT_A STAT_A STAT_A STAT_A STAT_A STAT_A STAT_A STAT0_ STAT_ STAT_ STAT_ STAT_ STAT_ STAT_ STAT_ STAT0_ STAT_ STAT_ STAT_ STAT_ STAT_ STAT_ STAT_ K J0 J J0 J J J J J J J J J J J J J J J PHY_INT LATA[:0] STAT[:0]_A STAT[:0]_ STAT0_ STAT_ STAT_ STAT_ STAT_ STAT_ STAT_ STAT_ STAT[:0]_ HP-PAR HP- HP- HP- HP- HP- HP-0 HP- HP- HP- HP- HP- HP- HP- HP- HP- HP-0 STAT[:0]_ HP-[:0] R 00K HP-SO HP-LAV K K 00PF R 00 LK 00PF R 00 HP-AR[:0] K K K SIGET_A SIGET_ SIGET_ SIGET_ M YTELK M LKI- M0 LKI+ AT-_A AT+_A AT-_ AT+_ AT-_ AT+_ AT-_ AT+_ M LK- M LK+ M M M M M M J J0 M M M M M M U T AE L A ONESEIN KHZIN RVHL_A RVHL_ RVHL_ RVHL_ RESET LOK & ONTROL AA SIGET_A AF0 SIGET_ G SIGET_ A SIGET_ A0 PLLLK A LKI- LKI+ A AA AT-_A AE AT+_A AE AT-_ H AT+_ G AT-_ AT+_ AT-_ A AT+_ A LK-_A AF LK+_A AF LK-_ F LK+_ H LK-_ A LK+_ A LK-_ LK+_ SYN A MLK E AS W/R S AR[] A AR[] A AR[] A0 AR[] AR[] AR[] A AR[] A AR[] AR[0] U V V U TK TI_A STATUS AE UTOPLK AE0 EN AE A AR[] A AR[] AE AR[] A AR[] AR[0] AF AE SO PRTY AE AF ATA[] AF ATA[] AE ATA[] AE ATA[] AF ATA[] ATA[0] AE AE ATA[] AF ATA[] AF ATA[] AF ATA[] AF ATA[] AF ATA[] AE ATA[] AE ATA[] ATA[] AE ATA[0] AE UTOPLK AF0 EN AE A AR[] A AR[] M AR[] V AR[] AR[0] QUA-PEAK RS PM MIRO JTAG UTOPIA RV ONESEOUT_A R ONESEOUT_ AE ONESEOUT_ E ONESEOUT_ FRAMEREF_A T FRAMEREF_ AE FRAMEREF_ L FRAMEREF_ FRAMEREF_A R AF FRAMEREF_ FRAMEREF_ M A FRAMEREF_ VGG F VGG AE VGG W LKO-_A W LKO+_A LKO-_ AF LKO+_ AE K LKO-_ J LKO+_ A LKO-_ LKO+_ Y AT-_A Y AT+_A AT-_ AF AT+_ AE0 J AT-_ K AT+_ AT-_ A AT+_ P INT_A AF INT_ INT_ A INT_ AT[] AT[] AT[] A AT[] AT[] AT[] AT[] AT[0] E TO_ 0 STATOUT[]_A K STATOUT[]_A P STATOUT[]_A L STATOUT[]_A N STATOUT[]_A L STATOUT[]_A N STATOUT[]_A M STATOUT[0]_A M STATOUT[]_ STATOUT[]_ STATOUT[]_ STATOUT[]_ STATOUT[]_ STATOUT[]_ STATOUT[]_ STATOUT[0]_ STATOUT[]_ STATOUT[]_ STATOUT[]_ STATOUT[]_ STATOUT[]_ STATOUT[]_ STATOUT[]_ STATOUT[0]_ STATOUT[]_ STATOUT[]_ STATOUT[]_ STATOUT[]_ STATOUT[]_ STATOUT[]_ STATOUT[]_ STATOUT[0]_ UTOPIA XMIT A AF A AF AA AF Y AF A A A A K J G J G H H E LAV_A AF LAV_ W LAV_ A LAV_ F LAV_A AE LAV_ A LAV_ LAV_ F SO AF PRTY V ATA[] N ATA[] U ATA[] N ATA[] W ATA[] Y ATA[0] P ATA[] U ATA[] P ATA[] T ATA[] R ATA[] AE ATA[] R ATA[] AF ATA[] AA ATA[] T ATA[0] AE VGG R 00K HP-LAV R 00K K

4 NONE RAWING NO. OE IENT NO. SALE: A A / --_: T00-X0 T00-X L UH.0.0 L UH UH L L UH L UH +0 UH L XEIVER HFR-0 N 0 T- VEE T+ V V VEE S R+ R- 0 J XEIVER HFR-0 N 0 T- VEE T+ V V VEE S R+ R- 0 J XEIVER HFR-0 N 0 T- VEE T+ V V VEE S R+ R- 0 J XEIVER HFR-0 N 0 T- VEE T+ V V VEE S R+ R- 0 J.0. R L UH L UH R. sigdet td- 0 R. R0 R 0 R. 0 R. R 0 R R 0 0 R. R0 R.. R R 0 0 R R 0 R0.. R R. 0 R R 0 0 R0 0 R 0 R. R.0 SIGET_ SIGET_ AT-_ AT+_ SIGET_ AT+_ AT-_ 0 R 0 R. R. R AT-_ AT+_ 0 R. R. R 0 R. R. R AT-_ AT+_ AT-_ AT+_ AT+_A AT-_A SIGET_A AT+_A AT-_A.0.0 R 0 R 0 AT-_ R. R. AT+_

5 A J Polarity Peg J LAR0 LAR LAR LAR LAR MS0 LATA0 LATA LATA LATA LATA LATA LATA LATA LAR LAR LAR LAR LAR U A0 A A A A A A OE A U 0 S L IO IO IO IO IO IO 0 IO IO V VSS VSS V O IO O IO O IO0 0 IO IO WE N A A A A 0 A A0 A A N N KX LAR LAR LAR MWE LATA LATA LATA LATA LATA LATA0 LATA LATA LAR LAR LAR0 LAR LAR 0 0 PAR SO EN AR0 AR AR AR AR LAV K K K K K0 K K K K K K K K K K0 K K K K K K K K K K0 0 HP-0 HP- 0 HP- HP- HP- HP- HP- 0 HP- HP- HP- HP-0 HP- HP- HP- HP- HP- 0 HP-PAR 0 HP-SO HP-EN HP-AR0 HP-AR HP-AR 0 HP-AR HP-AR HP-LAV 0 HP-UTOPLK 0 HP-AR HP-AR HP-AR HP-AR HP-AR0 HP-EN R R R R R R K K K K K K J U All components inside dashed line will be eliminated on production version of this board LAR0 LAR LAR LAR LAR MS0 LATA LATA LATA LATA LATA0 LATA LATA LATA LAR LAR LAR LAR LAR A0 A A A A A A OE A U 0 S L IO IO IO IO IO IO 0 IO IO V VSS VSS V O IO O IO O IO0 0 IO IO WE N A A A A 0 A A0 A A N N KX LAR LAR LAR MWE MWE LATA LATA0 LATA LATA LATA LATA LATA LATA LAR LAR LAR0 LAR LAR 0 0 PAR SO EN AR0 AR AR AR AR LAV K K K K K K K K K K0 K K K K K K K K K K0 K K K K K HP-0 HP- HP- HP- HP- HP- HP- HP- HP- HP- HP-0 HP- HP- HP- HP- HP- HP-PAR HP-SO HP-EN HP-AR0 HP-AR HP-AR HP-AR HP-AR HP-LAV J HP-UTOPLK 0 Polarity Peg HP-AR HP-AR HP-AR HP-AR HP-AR0 HP-EN R R R K K R R K K R K K J OE IENT NO. / RAWING NO. T00-X0 SALE: NONE --_: A T00-X0-.

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