Changed in Rev.3. Title. Revision: Size: A4 Number:
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- Austen Daniel
- 5 years ago
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1 ontent:. R Memory. Nand Flash, I, SPI Memory, S card. Ethernet M. Ethernet Phy 0. Ethernet Phy. RS-, ebug RS-, User leds, Relay leds. N0, N, External RT. US, US power switch. L onnector, Expansion onnector, oot ip-switch 0. udio odec, IN/ onnectors. imensions, ooting Mode hanged in Rev.. hange silcscreen at R component. hanged MSV crystal footprint. hanged TS0 button footprint. dd Pull-up resistors to NN RY0/. dd Pull-up resistors to I0. dd optional SPI TS0 connection. dd R resistor to SSP0_LK ate:.0.0 ::
2 .0.0 0:: ate: EMI_S U EMI_RS R EMI_WE T EMI_E0 P EMI_E P EMI_R_OPEN K EMI_R_OPEN_F L EMI_LK L EMI_LK L EMI_KE T EMI_ N EMI_ T EMI_0 T EMI_00 U EMI_0 U EMI_0 U EMI_0 T EMI_0 U0 EMI_0 R EMI_0 R EMI_0 N EMI_0 U EMI_0 P0 EMI_0 U EMI_ T0 EMI_ U EMI_ T EMI_ N0 EMI_OT T EMI_VREF K EMI_VREF0 R EMI_OT0 R EMI_QM F EMI_QM0 M EMI_QS J EMI_QS J EMI_QS0 K EMI_QS0 K EMI_00 N EMI_0 M EMI_0 P EMI_0 N EMI_0 P EMI_0 P EMI_0 L EMI_0 M EMI_0 G EMI_0 H EMI_0 G EMI_ J EMI_ H EMI_ H EMI_ F EMI_ F U IMX V VQ VQ VQ VQ VQ VREF J V J K J K# K KE K V R OT K QS QS# V M V E Q0 G Q G Q H Q H Q H Q H Q F Q F VSSL J LQS# E LQS F N/ R S# L RS# K S# L WE# K 0 L L N/ L VSS VSS E VSS J VSS P VSSQ VSSQ VSSQ VSSQ VSSQ 0 M M M N N N N P P P 0 M P R N/ R N/ R Q Q Q0 Q Q Q Q Q VL J VQ E VQ G VQ G VQ G VQ0 G VSS N VSSQ E VSSQ F VSSQ F VSSQ H VSSQ0 H LM F UM U KTGQQ-IE R_0 R_ R_ R_ R_ R_ R_ R_ R_ R_ R_0 R_ R_ R_ R_ R_ R_0 R_ R_ R_ R_ R_ R_ R_ R_ R_ R_0 R_ R_ R_ R_0 R_ R_ R_LKR_P R_LKR_N R_KE R_S R_RS R_S R_WE VR VREF_R R K R K VR i R lassname: R R_QGTE0 R_QGTE R_R0 R_R R_R R_R R_R R_R R_R R_R R_R R_R R_R0 R_R R_R R_R R_R R_R R_RQS0_P R_RQS_P R_RQM0 R_RQM R_R0 R_R R_R R_R R_R R_R R_R R_R R_R R_R R_R0 R_R R_R R_R R_R R_R R_0 R_ R_ R_ R_ R_ R_ R_ R_ R_ R_0 R_ R_ R_ R_ R_ R_0 R_ R_ R_KE R_LKR_P R_LKR_N R_RS R_S R_WE R_S R_RQS_P R_RQS_N R_RQS0_N R_RQS0_P R_RQM0 R_RQM R_QGTE0 R_QGTE VREF_R R_OT R_OT R_RQS_N R_RQS0_N VR u EV-iMX TP V TP VREF rev.
3 .0.0 :0:00 ate: GPMI_R/SSP_SK/GPIO0_ R GPMI_WR/SSP_SK/GPIO0_ P GPMI_LE/SSP_/SSP_/GPIO0_ P GPMI_LE/SSP_/SSP_/GPIO0_ P GPMI_RESET/SSP_M/GPIO0_ L GPMI_RY/N0_RX/HS_TRIGGER/GPIO0_ L GPMI_RY0/SSP_R_ETET/US0_I/GPIO0_0 N GPMI_RY/SSP_M/GPIO0_ N GPMI_RY/N0_TX/ENET0_TX_ER/GPIO0_ M GPMI_E/N_RX/SIF_MLK/GPIO0_ M GPMI_E/N_TX/ENET0_RX_ER/GPIO0_ M GPMI_E/SSP_/GPIO0_ N GPMI_E0/SSP_0/GPIO0_ N GPMI_0/SSP_/GPIO0_ T GPMI_00/SSP_0/GPIO0_0 U GPMI_0/SSP_/GPIO0_ T GPMI_0/SSP_/GPIO0_ R GPMI_0/SSP_/GPIO0_ U GPMI_0/SSP_/GPIO0_ T GPMI_0/SSP_/GPIO0_ R GPMI_0/SSP_/GPIO0_ U SSP0_SK/GPIO_0 SSP0_M/GPIO_ SSP0_T0/GPIO_0 SSP0_T/GPIO_ SSP0_T/GPIO_ SSP0_T/GPIO_ SSP0_T/SSP_0/GPIO_ SSP0_T/SSP_/GPIO_ SSP0_T/SSP_M/GPIO_ SSP0_T/SSP_SK/GPIO_ SSP0_ETET/GPIO_ 0 SSP_SK/SSP_/ENET0 EVENT_/GPIO_ SSP_M/SSP_/ENET0 EVENT_IN/GPIO_ SSP_T0/SSP_/ENET0 EVENT_/GPIO_ SSP_T/SSP_/ENET0 EVENT_IN/GPIO_ E SSP_SK/URT_RX/SIF0_ST/GPIO_ SSP_MOSI/SSP_M/URT_TX/SIF0_ST/GPIO_ SSP_MISO/SSP_0/URT_RX/SIF_ST/GPIO_ SSP_SS0/SSP_/URT_TX/SIF_ST/GPIO_ SSP_SS/SSP_/SSP_/US_OVERURRENT/GPIO_0 SSP_SS/SSP_/SSP_/US0_OVERURRENT/GPIO_ SSP_SK/URT_TX/ENET EVENT0_/GPIO_ SSP_MOSI/SSP_M/URT_RX/ENET EVENT0_IN/GPIO_ SSP_MISO/SSP_0/URT_RTS/ENET EVENT_/GPIO_ SSP_SS0/SSP_/URT_TS/ENET EVENT_IN/GPIO_ U IMX WE E RE 0 WP R/ I/O0 VSS PRE VSS LE 0 LE I/O 0 I/O I/O I/O I/O I/O I/O 0 U KFG0U0M-PI0 GPMI_0 GPMI_ GPMI_ GPMI_ GPMI_ GPMI_ GPMI_ GPMI_ GPMI_0 GPMI_ GPMI_ GPMI_ GPMI_ GPMI_ GPMI_ GPMI_ NN_WP GPMI_LE GPMI_LE GPMI_WR GPMI_R GPMI_R GPMI_WR NN_WP GPMI_LE GPMI_LE GPMI_E0 GPMI_REY0 GPMI_REY0 GPMI_E0 _VIO SSP_MOSI SSP_MISO SSP_SK SSP_S0 LO_V RP 0K LO_V LO_V 0. SF_HOL SF_WP HOL S SK SIMO SOMI WP U MXL0 SO- SSP_SK SSP_MOSI SSP_MISO SSP_S0 N_RX0 N_TX0 N_TX N_RX SSP0_T SSP0_M S_V SSP0_LK SSP0_T0 SSP0_T SSP0_T 0u X SR SSP0_LK SSP0_M SSP0_T0 SSP0_T SSP0_T SSP0_T SSP0_ETET SSP0_ETET SSP_S SSP_S SSP_SK SSP_MOSI SSP_MISO SSP_S0 LO_V SR_PWR_ON S_V LE_USER0 LE_USER GPIO_ GPIO_ GPIO_ GPIO_ GPIO_ GPIO_ S SL WP U 0 I0_SL I0_S LO_V EV-iMX GPMI_E GPMI_E IN EN O U0 TPS0 GPMI_REY GPMI_REY RP 0K RP 0K RP 0K _VIO GPMI_REY0 GPMI_REY R R R RP 0K U0 Not populated
4 U IMX X VIEO X EXPNSION L_ENLE/GPIO_ L_RESET/L_VSYN/GPIO_0 L_OTLK/SIF_MLK /ETM_TLK/GPIO_0 L_HSYN/SIF_ST/ETM_TTL/GPIO_ L_VSYN/SIF_ST0/GPIO_ L_S/L_ENLE/GPIO_ L_RS/L_OTLK/GPIO_ L_WR_RWN/L_HSYN/ETM_TLK/GPIO_ L_R_E/L_VSYN/ETM_TTL/GPIO_ L_/ENET EVENT_IN/ETM_0/GPIO_ L_/ENET EVENT_/ETM_/GPIO_ L_/ENET EVENT_IN/ETM_/GPIO_ L_0/ENET EVENT_/ETM_/GPIO_0 L_/ETM_/GPIO_ L_/ETM_/GPIO_ L_/ETM_/GPIO_ L_/ETM_/GPIO_ L_/ETM_/GPIO_ L_/ETM_/GPIO_ L_/ETM_/GPIO_ L_/ETM_/GPIO_ L_/ETM_/GPIO_ L_0/ETM_0/GPIO_0 L_0/ETM_/ETM_/GPIO_ L_0/ETM_/ETM_/GPIO_ L_0/ETM_/GPIO_ L_0/ETM_/GPIO_ L_0/ETM_/GPIO_ L_0/ETM_/ETM_/GPIO_ L_0/ETM_/ETM_/GPIO_ L_0/ETM_/GPIO_ L_0/ETM_/GPIO_ L_00/ETM_0/GPIO_0 N M N M L P M K P R T U R T U R T U U T T R R P P P N M M L L K K L_EN RELY L_LK L_HSYN L_VSYN US_PWR_EN ISPLY_ON RELY US0_PWR_EN RE RE RE RE RE RE RE GREEN GREEN GREEN GREEN GREEN GREEN GREEN GREEN0 LUE LUE LUE LUE LUE LUE LUE LUE0 L_ L_ L_ L_0 L_ L_ L_ TS_INT L_ L_ L_ L_ L_ L_0 L_ L_ L_ L_ L_ L_ L_ L_ L_ L_0 TS_INT TS_X+/SSP_SK TS_X-/SSP_MISO LO_V L_VSYN L_EN LUE LUE GREEN GREEN GREEN RE RE RE LO_V JTG_TRST JTG_TI JTG_TMS JTG_TK JTG_RTK JTG_TO RESET X JTG 0 0 ISPLY_ON TS_Y+/SSP_S TS_Y-/SSP_MOSI V_V L_LK L_HSYN LUE LUE LUE GREEN GREEN GREEN RE RE RP RP RP RP L_0 L_ L_ L_ V_V SSP_SK SSP_MOSI SSP_MISO SSP_S SSP_S EXP_I_SL EXP_I_S EXP_URT0_RX EXP_URT0_TX GPIO_ GPIO_ GPIO_ LR 0K 0K 0K K V_V SSP_SK SSP_MOSI SSP_MISO SSP_S0 URT_RX URT_TX URT_RX URT_TX GPIO_ GPIO_ GPIO_ URT_RX URT_TX S OOT RP RP RP RP RP RP RP RP _V LR Touch Screen ased TS_X+ TS_X- RP RP TS_X+/SSP_SK TS_X-/SSP_MISO L_ Voltage select V RP 0K TS_Y+ TS_Y- RP RP TS_Y+/SSP_S TS_Y-/SSP_MOSI L_ ETM isable RP 0K TS0 Touch Screen ased NP SSP_SK SSP_MISO SSP_S SSP_MOSI RP RP RP RP TS_X+/SSP_SK TS_X-/SSP_MISO TS_Y+/SSP_S TS_Y-/SSP_MOSI EV-iMX ate:.0.0 :0:0 rev. RP ISPLY_ON 0K OTP/IP SWITH LO_V
5 .0.0 :0: ate: URT0_RX/I0_SL/URT_TS/GPIO_0 G URT0_TX/I0_S/URT_RTS/GPIO_ H URT0_TS/URT_RX/URT_RX/GPIO_ J URT0_RTS/URT_TX/URT_TX/GPIO_ J URT_RX/SSP_R_ETET/PWM_0/GPIO_ L URT_TX/SSP_R_ETET/PWM_/GPIO_ K URT_RX/SSP_/SSP_/GPIO_ F URT_TX/SSP_/SSP_/GPIO_ F URT_TS/I_SL/SIF_ITLK/GPIO_0 H URT_RTS/I_S/SIF_LRLK/GPIO_ H URT_RX/N0_TX/ENET0 EVENT0_/GPIO_ M URT_TX/N0_RX/ENET0 EVENT0_IN/GPIO_ L URT_TS/N_TX/ENET0 EVENT_/GPIO_ L URT_RTS/N_RX/ENET0 EVENT_IN/GPIO_ K I0_SL/TIMROT_ROTRY/URT_RX/GPIO_ I0_S/TIMROT_ROTRY/URT_TX/GPIO_ ENET0_M/GPMI_E/SIF0_ST/GPIO_0 G ENET0_MIO/GPMI_E/SIF0_ST/GPIO_ H ENET0_RX_EN/GPMI_E/SIF_ST/GPIO_ E ENET0_RX0/GPMI_E/SIF_ST/GPIO_ H ENET0_RX/GPMI_REY/GPIO_ H ENET0_TX_EN/GPMI_REY/GPIO_ F ENET0_TX0/GPMI_REY/GPIO_ F ENET0_TX/GPMI_REY/GPIO_ F ENET0_RX/ENET_RX0/ENET0 EVENT0_/GPIO_ J ENET0_RX/ENET_RX/ENET0 EVENT0_IN/GPIO_0 J ENET0_TX/ENET_TX0/ENET0 EVENT_/GPIO_ G ENET0_TX/ENET_TX/ENET0 EVENT_IN/GPIO_ G ENET0_TX_LK/HS_TRIGGER/ENET0 EVENT_/GPIO_ E ENET0_RX_LK/ENET0_RX_ER/ENET0 EVENT_IN/GPIO_ F ENET0_OL/ENET_TX_EN/ENET0 EVENT_/GPIO_ J ENET0_RS/ENET_RX_EN/ENET0 EVENT_IN/GPIO_ J ENET_LK/GPIO_ E PWM0/I_SL/URT_RX/GPIO_ K PWM/I_S/URT_TX/GPIO_ L SIF0_MLK/PWM_/URT_TS/GPIO_0 G SIF0_LRLK/PWM_/URT_RTS/GPIO_ G SIF0_ITLK/PWM_/URT_RX/GPIO_ F SIF0_ST0/PWM_/URT_TX/GPIO_ E SIF_ST0/PWM_/SIF0_ST/GPIO_ E SPIF/ENET_RX_ER/GPIO_ PWM/GPIO_ E PWM/GPIO_ E0 U IMX ENET_M ENET_MIO ENET0_RX_EN ENET0_RX0 ENET0_RX ENET0_TX_EN ENET0_TX0 ENET0_TX ENET_RX0 ENET_RX ENET_TX ENET_TX0 ENET_INT ENET_RST ENET_TX_EN ENET_RX_EN ENET_LK URT_RX URT_TX EXP_URT0_RX EXP_URT0_TX URT_TX URT_RX I_MLK I_LK I_WLK I_ I_IN I0_S I0_SL URT_RX URT_TX SPIF EXP_I_S EXP_I_SL URT_RX URT_TX SR_PWR_ON ON_ ON_ URT_RX URT_TX EV-iMX ENET_INT ENET_INT ENET0_INT LO_V V T RP 0K rev.
6 .0.0 :0: ate: _LN _V _VIO _V LP _TT VP TTERY PSWITH RESET VV E VP VXTL RT_XTLO RT_XTLI XTLO XTLI JTG_TMS JTG_TK E JTG_TI E JTG_TO E JTG_TRST JTG_RTK/GPIO_0 E EUG TESTMOE 0 US0M 0 US0P 0 USM USP HS0 LR LR LR LR LR LR LR0 US0_OVERURRENT K US0_I J US_OVERURRENT K UE IMX US0 N US0 P US N US P US0_OV US_OV US0_I Q MHz Q pf pf pf pf 0. VXTL V 0 0u 0u L uh/. _VIO _V _V VP VSS VSS VSS VSS VSS E VSS E VSS H VSS H VSS H0 VSS0 H VSS H VSS H VSS J VSS J VSS J VSS K VSS K0 VSS K VSS L0 VSS0 L VSS M VSS N VSS U VIO_ VSS_ VSS V VIO_0 E VIO_ E VIO_0 F VIO_ F VIO_ G VIO_ G V0 F0 V F V F V G0 V G V G V K VIO_EMI G VIO H VIO J VIO J VIO J0 VSSIO_EMI0 F VSSIO_EMI F VIO_EMI G VIO_EMI G VIO_ G VSSIO_EMI H VIO_EMIQ J VIO_EMIQ K VSSIO_EMI L VIO_EMI_ L VIO_EMI_0 M0 VIO_EMI M VIO_EMI M VSSIO_EMI M VIO_ N VIO_EMI N VIO_EMI_ N VIO_EMI N VIO_EMI_ P VSSIO_EMI P VSSIO_EMI P VSSIO_EMI_ R0 VSSIO_EMI R VIO_EMI R VIO_EMIQ0 R VSSIO_EMI T VSSIO_EMI U UF IMX L F L F L F _V _VIO VR _V _V _V VR TS_Y+ TS_Y- TS_X+ TS_X- JTG_TMS JTG_TK JTG_TI JTG_TO JTG_TRST JTG_RTK _V RESET _ORE u u 0 0u LI-ION VP X Li-ION LI-ION VP u u LI-ION VP R K EV-iMX PSWITH HS0 LR R K n _V S POWER S REOVERY VXTL _V R0 K R K 0. PSWITH X0 HS HS0 0 TP VIO TP ORE R K RP 0K rev.
7 HP RP 0K R R R R NP U u K NP X RP 0. HP_L LINEIN_L LINE_L X 0K RP 0. HP_R IN LINEIN_R LINE_R 0K R NP u R RP HP_V HP 0K K R Устанавливается при LINE R Устанавливается при HP R _MI R _MI MI R 0._MI MI_IS MI_IS _MI TRL_R0_S TRL_MOE 0._MI X SPIF R0 0K_MI MI_IS Microphone Input - Not Populated SPIF LO_V RP 0K RP 0K I0_SL I0_S I_ I_IN I_MLK I_WLK I_LK I0_SL I0_S IS_ IS_IN SYS_MLK IS_LRLK IS_SLK I_SL I_S -P SGTL000 VG PFILT N N N N N N V V VIO R0 NP 0 0. LO_V LO_V LO_V 0u 0u EV-iMX ate:.0.0 :0: rev.
8 .0.0 :: ate: _V R K LO_V u LO_V nf T+ T- T N R- T TX+ TX- RX+ RX- R+ 0 X ETHERNET 0 ETH0_LE0 ETH0_LE ETH0_LE0 ETH0_LE ETH0_RX_P ETH0_RX_N ETH0_TX_P ETH0_TX_N ENET_M ENET_MIO ENET0_RX0 ENET0_RX ENET0_RX_EN ENET0_RXER F0M0 ENET0_TX_EN ENET0_TX0 ENET0_TX ENET_RST RP R RP R RP R RP R RX+ RX- 0 TX+ TX- MIO M RX RX RX 0 RX0 RXV RXLK RXER INT/TXER TXLK 0 TXEN TX0 TX TX TX OL/RMII RS/RMII LE/SP00 LE/UPLEX NRST XO XI EXRES VIO V V VORE VSS/FLG U LN0 LO_V u RP 0K RP 0K RP 0K RP 0K RP 0K PHY ddress 000 R R F0M0 R R F0M ENET_LK 0 0. _V 0u EV-iMX ENET0_INT 0. RP 0K RP RP rev.
9 .0.0 :: ate: _V LO_V R K LO_V u 0. 0 u LO_V nf T+ T- T N R- T TX+ TX- RX+ RX- R+ 0 X ETHERNET 0 ETH_LE0 ETH_LE ETH_LE0 ETH_LE ETH_RX_P ETH_RX_N ETH_TX_P ETH_TX_N ENET_M ENET_MIO ENET_RX0 ENET_RX ENET_RX_EN ENET_RXER F0M ENET_TX_EN ENET_TX0 ENET_TX ENET_RST RP0 R RP0 R RP0 R RP0 R RX+ RX- 0 TX+ TX- MIO M RX RX RX 0 RX0 RXV RXLK RXER INT/TXER TXLK 0 TXEN TX0 TX TX TX OL/RMII RS/RMII LE/SP00 LE/UPLEX NRST XO XI EXRES VIO V V VORE VSS/FLG U LN0 LO_V u RP 0K RP 0K RP 0K RP 0K RP 0K RP 0K RP 0K PHY ddress 00 _V EV-iMX ENET_INT RP RP rev.
10 .0.0 ::0 ate: URT_RX URT_TX V+ V- U MXE X URT 0 0. LO_V URT_RX_V URT_TX RO RE E I U SNHV X RS-_ V ON V W R u URT_RX_V RO RE E I U SNHV X RS_ V ON V W R VL RELY LE LE_USER0 LE_USER _V VL USER LE _V R R EV-iMX X EXT_URT URT_RX ON_ URT_TX URT_RX ON_ URT_TX Y OE U LVG V Y OE U LVG V Y OE U LVG V Y OE U LVG V Y OE U LVG LO_V Y OE U LVG LO_V URT_TX_V URT_TX_V URT_TX ON_ ON_ ON V ON V URT_TX_V URT_TX_V URT_RX_V URT_RX_V URT_RX URT_RX RP RP RP RP rev.
11 .0.0 ::0 ate: TX RX SHN RS NL NH U MX0ES N_RX0 N_TX0 LO_V NL0 NH0 X N TX RX SHN RS NL NH U MX0ES N_RX N_TX LO_V NL NH X N0 N_RX0 N_RX N_TX0 N_TX X EXT_N EV-iMX 0 0. X X SQW SL VT S U S F I0_S I0_SL LO_V R K LO_V 0. VT u X S0SM pf pf W R W R R K R K Not Populated rev. NP
12 .0.0 :: ate: X0 US0_PWR US_PWR US0 N US0 P US N US P IN EN O U TPS0 VV LO_V u 0. US0_PWR US0_OV US0_PWR_EN IN EN O U TPS0 VV RP 0K LO_V u 0. US_PWR US_OV US_PWR_EN X USI US0_I _VIO EV-iMX R K R K RP 0K - HOST - EVIE rev.
13 .0.0 ::0 ate: 00u/V 0 0. VIN EN OOT VSENSE PH OMP SS U TPS 0. n L 0 uh n pf R K u R0 K R K R K V_V VSNS VSNS VIN u 0 VV X POWER 0 -V R NP -V TVS V V S S S S K HF X RELY K HF X RELY VV Q Q R0 R R R LL LL R K R K RELY RELY R R RESET _V R K S RESET IN U TLV- LO_V V 0. u IN U0 TLV- LO_V V 0 n 0 u EV-iMX R0 K V POWER LO_V TP V TP LO_V TP LO_V V T n R K RP RP RP RP R K R K R K R K R K pf rev.
14 ooting Mode NN ON US ON SR ON SSP ON imensions
15 Mounting Holes
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