ECE 2300 Digital Logic & Computer Organization

Transcription

1 ECE 2300 Digital Logic & Computer Organization pring 201 More inary rithmetic LU 1

2 nnouncements Lab 4 prelab () due tomorrow Lab 5 to be released tonight 2

3 Example: Fixed ize 2 C ddition White stone = 0 lack stone = 1 With each row representing a 4-bit 2 s complement, adding which two rows would cause an overflow? Row 1 + Row 4 : (-3) + (-6) Row 3 + Row 4 : (-5) + (-6) 3

4 Review: Full dder Cin Cout Cin Cout OR F 4

5 uilding a inary dder carries () () () Inputs & outputs for the i th bit position Inputs: i, i and Ci (carry-in) Outputs: i (sum) and Ci+1 (carry-out) Carry-out of a bit position is the carry-in for next bit position 5

6 Four it dder a 3 b 3 a 2 b 2 a 1 b 1 a 0 b 0 c 4 Cout Cin c 3 Cout Cin c 2 Cout Cin c 1 Cout Cin 0 s 3 s 2 s 1 s 0 Ripple Carry dder (RC) 6

7 Two s Complement ubtraction Negate second operand and add (104) (17) (104) (-17) (7) 7

8 Four it ubtractor b 3 b 2 b 1 b 0 negating the second operand + b 3 b 2 b 1 b 0 1 a 3 b 3 a 2 b 2 a 1 b 1 a 0 b 0 c 4 Cout Cin c 3 Cout Cin c 2 Cout Cin c 1 Cout Cin 1 s 3 s 2 s 1 s 0

9 Four it dder / ubtractor a 3 b 3 a 2 b 2 a 1 b 1 a 0 b c 4 Cout Cin c 3 Cout Cin c 2 Cout Cin c 1 Cout Cin sub s 3 s 2 s 1 s 0 9

10 dder Implementations Many different adder implementations exist, which differ in speed and circuit complexity Ripple carry adder is simple but slow Each 1-bit full adder must wait for the carry bit to be calculated from the previous full adder Common techniques to speed up carry propagation Carry lookahead Carry select etc. 10

11 Carry Lookahead dder (CL) Calculation of carry out of M is slow for large RCs Carry has to propagate from L to the M, which forms the longest path (critical path) CL adder calculates groups of carries in parallel 11

12 Carry Generation and Propagation generated generated propagated generated Cout = 1 from a bit position happens for 2 reasons Carry is generated from this bit position Carry in to this position is propagated to the next 12

13 Carry Generation and Propagation Carry into i th position: c i lso the carry out from (i-1) th position Carry generation function for the i th position G i = a i b i Carry propagation function for the i th position P i = a i + b i Carry out of the i th position c i+1 = G i + P i c i 13

14 Carry Out Equations for 4-bit dder c 1 = G 0 + P 0 c 0 c 2 = G 1 + P 1 c 1 G i = a i b i P i = a i + b i = G 1 + P 1 G 0 + P 1 P 0 c 0 c 3 = G 2 + P 2 c 2 = G 2 + P 2 G 1 + P 2 P 1 G 0 + P 2 P 1 P 0 c 0 c 4 = G 3 + P 3 c 3 = G 3 + P 3 G 2 + P 3 P 2 G 1 + P 3 P 2 P 1 G 0 + P 3 P 2 P 1 P 0 c 0 generate carry from this position propagate carry generated in position 2 propagate carry generated in position 1 propagate carry generated in position 0 propagate carry in to position 0 14

15 Carry Out Logic for 4-bit dder G i = a i b i P i = a i + b i c 4 = G 3 + P 3 c 3 = G 3 + P 3 G 2 + P 3 P 2 G 1 + P 3 P 2 P 1 G 0 + P 3 P 2 P 1 P 0 c 0 = G 3 + P 3 ( G 2 + P 2 ( G 1 + P 1 G 0 ) ) + ( P 3 P 2 P 1 P 0 ) c 0 G 3:0 Carry generation from bits 3-0 P 3:0 Carry propagation through bits 3-0 G 3:0 G 3 P 3 G 2 P 2 G 1 P 1 G 0 c 4 c 0 P 3:0 P 3 P 2 P 1 P 0 15

16 32-bit CL with 4-bit RCs a 31:2 b 31:2 a 27:24 b 27:24 a 7:4 b 7:4 a 3:0 b 3:0 c out (c 32 ) 4-bit CL lock c 2 4-bit CL lock c 24 4-bit CL lock c 4 4-bit CL lock c in (c 0 ) 31:2 27:24 7:4 3:0 Carry out logic gets more complicated beyond 4 bits CLs are often implemented as 4-bit modules and instantiated in a hierarchical way to realize wider adders 16

17 32-bit CL with 4-bit RCs a 31:2 b 31:2 a 27:24 b 27:24 a 7:4 b 7:4 a 3:0 b 3:0 c out (c 32 ) 4-bit CL lock c 2 4-bit CL lock c 24 4-bit CL lock c 4 4-bit CL lock c in (c 0 ) 31:2 27:24 7:4 3:0 a 3 b 3 a 2 b 2 a 1 b 1 a 0 b 0 c 3 c F F 2 c F 1 c F G 3:0 G 3 P 3 G 2 P 2 G 1 P 1 G 0 P s and G s for all CL blocks are generated in parallel c 4 c 0 P 3:0 P 3 P 2 P 1 P 0 17

18 Longest Delay (Critical Path) its 31-2 a 31 b 31 a 30 b 30 a 29 b 29 a 2 b 2 c 31 c 30 c 29 c 2 F F F F its 7-4 a 7 b 7 a 6 b 6 a 5 b 5 a 4 b 4 c 7 c 6 c 5 c 4 F F F F its 3-0 a 3 b 3 a 2 b 2 a 1 b 1 a 0 b 0 c 3 c 2 c 1 c 0 F F F F c G 31:2 c P 31:2 G 31 P 3 G 2 P 2 G 1 P 29 G 2 P 31 P 30 P 29 P 2 c 7 G 7:4 c P 7:4 G 7 P 7 G 6 P 6 G 5 P 5 G 4 P 7 P 6 P 5 P 4 c 4 3 G 3:0 c P 3:0 G 3 P 3 G 2 P 2 G 1 P 1 G 0 P 3 P 2 P 1 P 0 1

19 Longest Delay (Critical Path) its 31-2 a 31 b 31 a 30 b 30 a 29 b 29 a 2 b 2 c 31 c 30 c 29 c 2 F F F F its 7-4 a 7 b 7 a 6 b 6 a 5 b 5 a 4 b 4 c 7 c 6 c 5 c 4 F F F F its 3-0 a 3 b 3 a 2 b 2 a 1 b 1 a 0 b 0 c 3 c 2 c 1 c 0 F F F F c G 31:2 c P 31:2 G 31 P 3 G 2 P 2 G 1 P 29 G 2 P 31 P 30 P 29 P 2 c 7 G 7:4 c P 7:4 G 7 P 7 G 6 P 6 G 5 P 5 G 4 P 7 P 6 P 5 P 4 c 4 3 G 3:0 c P 3:0 G 3 P 3 G 2 P 2 G 1 P 1 G 0 P 3 P 2 P 1 P 0 19

20 Our Microprocessor is uilt to Compute +2 sext({off,0}) dder MUX 0 1 MP PC Inst. RM DR M F MD RW MW Decoder RF RW DR D_in Data Data E IMM 0 1 M F m F 0 LU V C Z N M_address Data_in Data RM MW 0 1 MD LU is the computing core of a processor 20

21 What is an LU? rithmetic Logic Unit (LU): Combinational logic circuit that combines a variety of operations into a single unit Common operations may include ddition and subtraction Logical (OR, ND) hift Comparisons 21

22 imple -it LU I O CI LU CO O 3 OP Y Z 22

23 LU Operations, Inputs & Outputs Operations ddition and ubtraction itwise ND and OR Left hift and Right hift Inputs,, Carry In (CI) hift In (I) Code indicating operation to be performed (OP) Outputs Y, Carry Out (CO) hift Out (O) Flags regarding the result of the operation Overflow flag (O), Zero flag (Z) 23

24 hift Operations Left hift: shifts each bit left by 1 position I O= I M shifted into O, I shifted into L Right hift: shifts each bit right by 1 position I I =O L shifted into O, I shifted into M 24

25 LU lock Diagram 25 LOP Y Logical CI Y CO dder I OP Y hifter O Y O CO I CI OP EL Control Logic LOP OP OEL OP O O NOR Z

26 Example: LU Operation Encodings OP Name OP EL CI LOP OP OEL Operation DD Y = + + CI U Y = ND Y = ND OR Y = OR HL Y = [6..0],I HR Y = I,[7..1] P Y = CI dder Y CO CI O Logical Y LOP CO O Y OP Control Logic EL 3 OP LOP OP OEL 2 2 I hifter Y I O OP O NOR Z 26

27 H&H efore Next Class Next Time Memories 27