F3 F F1 GND

Transcription

1 4-BIT ARITHMETIC LOGIC UNIT The MC54/74F82 performs three arithmetic and three logic operatio on two 4-bit words, A and B. Two additional elect input codes force the Function outputs LOW or HIGH. An Overflow output is provided for convenience in twos complement arithmetic. A Carry output is provided for ripple expaion. For high-speed expaion using a Carry Lookahead Generator, refer to the F8 data sheet. Performs ix Arithmetic and Logic Functio electable Low (Clear) and High (Preset) Functio LOW Input Loading Minimizes Drive Requirements Carry Output for Ripple Expaion Overflow Output for Twos Complement Arithmetic MC54/74F82 4-BIT ARITHMETIC LOGIC UNIT FAT CHOTTKY TTL CONNECTION DIAGRAM VCC A2 B2 Cn Cn+4 OVR F F2 2 J UFFIX CERAMIC CAE A B A0 B0 0 2 F0 LOGIC YMBOL 9 0 F GND N UFFIX PLATIC CAE 78-0 DW UFFIX OIC CAE 75D Cn 2 0 A0 B0 A B A2 B2 F0 F F2 F Cn+4 OVR 4 ORDERING INFORMATION MC54FXXXJ Ceramic MC74FXXXN Plastic MC74FXXXDW OIC GUARANTEED OPERATING RANGE ymbol Parameter Min Typ Max Unit VCC upply Voltage 54, V TA Operating Ambient Temperature Range C IOH Output Current High 54, 74.0 ma IOL Output Current Low 54, 74 ma 4-84

2 MC54/74F82 LOGIC DIAGRAM Cn B0 Please note that this diagram is provided only for the understanding of logic operatio and should not be used to estimate propagation delays. F0 A0 B F A B2 F2 A2 B F A 0 P G OVR Cn+4 F8 ONLY F82 ONLY

3 MC54/74F82 DC CHARACTERITIC OVER OPERATING TEMPERATURE RANGE (unless otherwise specified) Limits ymbol Parameter Min Typ Max Unit Test Conditio VIH Input HIGH Voltage 2.0 V Guaranteed Input HIGH Voltage VIL Input LOW Voltage 0.8 V Guaranteed Input LOW Voltage VIK Input Clamp Diode Voltage.2 V IIN = 8 ma VCC = MIN VOH Output HIGH Voltage 54, V IOH =.0 ma VCC = 4.5 V V IOH =.0 ma VCC = 4.75 V VOL Output LOW Voltage V IOL = ma VCC = MIN IIH IIL Input HIGH Current Input LOW Current 0 2 Inputs 0.6 ma Other Inputs 2.4 ma Cn Input.0 ma A VIN = 2.7 V 00 A VIN = 7.0 V VIN = 0.5 V VCC = MAX VCC = MAX IO Output hort Circuit Current (Note 2) ma VOUT = 0 V VCC = MAX ICC Power upply Current 54 8 ma NOTE:. For conditio such as MIN or MAX, use the appropriate value specified under guaranteed operating ranges. 2. Not more than one output should be shorted at a time, nor for more than second. 0, Cn = HIGH; Other Inputs GND V CC = MAX FUNCTIONAL DECRIPTION ignals applied to the elect inputs 0 2 determine the mode of operation, as indicated in the Function elect Table. An exteive listing of input and output levels is shown in the Truth Table. The circuit performs the arithmetic functio for either active HIGH or active LOW operands, with outputlevels in the same convention. In the ubtract operating modes, it is necessary to force a carry (HIGH for active HIGH operands, LOW for active LOW operands) into the Cn input of the least significant package. Ripple expaion is illustrated in Figure. The overflow output OVR is the Exclusive-OR of Cn + and Cn+4; a HIGH signal on OVR indicates overflow in twos complement operation. Typical delays for Figure are given in Figure 2. FUNCTION ELECT TABLE elect 0 2 Operation L L L Clear H L L B Minus A L H L A Minus B H H L A Plus B L L H H L H A + B L H H AB H H H Preset H = HIGH Voltage Level L = LOW Voltage Level 4-86

4 MC54/74F82 A0 0 B A4 A7 B4 B7 A8 A B8 B A2 A5 B2 B5 Cin Cn F82 C n+4 Cn F82 C n+4 Cn F82 C n+4 Cn F82 C n+4 OVR Cout OVERFLOW ELECT F0 F F4 F7 F8 F F2 F5 Figure. 6-Bit Ripple Carry ALU Expaion Path egment Toward F Output Cn + 4, OVR Ai or Bi to Cn Cn to Cn Cn to Cn Cn to F 8. Cn to Cn + 4, OVR 8.0 Total Delay Figure 2. 6-Bit Delay Tabulation AC CHARACTERITIC 54/74F 54F 74F TA = +25 C TA = 55 to +25 C TA = 0 to 70 C VCC = +5.0 V VCC = 5.0 V 0% VCC = 5.0 V 0% CL = 50 pf CL = 50 pf CL = 50 pf ymbol Parameter Min Typ Max Min Max Min Max Unit tplh Propagation Delay tphl Cn to Fi tplh Propagation Delay tphl Any A or B to Any F t PLH Propagation Delay tphl i to Fi tplh Propagation Delay tphl Ai or Bi to Cn tplh Propagation Delay tphl i to OVR or Cn tplh Propagation Delay tphl Cn to Cn tplh Propagation Delay tphl Cn to OVR tplh Propagation Delay tphl Ai or Bi to OVR

5 MC54/74F82 INPUT TRUTH TABLE OUTPUT Function 0 2 Cn An Bn F0 F F2 F OVR Cn + 4 CLEAR B MINU A 0 0 A MINU B 0 0 A PLU B 0 0 X X X X X X X A + B 0 X X X AB 0 X X PREET X = HIGH Voltage Level 0 = LOW Voltage Level X = Immaterial 4-88