MM74C150 MM82C19 16-Line to 1-Line Multiplexer 3-STATE 16-Line to 1-Line Multiplexer
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1 MM74C150 MM82C19 16-Line to 1-Line Multiplexer 3-STATE 16-Line to 1-Line Multiplexer General Description The MM74C150 and MM82C19 multiplex 16 digital lines to 1 output. A 4-bit address code determines the particular 1- of-16 inputs which is routed to the output. The data is inverted from input to output. A strobe override places the output of MM74C150 in the logical 1 state and the output of MM82C19 in the highimpedance state. Ordering Code: All inputs are protected from damage due to static discharge by diode clamps to V CC and GND. Features Wide supply voltage range: 3.0V to 15V Guaranteed noise margin: 1.0V High noise immunity: TTL compatibility: Order Number Package Number Package Description Connection Diagram Pin Assignments for DIP 0.45 V CC (typ.) Drive 1 TTL Load MM74C150N N24A 24-Lead plastic Dual-In-Line Package (PDIP), JEDEC MS-010, Wide MM82C19N N24A 24-Lead plastic Dual-In-Line Package (PDIP), JEDEC MS-010, Wide MM74C150 MM82C19 16-Line to 1-Line Multiplexer 3-STATE 16-Line to 1-Line Multiplexer
2 MM74C150 MM82C19 Truth Table MM74C150 Inputs Output D C B A STROBE E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 E10 E11 E12 E13 E14 E15 W X X X X 1 X X X X X X X X X X X X X X X X 1 (Note 1) X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X 0 X X X X X X X X X X X X X X X 1 X X X X X X X X X X X X X X X X 0 X X X X X X X X X X X X X X X 1 X X X X X X X X X X X X X X X X 0 X X X X X X X X X X X X X X X 1 X X X X X X X X X X X X X X X X 0 X X X X X X X X X X X X X X X 1 X X X X X X X X X X X X X X X X 0 X X X X X X X X X X X X X X X 1 X X X X X X X X X X X X X X X X 0 X X X X X X X X X X X X X X X 1 X X X X X X X X X X X X X X X X 0 X X X X X X X X X X X X X X X 1 X X X X X X X X X X X X X X X X 0 X X X X X X X X X X X X X X X 1 X X X X X X X X X X X X X X X X 0 X X X X X X X X X X X X X X X 1 X X X X X X X X X X X X X X X X 0 X X X X X X X X X X X X X X X 1 X X X X X X X X X X X X X X X X 0 X X X X X X X X X X X X X X X 1 X X X X X X X X X X X X X X X X 0 X X X X X X X X X X X X X X X 1 X X X X X X X X X X X X X X X X 0 X X X X X X X X X X X X X X X 1 X X X X X X X X X X X X X X X X 0 X X X X X X X X X X X X X X X 1 X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X 1 0 Note 1: For MM72C19/MM82C19 this would be Hi-Z, everything else is the same. 2
3 Logic Diagrams MM74C150 MM74C150 MM82C19 3
4 MM74C150 MM82C19 Logic Diagrams (Continued) MM82C19 4
5 Absolute Maximum Ratings(Note 2) Voltage at Any Pin Operating Temperature Range Storage Temperature Range Power Dissipation Dual-In-Line Small Outline Operating V CC Range DC Electrical Characteristics 0.3V to V CC +0.3V 40 C to +85 C 65 C to +150 C 700 mw 500 mw 3.0V to 15V Min/Max limits apply across temperature range unless otherwise noted. V CC Lead Temperature 18V (soldering, 10 seconds) 260 C Note 2: Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. Except for Operating Temperature Range they are not meant to imply that the devices should be operated at these limits. The Electrical Characteristic table provides conditions for actual device operation. Symbol Parameter Conditions Min Typ Max Units CMOS to CMOS V IN(1) Logical 1 Input Voltage V CC = 5.0V 3.5 V V CC = 10V 8.0 V V IN(0) Logical 0 Input Voltage V CC = 5.0V 1.5 V V CC = 10V 2.0 V V OUT(1) Logical 1 Output Voltage V CC = 5.0V, I O = 10 µa 4.5 V V CC = 10V, I O = 10 µa 9.0 V V OUT(0) Logical 0 Output Voltage V CC = 5.0V, I O = +10 µa 0.5 V V CC = 10V, I O = +10 µa 1.0 V I IN(1) Logical 1 Input Current V CC = 15V, V IN = 15V V I IN(0) Logical 0 Input Current V CC = 15V, V IN = 0V µa I OZ Output Current in High Impedance State MM82C19 V CC = 15V, V O = 15V µa V CC = 15V, V O = 0V µa I CC Supply Current V CC = 15V µa CMOS/LPTTL Interface V IN(1) Logical 1 Input Voltage 74C, 82C, V CC = 4.75V V CC 1.5 V V IN(0) Logical 0 Input Voltage 74C, 82C, V CC = 4.75V 0.8 V V OUT(1) Logical 1 Output Voltage 74C, 82C, V CC = 4.75V, I O = 1.6 ma 2.4 V V OUT(0) Logical 0 Output Voltage 74C, 82C, V CC = 4.75V, I O = 1.6 ma 0.4 V Output Drive (Short Circuit Current) I SOURCE Output Source Current V CC = 5.0V, V OUT = 0V, T A = 25 C ma (P-Channel) I SOURCE Output Source Current V CC = 10V, V OUT = 0V, T A = 25 C ma (P-Channel) I SINK Output Sink Current V CC = 5.0V, V OUT = V CC, T A = 25 C ma (N-Channel) I SINK Output Sink Current V CC = 10V, V OUT = V CC, T A = 25 C ma (N-Channel) MM74C150 MM82C19 5
6 MM74C150 MM82C19 AC Electrical Characteristics (Note 3) T A = 25 C, C L = 50 pf, unless otherwise noted Symbol Parameter Conditions Min Typ Max Units t pd0, t pd1 Propagation Delay Time to a V CC = 5.0V ns Logical 0 or Logical 1 V CC = 10V ns from Data Inputs to Output V CC = 5.0V, C L = 150 pf ns Note 3: AC Parameters are guaranteed by DC correlated testing. Note 4: Capacitance is guaranteed by periodic testing. V CC = 10V, C L = 150 pf ns t pd0, t pd1 Propagation Delay Time to a V CC = 5.0V ns Logical 0 or Logical 1 V CC = 10V ns from Data Select Inputs to Output t pd0, t pd1 Propagation Delay Time to a V CC = 5.0V ns Logical 0 or Logical 1 V CC = 10V ns from Strobe to Output MM74C150 t 1H, t 0H Delay from Strobe to High V CC = 5.0V, R L = 10k, C L = 5 pf ns Impedance State V CC = 10V, R L = 10k, C L = 5 pf ns MM82C19 t H1, t H0 Delay from Strobe to Logical V CC = 5.0V, R L = 10k, C L = 5 pf ns 1 Level or to Logical 0 V CC = 10V, R L = 10k, C L = 5 pf ns Level (from High Impedance State) MM82C19 C IN Input Capacitance Any Input (Note 4) 5.0 pf C OUT Output Capacitance (Note 4) 11.0 pf MM82C19 C PD Power Dissipation Capacitance (Note 5) 100 pf Note 5: C PD determines the no load AC power consumption of any CMOS device. For complete explanation, see Family Characteristics, application note AN-90. 6
7 Switching Time Waveforms CMOS to CMOS MM74C150 MM82C19 t 1H and t H1 t 1H t H1 t 0H and t H0 t 0H t H0 Note: Delays measured with input t r, t f 20 ns. 7
8 MM74C150 MM82C19 16-Line to 1-Line Multiplexer 3-STATE 16-Line to 1-Line Multiplexer Physical Dimensions inches (millimeters) unless otherwise noted 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, Wide Package Number N24A
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CD4093BC Quad 2-Input NAND Schmitt Trigger
CD4093BC Quad 2-Input NAND Schmitt Trigger General Description The CD4093B consists of four Schmitt-trigger circuits. Each circuit functions as a 2-input NAND gate with Schmitttrigger action on both inputs.
Dual D Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS
TECHNICAL DATA IN74ACT74 Dual D Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS The IN74ACT74 is identical in pinout to the LS/ALS74, HC/HCT74. The IN74ACT74 may be used as a level converter
MM54HC73 MM74HC73 Dual J-K Flip-Flops with Clear
MM54HC73 MM74HC73 Dual J-K Flip-Flops with Clear General Description These J-K Flip-Flops utilize advanced silicon-gate CMOS technology They possess the high noise immunity and low power dissipation of
74VHC373 Octal D-Type Latch with 3-STATE Outputs
74HC373 Octal D-Type Latch with 3-STATE Outputs General Description Ordering Code: February 1993 Revised April 1999 The HC373 is an advanced high speed CMOS octal D- type latch with 3-STATE output fabricated
74VHC573 Octal D-Type Latch with 3-STATE Outputs
74HC573 Octal D-Type Latch with 3-STATE Outputs General Description Ordering Code: March 1993 Revised April 1999 The HC573 is an advanced high speed CMOS octal latch with 3-STATE output fabricated with
MM54HC154 MM74HC154 4-to-16 Line Decoder
MM54HC154 MM74HC154 4-to-16 Line Decoder General Description This decoder utilizes advanced silicon-gate CMOS technology and is well suited to memory address decoding or data routing applications It possesses
Distributed by: www.jameco.com 1-800-831-4242 The content and copyrights of the attached material are the property of its owner. CD4020BC CD4040BC CD4060BC 14-Stage Ripple Carry Binary Counters 12-Stage
74VHC393 Dual 4-Bit Binary Counter
Dual 4-Bit Binary Counter General Description March 1993 Revised March 1999 The HC393 is an advanced high speed CMOS 4-bit Binary Counter fabricated with silicon gate CMOS technology. It achieves the high
MM54HC148 MM74HC Line Priority Encoder
MM54HC148 MM74HC148 8-3 Line Priority Encoder General Description This priority encoder utilizes advanced silicon-gate CMOS technology It has the high noise immunity and low power consumption typical of
74F153 Dual 4-Input Multiplexer
74F153 Dual 4-Input Multiplexer General Description The F153 is a high-speed dual 4-input multiplexer with common select inputs and individual enable inputs for each section. It can select two lines of
MM54HC08 MM74HC08 Quad 2-Input AND Gate
MM54HC08 MM74HC08 Quad 2-Input AND Gate General Description These AND gates utilize advanced silicon-gate CMOS technology to achieve operating speeds similar to LS-TTL gates with the low power consumption
MM54HC373 MM74HC373 TRI-STATE Octal D-Type Latch
MM54HC373 MM74HC373 TRI-STATE Octal D-Type Latch General Description These high speed octal D-type latches utilize advanced silicon-gate CMOS technology They possess the high noise immunity and low power
Is Now Part of To learn more about ON Semiconductor, please visit our website at
Is Now Part of To learn more about ON Semiconductor, please visit our website at www.onsemi.com ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC
74ACT825 8-Bit D-Type Flip-Flop
8-Bit D-Type Flip-Flop General Description The ACT825 is an 8-bit buffered register. They have Clock Enable and Clear features which are ideal for parity bus interfacing in high performance microprogramming
NTE74HC109 Integrated Circuit TTL High Speed CMOS, Dual J K Positive Edge Triggered Flip Flop w/set & Reset
NTE74HC109 Integrated Circuit TTL High Speed CMOS, Dual J K Positive Edge Triggered Flip Flop w/set & Reset Description: The NTE74HC109 is a dual J K flip flip with set and reset in a 16 Lead plastic DIP
74LS240 / 74LS241 Octal 3-STATE Buffer/Line Driver/Line Receiver
74LS240 / 74LS241 Octal 3-STATE Buffer/Line Driver/Line Receiver General Description These buffers/line drivers are designed to improve both the performance and PC board deity of 3-STATE buffers/ drivers
74LS75 Quad Latch. DM74LS75 Quad Latch. General Description. Ordering Code: Logic Diagram. Connection Diagram. Function Table (Each Latch)
74LS75 Quad Latch General Description These latches are ideally suited for use as temporary storage for binary information between processing units and input/output or indicator units. Information present
74VHC138 3-to-8 Decoder/Demultiplexer
74HC138 3-to-8 Decoder/Demultiplexer General Description The HC138 is an advanced high speed CMOS 3-to-8 decoder/demultiplexer fabricated with silicon gate CMOS technology. It achieves the high speed operation